+#define SYSCTL_RETURN(r, x) SYSCTL_OUT(r, &x, sizeof(x))
+
+/******************************************************************************
+ * hw.* MIB
+ */
+
+#define CTLHW_RETQUAD (1 << 31)
+
+/*
+ * Supporting some variables requires us to do "real" work. We
+ * gather some of that here.
+ */
+static int
+sysctl_hw_generic SYSCTL_HANDLER_ARGS
+{
+ char dummy[65];
+ int epochTemp;
+ extern int vm_page_wire_count;
+ ml_cpu_info_t cpu_info;
+ int val, doquad;
+ long long qval;
+
+ /*
+ * Test and mask off the 'return quad' flag.
+ * Note that only some things here support it.
+ */
+ doquad = arg2 & CTLHW_RETQUAD;
+ arg2 &= ~CTLHW_RETQUAD;
+
+ ml_cpu_get_info(&cpu_info);
+
+ /*
+ * Handle various OIDs.
+ *
+ * OIDs that can return int or quad set val and qval and then break.
+ * Errors and int-only values return inline.
+ */
+ switch (arg2) {
+ case HW_NCPU:
+ {
+ host_basic_info_data_t hinfo;
+ kern_return_t kret;
+ int count = HOST_BASIC_INFO_COUNT;
+#define BSD_HOST 1
+
+ kret = host_info(BSD_HOST, HOST_BASIC_INFO, &hinfo, &count);
+ if (kret == KERN_SUCCESS) {
+ return(SYSCTL_RETURN(req, hinfo.max_cpus));
+ } else {
+ return(EINVAL);
+ }
+ }
+ case HW_AVAILCPU:
+ {
+ host_basic_info_data_t hinfo;
+ kern_return_t kret;
+ int count = HOST_BASIC_INFO_COUNT;
+#define BSD_HOST 1
+
+ kret = host_info(BSD_HOST, HOST_BASIC_INFO, &hinfo, &count);
+ if (kret == KERN_SUCCESS) {
+ return(SYSCTL_RETURN(req, hinfo.avail_cpus));
+ } else {
+ return(EINVAL);
+ }
+ }
+ case HW_CACHELINE:
+ val = cpu_info.cache_line_size;
+ qval = (long long)val;
+ break;
+ case HW_L1ICACHESIZE:
+ val = cpu_info.l1_icache_size;
+ qval = (long long)val;
+ break;
+ case HW_L1DCACHESIZE:
+ val = cpu_info.l1_dcache_size;
+ qval = (long long)val;
+ break;
+ case HW_L2CACHESIZE:
+ if (cpu_info.l2_cache_size == 0xFFFFFFFF)
+ return(EINVAL);
+ val = cpu_info.l2_cache_size;
+ qval = (long long)val;
+ break;
+ case HW_L3CACHESIZE:
+ if (cpu_info.l3_cache_size == 0xFFFFFFFF)
+ return(EINVAL);
+ val = cpu_info.l3_cache_size;
+ qval = (long long)val;
+ break;
+
+ /*
+ * Deprecated variables. We still support these for
+ * backwards compatibility purposes only.
+ */
+ case HW_MACHINE:
+ bzero(dummy, sizeof(dummy));
+ if(!PEGetMachineName(dummy,64))
+ return(EINVAL);
+ dummy[64] = 0;
+ return(SYSCTL_OUT(req, dummy, strlen(dummy) + 1));
+ case HW_MODEL:
+ bzero(dummy, sizeof(dummy));
+ if(!PEGetModelName(dummy,64))
+ return(EINVAL);
+ dummy[64] = 0;
+ return(SYSCTL_OUT(req, dummy, strlen(dummy) + 1));
+ case HW_USERMEM:
+ {
+ int usermem = mem_size - vm_page_wire_count * page_size;
+
+ return(SYSCTL_RETURN(req, usermem));
+ }
+ case HW_EPOCH:
+ epochTemp = PEGetPlatformEpoch();
+ if (epochTemp == -1)
+ return(EINVAL);
+ return(SYSCTL_RETURN(req, epochTemp));
+ case HW_VECTORUNIT:
+ return(SYSCTL_RETURN(req, cpu_info.vector_unit));
+ case HW_L2SETTINGS:
+ if (cpu_info.l2_cache_size == 0xFFFFFFFF)
+ return(EINVAL);
+ return(SYSCTL_RETURN(req, cpu_info.l2_settings));
+ case HW_L3SETTINGS:
+ if (cpu_info.l3_cache_size == 0xFFFFFFFF)
+ return(EINVAL);
+ return(SYSCTL_RETURN(req, cpu_info.l3_settings));
+ default:
+ return(ENOTSUP);
+ }
+ /*
+ * Callers may come to us with either int or quad buffers.
+ */
+ if (doquad) {
+ return(SYSCTL_RETURN(req, qval));
+ }
+ return(SYSCTL_RETURN(req, val));
+}
+
+/*
+ * hw.* MIB variables.
+ */
+SYSCTL_PROC (_hw, HW_NCPU, ncpu, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_NCPU, sysctl_hw_generic, "I", "");
+SYSCTL_PROC (_hw, HW_AVAILCPU, activecpu, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_AVAILCPU, sysctl_hw_generic, "I", "");
+SYSCTL_INT (_hw, HW_BYTEORDER, byteorder, CTLFLAG_RD | CTLFLAG_KERN, NULL, BYTE_ORDER, "");
+SYSCTL_INT (_hw, OID_AUTO, cputype, CTLFLAG_RD | CTLFLAG_KERN, &machine_slot[0].cpu_type, 0, "");
+SYSCTL_INT (_hw, OID_AUTO, cpusubtype, CTLFLAG_RD | CTLFLAG_KERN, &machine_slot[0].cpu_subtype, 0, "");
+SYSCTL_INT2QUAD(_hw, OID_AUTO, pagesize, CTLFLAG_RD | CTLFLAG_KERN, &page_size, "");
+SYSCTL_QUAD (_hw, OID_AUTO, busfrequency, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.bus_frequency_hz, "");
+SYSCTL_QUAD (_hw, OID_AUTO, busfrequency_min, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.bus_frequency_min_hz, "");
+SYSCTL_QUAD (_hw, OID_AUTO, busfrequency_max, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.bus_frequency_max_hz, "");
+SYSCTL_QUAD (_hw, OID_AUTO, cpufrequency, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.cpu_frequency_hz, "");
+SYSCTL_QUAD (_hw, OID_AUTO, cpufrequency_min, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.cpu_frequency_min_hz, "");
+SYSCTL_QUAD (_hw, OID_AUTO, cpufrequency_max, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.cpu_frequency_max_hz, "");
+SYSCTL_PROC (_hw, OID_AUTO, cachelinesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_CACHELINE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
+SYSCTL_PROC (_hw, OID_AUTO, l1icachesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_L1ICACHESIZE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
+SYSCTL_PROC (_hw, OID_AUTO, l1dcachesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_L1DCACHESIZE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
+SYSCTL_PROC (_hw, OID_AUTO, l2cachesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_L2CACHESIZE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
+SYSCTL_PROC (_hw, OID_AUTO, l3cachesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_L3CACHESIZE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
+SYSCTL_INT2QUAD(_hw, OID_AUTO, tbfrequency, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.timebase_frequency_hz, "");
+SYSCTL_QUAD (_hw, HW_MEMSIZE, memsize, CTLFLAG_RD | CTLFLAG_KERN, &max_mem, "");
+
+/*
+ * Optional features can register nodes below hw.optional.
+ *
+ * If the feature is not present, the node should either not be registered,
+ * or it should return -1. If the feature is present, the node should return
+ * 0. If the feature is present and its use is advised, the node should
+ * return 1.
+ */
+SYSCTL_NODE(_hw, OID_AUTO, optional, CTLFLAG_RW, NULL, "optional features");
+
+SYSCTL_INT(_hw_optional, OID_AUTO, floatingpoint, CTLFLAG_RD | CTLFLAG_KERN, 0, 1, ""); /* always set */
+
+/*
+ * Export of _cpu_capabilities to userspace, consumed by the pthread code
+ * only.
+ */
+SYSCTL_INT(_hw, OID_AUTO, _cpu_capabilities, CTLFLAG_RD, &_cpu_capabilities, 0, "");
+
+/*
+ * Deprecated variables. These are supported for backwards compatibility
+ * purposes only. The MASKED flag requests that the variables not be
+ * printed by sysctl(8) and similar utilities.
+ *
+ * The variables named *_compat here are int-sized versions of variables
+ * that are now exported as quads. The int-sized versions are normally
+ * looked up only by number, wheras the quad-sized versions should be
+ * looked up by name.
+ *
+ * The *_compat nodes are *NOT* visible within the kernel.
+ */
+SYSCTL_INT (_hw, HW_PAGESIZE, pagesize_compat, CTLFLAG_RD | CTLFLAG_MASKED, &page_size, 0, "");
+SYSCTL_INT (_hw, HW_BUS_FREQ, busfrequency_compat, CTLFLAG_RD | CTLFLAG_MASKED, &gPEClockFrequencyInfo.bus_clock_rate_hz, 0, "");
+SYSCTL_INT (_hw, HW_CPU_FREQ, cpufrequency_compat, CTLFLAG_RD | CTLFLAG_MASKED, &gPEClockFrequencyInfo.cpu_clock_rate_hz, 0, "");
+SYSCTL_PROC(_hw, HW_CACHELINE, cachelinesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_CACHELINE, sysctl_hw_generic, "I", "");
+SYSCTL_PROC(_hw, HW_L1ICACHESIZE, l1icachesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L1ICACHESIZE, sysctl_hw_generic, "I", "");
+SYSCTL_PROC(_hw, HW_L1DCACHESIZE, l1dcachesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L1DCACHESIZE, sysctl_hw_generic, "I", "");
+SYSCTL_PROC(_hw, HW_L2CACHESIZE, l2cachesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L2CACHESIZE, sysctl_hw_generic, "I", "");
+SYSCTL_PROC(_hw, HW_L3CACHESIZE, l3cachesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L3CACHESIZE, sysctl_hw_generic, "I", "");
+SYSCTL_INT (_hw, HW_TB_FREQ, tbfrequency_compat, CTLFLAG_RD | CTLFLAG_MASKED, &gPEClockFrequencyInfo.timebase_frequency_hz, 0, "");
+SYSCTL_PROC(_hw, HW_MACHINE, machine, CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_MACHINE, sysctl_hw_generic, "A", "");
+SYSCTL_PROC(_hw, HW_MODEL, model, CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_MODEL, sysctl_hw_generic, "A", "");
+SYSCTL_INT (_hw, HW_PHYSMEM, physmem, CTLFLAG_RD | CTLFLAG_MASKED, &mem_size, 0, "");
+SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_USERMEM, sysctl_hw_generic, "I", "");
+SYSCTL_PROC(_hw, HW_EPOCH, epoch, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_EPOCH, sysctl_hw_generic, "I", "");
+SYSCTL_PROC(_hw, HW_VECTORUNIT, vectorunit, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_VECTORUNIT, sysctl_hw_generic, "I", "");
+SYSCTL_PROC(_hw, HW_L2SETTINGS, l2settings, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L2SETTINGS, sysctl_hw_generic, "I", "");
+SYSCTL_PROC(_hw, HW_L3SETTINGS, l3settings, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L3SETTINGS, sysctl_hw_generic, "I", "");
+
+/******************************************************************************
+ * Generic MIB initialisation.
+ *
+ * This is a hack, and should be replaced with SYSINITs
+ * at some point.
+ */
+void
+sysctl_mib_init(void)
+{
+
+ /*
+ * Populate the optional portion of the hw.* MIB.
+ *
+ * XXX This could be broken out into parts of the code
+ * that actually directly relate to the functions in
+ * question.
+ */
+#ifdef __ppc__
+ {
+ static int altivec_flag = -1;
+ static SYSCTL_INT(_hw_optional, OID_AUTO, altivec, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &altivec_flag, 0, "");
+
+ if (_cpu_capabilities & kHasAltivec) {
+ altivec_flag = 1;
+ sysctl_register_oid(&sysctl__hw_optional_altivec);
+ }
+ }
+ {
+ static int graphicsops_flag = -1;
+ static SYSCTL_INT(_hw_optional, OID_AUTO, graphicsops, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &graphicsops_flag, 0, "");
+
+ if (_cpu_capabilities & kHasGraphicsOps) {
+ graphicsops_flag = 1;
+ sysctl_register_oid(&sysctl__hw_optional_graphicsops);
+ }
+ }
+ {
+ static int x64bitops_flag = -1;
+ static SYSCTL_INT(_hw_optional, OID_AUTO, 64bitops, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &x64bitops_flag, 0, "");
+
+ if (_cpu_capabilities & k64Bit) {
+ x64bitops_flag = 1;
+ sysctl_register_oid(&sysctl__hw_optional_64bitops);
+ }
+ }
+ {
+ static int fsqrt_flag = -1;
+ static SYSCTL_INT(_hw_optional, OID_AUTO, fsqrt, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &fsqrt_flag, 0, "");
+
+ if (_cpu_capabilities & kHasFsqrt) {
+ fsqrt_flag = 1;
+ sysctl_register_oid(&sysctl__hw_optional_fsqrt);
+ }
+ }
+ {
+ static int stfiwx_flag = -1;
+ static SYSCTL_INT(_hw_optional, OID_AUTO, stfiwx, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &stfiwx_flag, 0, "");
+
+ if (_cpu_capabilities & kHasStfiwx) {
+ stfiwx_flag = 1;
+ sysctl_register_oid(&sysctl__hw_optional_stfiwx);
+ }
+ }
+ {
+ static int dcba_flag = -1;
+ static SYSCTL_INT(_hw_optional, OID_AUTO, dcba, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &dcba_flag, 0, "");
+
+ if (_cpu_capabilities & kDcbaAvailable)
+ dcba_flag = 0;
+ if (_cpu_capabilities & kDcbaRecommended)
+ dcba_flag = 1;
+ if (dcba_flag >= 0)
+ sysctl_register_oid(&sysctl__hw_optional_dcba);
+ }
+ {
+ static int datastreams_flag = -1;
+ static SYSCTL_INT(_hw_optional, OID_AUTO, datastreams, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &datastreams_flag, 0, "");
+
+ if (_cpu_capabilities & kDataStreamsAvailable)
+ datastreams_flag = 0;
+ if (_cpu_capabilities & kDataStreamsRecommended)
+ datastreams_flag = 1;
+ if (datastreams_flag >= 0)
+ sysctl_register_oid(&sysctl__hw_optional_datastreams);
+ }
+ {
+ static int dcbtstreams_flag = -1;
+ static SYSCTL_INT(_hw_optional, OID_AUTO, dcbtstreams, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &dcbtstreams_flag, 0, "");
+
+ if (_cpu_capabilities & kDcbtStreamsAvailable)
+ dcbtstreams_flag = 0;
+ if (_cpu_capabilities & kDcbtStreamsRecommended)
+ dcbtstreams_flag = 1;
+ if (dcbtstreams_flag >= 0)
+ sysctl_register_oid(&sysctl__hw_optional_dcbtstreams);
+ }
+#else
+# warning we do not support this platform yet
+#endif /* __ppc__ */
+
+
+}
projects / apple / xnu.git / commitdiff
