]> git.saurik.com Git - apple/xnu.git/blob - osfmk/ppc/POWERMAC/video_scroll.s
xnu-344.49.tar.gz
[apple/xnu.git] / osfmk / ppc / POWERMAC / video_scroll.s
1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
7 *
8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * file.
14 *
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
22 *
23 * @APPLE_LICENSE_HEADER_END@
24 */
25 /*
26 * @OSF_FREE_COPYRIGHT@
27 *
28 */
29
30 /* Routines to perform high-speed scrolling, assuming that the memory is
31 * non-cached, and that the amount of memory to be scrolled is a multiple
32 * of (at least) 16.
33 */
34
35 #include <ppc/asm.h>
36 #include <ppc/proc_reg.h>
37
38 /*
39 * void video_scroll_up(unsigned long start,
40 * unsigned long end,
41 * unsigned long dest)
42 */
43
44 ENTRY(video_scroll_up, TAG_NO_FRAME_USED)
45
46 mfmsr r0 /* Get the MSR */
47 rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
48 rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
49 mflr r6 /* Get the LR */
50 ori r7,r0,1<<(31-MSR_FP_BIT) /* Turn on floating point */
51 stwu r1,-(FM_SIZE+16)(r1) /* Get space for a couple of registers on stack */
52 rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 /* Turn off interrupts */
53 stw r6,(FM_SIZE+16+FM_LR_SAVE)(r1) /* Save the return */
54
55 mtmsr r7 /* Turn on FPU */
56 isync /* Wait for it */
57
58 vsufpuon1: stfd f0,(FM_SIZE+0)(r1) /* Save one register */
59 stfd f1,(FM_SIZE+8)(r1) /* and the second */
60
61 /* ok, now we can use the FPU registers to do some fast copying
62 */
63
64 .L_vscr_up_loop:
65 lfd f0, 0(r3)
66 lfd f1, 8(r3)
67
68 addi r3, r3, 16
69
70 stfd f0, 0(r5)
71
72 cmpl cr0, r3, r4
73
74 stfd f1, 8(r5)
75
76 addi r5, r5, 16
77
78 blt+ cr0, .L_vscr_up_loop
79
80 lfd f0,(FM_SIZE+0)(r1) /* Load back one register */
81 lfd f1,(FM_SIZE+8)(r1) /* and the second */
82 lwz r1,0(r1) /* Pop the stack */
83
84 mtmsr r0 /* Turn off FPU again */
85 isync /* Wait for it */
86 blr /* Go away, don't bother me... */
87
88
89 /*
90 * void video_scroll_down(unsigned long start, HIGH address to scroll from
91 * unsigned long end, LOW address
92 * unsigned long dest) HIGH address
93 */
94
95 ENTRY(video_scroll_down, TAG_NO_FRAME_USED)
96
97 /* Save off the link register, we want to call fpu_save.
98 */
99
100
101 mfmsr r0 /* Get the MSR */
102 rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
103 rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
104 mflr r6 /* Get the LR */
105 ori r7,r0,1<<(31-MSR_FP_BIT) /* Turn on floating point */
106 stwu r1,-(FM_SIZE+16)(r1) /* Get space for a couple of registers on stack */
107 rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 /* Turn off interrupts */
108 stw r6,(FM_SIZE+16+FM_LR_SAVE)(r1) /* Save the return */
109
110 mtmsr r7 /* Turn on FPU */
111 isync /* Wait for it */
112
113 vsdfpuon1: stfd f0,(FM_SIZE+0)(r1) /* Save one register */
114 stfd f1,(FM_SIZE+8)(r1) /* and the second */
115
116 /* ok, now we can use the FPU registers to do some fast copying */
117
118 .L_vscr_down_loop:
119 lfd f0, -16(r3)
120 lfd f1, -8(r3)
121
122 subi r3, r3, 16
123
124 stfd f0, -16(r5)
125
126 cmpl cr0, r3, r4
127
128 stfd f1, -8(r5)
129
130 subi r5, r5, 16
131
132 bgt+ cr0, .L_vscr_down_loop
133
134
135 lfd f0,(FM_SIZE+0)(r1) /* Load back one register */
136 lfd f1,(FM_SIZE+8)(r1) /* and the second */
137 lwz r1,0(r1) /* Pop the stack */
138
139 mtmsr r0 /* Turn off FPU again */
140 isync /* Wait for it */
141 blr /* Go away, don't bother me... */
142