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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
7 *
8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * file.
14 *
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
22 *
23 * @APPLE_LICENSE_HEADER_END@
24 */
25 /*
26 * @OSF_COPYRIGHT@
27 */
28
29 /* Low level routines dealing with exception entry and exit.
30 * There are various types of exception:
31 *
32 * Interrupt, trap, system call and debugger entry. Each has it's own
33 * handler since the state save routine is different for each. The
34 * code is very similar (a lot of cut and paste).
35 *
36 * The code for the FPU disabled handler (lazy fpu) is in cswtch.s
37 */
38
39 #include <debug.h>
40 #include <mach_assert.h>
41 #include <mach/exception_types.h>
42 #include <mach/ppc/vm_param.h>
43
44 #include <assym.s>
45
46 #include <ppc/asm.h>
47 #include <ppc/proc_reg.h>
48 #include <ppc/trap.h>
49 #include <ppc/exception.h>
50 #include <ppc/savearea.h>
51 #include <ppc/spl.h>
52
53
54 #define VERIFYSAVE 0
55 #define FPVECDBG 0
56
57 /*
58 * thandler(type)
59 *
60 * ENTRY: VM switched ON
61 * Interrupts OFF
62 * R3 contains exception code
63 * R4 points to the saved context (virtual address)
64 * Everything is saved in savearea
65 */
66
67 /*
68 * If pcb.ksp == 0 then the kernel stack is already busy,
69 * we make a stack frame
70 * leaving enough space for the 'red zone' in case the
71 * trapped thread was in the middle of saving state below
72 * its stack pointer.
73 *
74 * otherwise we make a stack frame and
75 * the kernel stack (setting pcb.ksp to 0)
76 *
77 * on return, we do the reverse, the last state is popped from the pcb
78 * and pcb.ksp is set to the top of stack
79 */
80
81 /* TRAP_SPACE_NEEDED is the space assumed free on the kernel stack when
82 * another trap is taken. We need at least enough space for a saved state
83 * structure plus two small backpointer frames, and we add a few
84 * hundred bytes for the space needed by the C (which may be less but
85 * may be much more). We're trying to catch kernel stack overflows :-)
86 */
87
88 #define TRAP_SPACE_NEEDED FM_REDZONE+(2*FM_SIZE)+256
89
90 .text
91
92 .align 5
93 .globl EXT(thandler)
94 LEXT(thandler) ; Trap handler
95
96 mfsprg r25,0 ; Get the per_proc
97
98 lwz r1,PP_ISTACKPTR(r25) ; Get interrupt stack pointer
99
100 cmpwi cr0,r1,0 ; Are we on interrupt stack?
101 lwz r6,PP_ACTIVE_THREAD(r25) ; Get the pointer to the currently active thread
102 beq- cr0,EXT(ihandler) ; If on interrupt stack, treat this as interrupt...
103 lwz r13,THREAD_TOP_ACT(r6) ; Point to the active activation
104 lwz r26,ACT_MACT_SPF(r13) ; Get special flags
105 lwz r8,ACT_MACT_PCB(r13) ; Get the last savearea used
106 rlwinm. r26,r26,0,bbThreadbit,bbThreadbit ; Do we have Blue Box Assist active?
107 lwz r1,ACT_MACT_KSP(r13) ; Get the top of kernel stack
108 bnel- checkassist ; See if we should assist this
109 stw r4,ACT_MACT_PCB(r13) ; Point to our savearea
110 stw r8,SAVprev(r4) ; Queue the new save area in the front
111
112 #if VERIFYSAVE
113 bl versave ; (TEST/DEBUG)
114 #endif
115
116 lwz r9,THREAD_KERNEL_STACK(r6) ; Get our kernel stack start
117 cmpwi cr1,r1,0 ; Are we already on kernel stack?
118 stw r13,SAVact(r4) ; Mark the savearea as belonging to this activation
119 lwz r26,saver1(r4) ; Get the stack at interrupt time
120
121 bne+ cr1,.L_kstackfree ; We are not on kernel stack yet...
122
123 subi r1,r26,FM_REDZONE ; Make a red zone on interrupt time kernel stack
124
125 .L_kstackfree:
126 lwz r7,savesrr1(r4) ; Pick up the entry MSR
127 sub r9,r1,r9 ; Get displacment into the kernel stack
128 li r0,0 ; Make this 0
129 cmplwi cr2,r9,KERNEL_STACK_SIZE ; Do we still have room on the stack?
130 beq cr1,.L_state_on_kstack ; using above test for pcb/stack
131
132 stw r0,ACT_MACT_KSP(r13) ; Show that we have taken the stack
133
134 .L_state_on_kstack:
135 lwz r9,savevrsave(r4) ; Get the VRSAVE register
136 rlwinm. r6,r7,0,MSR_VEC_BIT,MSR_VEC_BIT ; Was vector on?
137 subi r1,r1,FM_SIZE ; Push a header onto the current stack
138 bgt- cr2,kernelStackBad ; Kernel stack is bogus...
139
140 kernelStackNotBad: ; Vector was off
141 beq+ tvecoff ; Vector off, do not save vrsave...
142 stw r9,liveVRS(r25) ; Set the live value
143
144 tvecoff: stw r26,FM_BACKPTR(r1) ; Link back to the previous frame
145
146 #if DEBUG
147 /* If debugging, we need two frames, the first being a dummy
148 * which links back to the trapped routine. The second is
149 * that which the C routine below will need
150 */
151 lwz r3,savesrr0(r4) ; Get the point of interruption
152 stw r3,FM_LR_SAVE(r1) ; save old instr ptr as LR value
153 stwu r1, -FM_SIZE(r1) ; and make new frame
154 #endif /* DEBUG */
155
156
157 /* call trap handler proper, with
158 * ARG0 = type (not yet, holds pcb ptr)
159 * ARG1 = saved_state ptr (already there)
160 * ARG2 = dsisr (already there)
161 * ARG3 = dar (already there)
162 */
163
164
165 lwz r3,saveexception(r4) ; Get the exception code
166 lwz r0,ACT_MACT_SPF(r13) ; Get the special flags
167
168 addi r5,r3,-T_DATA_ACCESS ; Adjust to start of range
169 rlwinm. r0,r0,0,runningVMbit,runningVMbit ; Are we in VM state? (cr0_eq == 0 if yes)
170 cmplwi cr2,r5,T_TRACE-T_DATA_ACCESS ; Are we still in range? (cr_gt if not)
171
172 lwz r5,savedsisr(r4) ; Get the saved DSISR
173
174 crnor cr7_eq,cr0_eq,cr2_gt ; We should intercept if in VM and is a true trap (cr7_eq == 1 if yes)
175 rlwinm. r0,r7,0,MSR_PR_BIT,MSR_PR_BIT ; Are we trapping from supervisor state? (cr0_eq == 1 if yes)
176
177 cmpi cr2,r3,T_PREEMPT ; Is this a preemption?
178
179 crandc cr0_eq,cr7_eq,cr0_eq ; Do not intercept if we are in the kernel (cr0_eq == 1 if yes)
180
181 lwz r6,savedar(r4) ; Get the DAR
182
183 beq- cr2, .L_call_trap ; Do not turn on interrupts for T_PREEMPT
184 beq- exitFromVM ; Any true trap but T_MACHINE_CHECK exits us from the VM...
185
186 /* syscall exception might warp here if there's nothing left
187 * to do except generate a trap
188 */
189
190 .L_call_trap:
191
192 bl EXT(trap)
193
194 mfmsr r7 ; Get the MSR
195 rlwinm r7,r7,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
196 rlwinm r7,r7,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
197 rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Clear the interrupt enable mask
198 mtmsr r7 ; Disable for interrupts
199 mfsprg r10,0 ; Restore the per_proc info
200 /*
201 * This is also the point where new threads come when they are created.
202 * The new thread is setup to look like a thread that took an
203 * interrupt and went immediatly into trap.
204 */
205
206 thread_return:
207 lwz r4,SAVprev(r3) ; Pick up the previous savearea
208 lwz r11,SAVflags(r3) ; Get the flags of the current savearea
209 lwz r8,savesrr1(r3) ; Get the MSR we are going to
210 rlwinm r11,r11,0,15,13 ; Clear the syscall flag
211 lwz r1,PP_ACTIVE_THREAD(r10) ; Get the active thread
212 rlwinm. r8,r8,0,MSR_PR_BIT,MSR_PR_BIT ; Are we going to the user?
213 mfsprg r8,1 ; Get the current activation
214 stw r11,SAVflags(r3) ; Save back the flags (with reset stack cleared)
215
216 stw r4,ACT_MACT_PCB(r8) ; Point to the previous savearea (or 0 if none)
217
218 beq- chkfac ; We are not leaving the kernel yet...
219
220 lwz r5,THREAD_KERNEL_STACK(r1) ; Get the base pointer to the stack
221 addi r5,r5,KERNEL_STACK_SIZE-FM_SIZE ; Reset to empty
222 stw r5,ACT_MACT_KSP(r8) ; Save the empty stack pointer
223 b chkfac ; Go end it all...
224
225
226 ;
227 ; Here is where we go when we detect that the kernel stack is all messed up.
228 ; We just try to dump some info and get into the debugger.
229 ;
230
231 kernelStackBad:
232
233 lwz r3,PP_DEBSTACK_TOP_SS(r25) ; Pick up debug stack top
234 subi r3,r3,KERNEL_STACK_SIZE-FM_SIZE ; Adjust to start of stack
235 sub r3,r1,r3 ; Get displacement into debug stack
236 cmplwi cr2,r3,KERNEL_STACK_SIZE-FM_SIZE ; Check if we are on debug stack
237 blt+ cr2,kernelStackNotBad ; Yeah, that is ok too...
238
239 lis r0,hi16(Choke) ; Choke code
240 ori r0,r0,lo16(Choke) ; and the rest
241 li r3,failStack ; Bad stack code
242 sc ; System ABEND
243
244
245 /*
246 * shandler(type)
247 *
248 * ENTRY: VM switched ON
249 * Interrupts OFF
250 * R3 contains exception code
251 * R4 points to the saved context (virtual address)
252 * Everything is saved in savearea
253 */
254
255 /*
256 * If pcb.ksp == 0 then the kernel stack is already busy,
257 * this is an error - jump to the debugger entry
258 *
259 * otherwise depending upon the type of
260 * syscall, look it up in the kernel table
261 * or pass it to the server.
262 *
263 * on return, we do the reverse, the state is popped from the pcb
264 * and pcb.ksp is set to the top of stack.
265 */
266
267 /*
268 * NOTE:
269 * mach system calls are negative
270 * BSD system calls are low positive
271 * PPC-only system calls are in the range 0x6xxx
272 * PPC-only "fast" traps are in the range 0x7xxx
273 */
274
275 .align 5
276 .globl EXT(shandler)
277 LEXT(shandler) ; System call handler
278
279 mfsprg r25,0 ; Get the per proc area
280 lwz r0,saver0(r4) ; Get the original syscall number
281 lwz r17,PP_ISTACKPTR(r25) ; Get interrupt stack pointer
282 rlwinm r15,r0,0,0,19 ; Clear the bottom of call number for fast check
283 mr. r17,r17 ; Are we on interrupt stack?
284 lwz r7,savesrr1(r4) ; Get the SRR1 value
285 beq- EXT(ihandler) ; On interrupt stack, not allowed...
286 lwz r9,savevrsave(r4) ; Get the VRsave register
287 rlwinm. r6,r7,0,MSR_VEC_BIT,MSR_VEC_BIT ; Was vector on?
288 lwz r16,PP_ACTIVE_THREAD(r25) ; Get the thread pointer
289 mfsprg r13,1 ; Pick up the active thread
290
291 beq+ svecoff ; Vector off, do not save vrsave...
292 stw r9,liveVRS(r25) ; Set the live value
293 ;
294 ; Check if SCs are being redirected for the BlueBox or to VMM
295 ;
296
297 svecoff: lwz r6,ACT_MACT_SPF(r13) ; Pick up activation special flags
298 mtcrf 0x41,r6 ; Check special flags
299 crmove cr6_eq,runningVMbit ; Remember if we are in VMM
300 bne cr6,sVMchecked ; Not running VM
301 lwz r18,spcFlags(r25) ; Load per_proc special flags
302 rlwinm. r18,r18,0,FamVMmodebit,FamVMmodebit ; Is FamVMmodebit set?
303 beq sVMchecked ; Not in FAM
304 cmpwi r0,0x6004 ; Is it vmm_dispatch syscall:
305 bne sVMchecked
306 lwz r26,saver3(r4) ; Get the original syscall number
307 cmpwi cr6,r26,kvmmExitToHost ; vmm_exit_to_host request
308 sVMchecked:
309 bf+ bbNoMachSCbit,noassist ; Take branch if SCs are not redirected
310 lwz r26,ACT_MACT_BEDA(r13) ; Pick up the pointer to the blue box exception area
311 b EXT(atomic_switch_syscall) ; Go to the assist...
312
313 noassist: cmplwi r15,0x7000 ; Do we have a fast path trap?
314 lwz r14,ACT_MACT_PCB(r13) ; Now point to the PCB
315 beql+ fastpath ; We think it is a fastpath...
316
317 lwz r1,ACT_MACT_KSP(r13) ; Get the kernel stack pointer
318 #if DEBUG
319 mr. r1,r1 ; Are we already on the kernel stack?
320 li r3,T_SYSTEM_CALL ; Yup, pretend we had an interrupt...
321 beq- EXT(ihandler) ; Bad boy, bad boy... What cha gonna do when they come for you?
322 #endif /* DEBUG */
323
324 stw r4,ACT_MACT_PCB(r13) ; Point to our savearea
325 li r0,0 ; Clear this out
326 stw r14,SAVprev(r4) ; Queue the new save area in the front
327 stw r13,SAVact(r4) ; Point the savearea at its activation
328
329 #if VERIFYSAVE
330 bl versave ; (TEST/DEBUG)
331 #endif
332
333 mr r30,r4 ; Save pointer to the new context savearea
334 lwz r15,saver1(r4) ; Grab interrupt time stack
335 stw r0,ACT_MACT_KSP(r13) ; Mark stack as busy with 0 val
336 stw r15,FM_BACKPTR(r1) ; Link stack frame backwards
337
338 #if DEBUG
339 /* If debugging, we need two frames, the first being a dummy
340 * which links back to the trapped routine. The second is
341 * that which the C routine below will need
342 */
343 lwz r8,savesrr0(r30) ; Get the point of interruption
344 stw r8,FM_LR_SAVE(r1) ; Save old instr ptr as LR value
345 stwu r1, -FM_SIZE(r1) ; and make new frame
346 #endif /* DEBUG */
347
348 mfmsr r11 ; Get the MSR
349 lwz r15,SAVflags(r30) ; Get the savearea flags
350 ori r11,r11,lo16(MASK(MSR_EE)) ; Turn on interruption enabled bit
351 lwz r0,saver0(r30) ; Get R0 back
352 oris r15,r15,SAVsyscall >> 16 ; Mark that it this is a syscall
353 rlwinm r10,r0,0,0,19 ; Keep only the top part
354 stwu r1,-(FM_SIZE+ARG_SIZE)(r1) ; Make a stack frame
355 cmplwi r10,0x6000 ; Is it the special ppc-only guy?
356 stw r15,SAVflags(r30) ; Save syscall marker
357 beq- cr6,exitFromVM ; It is time to exit from alternate context...
358
359 beq- ppcscall ; Call the ppc-only system call handler...
360
361 mtmsr r11 ; Enable interruptions
362
363 lwz r0,saver0(r30) ; Get the system call selector
364 mr. r0,r0 ; What kind is it?
365 blt- .L_kernel_syscall ; System call number if negative, this is a mach call...
366
367 cmpwi cr0,r0,0x7FFA ; Special blue box call?
368 beq- .L_notify_interrupt_syscall ; Yeah, call it...
369
370 lwz r8,ACT_TASK(r13) ; Get our task
371 lis r10,hi16(EXT(c_syscalls_unix)) ; Get top half of counter address
372 lwz r7,TASK_SYSCALLS_UNIX(r8) ; Get the current count
373 ori r10,r10,lo16(EXT(c_syscalls_unix)) ; Get low half of counter address
374 addi r7,r7,1 ; Bump it
375 lwz r9,0(r10) ; Get counter
376 stw r7,TASK_SYSCALLS_UNIX(r8) ; Save it
377 mr r3,r30 ; Get PCB/savearea
378 mr r4,r13 ; current activation
379 addi r9,r9,1 ; Add 1
380 stw r9,0(r10) ; Save it back
381 bl EXT(unix_syscall) ; Check out unix...
382
383 .L_call_server_syscall_exception:
384 li r3,EXC_SYSCALL ; doexception(EXC_SYSCALL, num, 1)
385
386 .L_call_server_exception:
387 mr r4,r0 ; Set syscall selector
388 li r5,1
389 b EXT(doexception) ; Go away, never to return...
390
391 .L_notify_interrupt_syscall:
392 lwz r3,saver3(r30) ; Get the new PC address to pass in
393 bl EXT(syscall_notify_interrupt)
394 b .L_syscall_return
395
396 ;
397 ; Handle PPC-only system call interface
398 ; These are called with interruptions disabled
399 ; and the savearea/pcb as the first parameter.
400 ; It is up to the callee to enable interruptions if
401 ; they should be. We are in a state here where
402 ; both interrupts and preemption is ok, but because we could
403 ; be calling diagnostic code we will not enable.
404 ;
405 ; Also, the callee is responsible for finding any parameters
406 ; in the savearea/pcb. It also must set saver3 with any return
407 ; code before returning.
408 ;
409 ; There are 3 possible return codes:
410 ; 0 the call is disabled or something, we treat this like it was bogus
411 ; + the call finished ok, check for AST
412 ; - the call finished ok, do not check for AST
413 ;
414 ; Note: the last option is intended for special diagnostics calls that
415 ; want the thread to return and execute before checking for preemption.
416 ;
417 ; NOTE: Both R16 (thread) and R30 (savearea) need to be preserved over this call!!!!
418 ;
419
420 .align 5
421
422 ppcscall: rlwinm r11,r0,2,18,29 ; Make an index into the table
423 lis r10,hi16(EXT(PPCcalls)) ; Get PPC-only system call table
424 cmplwi r11,PPCcallmax ; See if we are too big
425 ori r10,r10,lo16(EXT(PPCcalls)) ; Merge in low half
426 bgt- .L_call_server_syscall_exception ; Bogus call...
427 lwzx r11,r10,r11 ; Get function address
428
429 ;
430 ; Note: make sure we do not change the savearea in R30 to
431 ; a different register without checking. Some of the PPCcalls
432 ; depend upon it being there.
433 ;
434
435 mr r3,r30 ; Pass the savearea
436 mr r4,r13 ; Pass the activation
437 mr. r11,r11 ; See if there is a function here
438 mtlr r11 ; Set the function address
439 beq- .L_call_server_syscall_exception ; Disabled call...
440 blrl ; Call it
441
442 .globl EXT(ppcscret)
443
444 LEXT(ppcscret)
445 mr. r3,r3 ; See what we should do
446 mr r31,r16 ; Restore the current thread pointer
447 bgt+ .L_thread_syscall_ret_check_ast ; Take normal AST checking return....
448 mfsprg r10,0 ; Get the per_proc
449 blt+ .L_thread_syscall_return ; Return, but no ASTs....
450 lwz r0,saver0(r30) ; Restore the system call number
451 b .L_call_server_syscall_exception ; Go to common exit...
452
453
454 /* Once here, we know that the syscall was -ve
455 * we should still have r1=ksp,
456 * r16 = pointer to current thread,
457 * r13 = pointer to top activation,
458 * r0 = syscall number
459 * r30 = pointer to saved state (in pcb)
460 */
461
462 .align 5
463
464 .L_kernel_syscall:
465 ;
466 ; Call a function that can print out our syscall info
467 ; Note that we don t care about any volatiles yet
468 ;
469 mr r4,r30
470 bl EXT(syscall_trace)
471 lwz r0,saver0(r30) ; Get the system call selector */
472 neg r31,r0 ; Make system call number positive and put in r31
473 lis r29,hi16(EXT(mach_trap_count)) ; High part of valid trap number
474 ori r29,r29,lo16(EXT(mach_trap_count)) ; Low part of valid trap number
475 lis r28,hi16(EXT(mach_trap_table)) ; High part of trap table
476 lwz r29,0(r29) ; Get the first invalid system call number
477 ori r28,r28,lo16(EXT(mach_trap_table)) ; Low part of trap table
478
479 cmplw r31,r29 ; See if we have a valid system call number
480 slwi r31,r31,MACH_TRAP_OFFSET_POW2 ; Get offset into table
481
482 bge- .L_call_server_syscall_exception ; System call number of bogus
483
484 add r31,r31,r28 ; Point to the system call entry
485 lis r28,hi16(EXT(kern_invalid)) ; Get the high invalid routine address
486 lwz r0,MACH_TRAP_FUNCTION(r31) ; Grab the system call routine address
487 ori r28,r28,lo16(EXT(kern_invalid)) ; Get the low part of the invalid routine address
488 lwz r29,MACH_TRAP_ARGC(r31) ; Get the number of arguments in the call
489 cmplw r0,r28 ; Is this an invalid entry?
490 beq- .L_call_server_syscall_exception ; Yes, it is invalid...
491
492 /* get arg count. If argc > 8 then not all args were in regs,
493 * so we must perform copyin.
494 */
495 cmpwi cr0,r29,8 ; Do we have more than 8 arguments?
496 ble+ .L_syscall_got_args ; Nope, no copy in needed...
497
498 /* argc > 8 - perform a copyin */
499 /* if the syscall came from kernel space, we can just copy */
500
501 lwz r0,savesrr1(r30) ; Pick up exception time MSR
502 andi. r0,r0,MASK(MSR_PR) ; Check the priv bit
503 bne+ .L_syscall_arg_copyin ; We are not priviliged...
504
505 /* we came from a privilaged task, just do a copy */
506 /* get user's stack pointer */
507
508 lwz r28,saver1(r30) ; Get the stack pointer
509
510 subi r29,r29,8 ; Get the number of arguments to copy
511
512 addi r28,r28,COPYIN_ARG0_OFFSET-4 ; Point to source - 4
513 addi r27,r1,FM_ARG0-4 ; Point to sink - 4
514
515 .L_syscall_copy_word_loop:
516 addic. r29,r29,-1 ; Count down the number of arguments left
517 lwz r0,4(r28) ; Pick up the argument from the stack
518 addi r28,r28,4 ; Point to the next source
519 stw r0,4(r27) ; Store the argument
520 addi r27,r27,4 ; Point to the next sink
521 bne+ .L_syscall_copy_word_loop ; Move all arguments...
522 b .L_syscall_got_args ; Go call it now...
523
524
525 /* we came from a user task, pay the price of a real copyin */
526 /* set recovery point */
527
528 .align 5
529
530 .L_syscall_arg_copyin:
531 lwz r8,ACT_VMMAP(r13) ; Get the vm_map for this activation
532 lis r28,hi16(.L_syscall_copyin_recover)
533 lwz r8,VMMAP_PMAP(r8) ; Get the pmap
534 ori r28,r28,lo16(.L_syscall_copyin_recover)
535 addi r8,r8,PMAP_SEGS ; Point to the pmap SR slots
536 stw r28,THREAD_RECOVER(r16) ; R16 still holds thread ptr
537
538 /* We can manipulate the COPYIN segment register quite easily
539 * here, but we've also got to make sure we don't go over a
540 * segment boundary - hence some mess.
541 * Registers from 12-29 are free for our use.
542 */
543
544
545 lwz r28,saver1(r30) ; Get the stack pointer
546 subi r29,r29,8 ; Get the number of arguments to copy
547 addi r28,r28,COPYIN_ARG0_OFFSET ; Set source in user land
548
549 /* set up SR_COPYIN to allow us to copy, we may need to loop
550 * around if we change segments. We know that this previously
551 * pointed to user space, so the sid doesn't need setting.
552 */
553
554 rlwinm r7,r28,6,26,29 ; Get index to the segment slot
555
556 .L_syscall_copyin_seg_loop:
557 lwzx r10,r8,r7 ; Get the source SR value
558 rlwinm r26,r28,0,4,31 ; Clear the segment number from source address
559 mtsr SR_COPYIN,r10 ; Set the copyin SR
560 isync
561
562 oris r26,r26,(SR_COPYIN_NUM << (28-16)) ; Insert the copyin segment number into source address
563
564 addi r27,r1,FM_ARG0-4 ; Point to area - 4 where we will store the arguments
565
566 .L_syscall_copyin_word_loop:
567 lwz r0,0(r26) ; MAY CAUSE PAGE FAULT!
568 subi r29,r29,1 ; Decrement count
569 addi r26,r26,4 ; Bump input
570 stw r0,4(r27) ; Save the copied in word
571 mr. r29,r29 ; Are they all moved?
572 addi r27,r27,4 ; Bump output
573 beq+ .L_syscall_copyin_done ; Escape if we are done...
574
575 rlwinm. r0,r26,0,4,29 ; Did we just step into a new segment?
576 addi r28,r28,4 ; Bump up user state address also
577 bne+ .L_syscall_copyin_word_loop ; We are still on the same segment...
578
579 addi r7,r7,4 ; Bump to next slot
580 b .L_syscall_copyin_seg_loop ; On new segment! remap
581
582 /* Don't bother restoring SR_COPYIN, we can leave it trashed */
583 /* clear thread recovery as we're done touching user data */
584
585 .align 5
586
587 .L_syscall_copyin_done:
588 li r0,0
589 stw r0,THREAD_RECOVER(r16) ; R16 still holds thread ptr
590
591 .L_syscall_got_args:
592 lwz r0,MACH_TRAP_FUNCTION(r31) ; Get function address
593 lwz r8,ACT_TASK(r13) ; Get our task
594 lis r10,hi16(EXT(c_syscalls_mach)) ; Get top half of counter address
595 lwz r7,TASK_SYSCALLS_MACH(r8) ; Get the current count
596 lwz r3,saver3(r30) ; Restore r3
597 addi r7,r7,1 ; Bump it
598 ori r10,r10,lo16(EXT(c_syscalls_mach)) ; Get low half of counter address
599 stw r7,TASK_SYSCALLS_MACH(r8) ; Save it
600 lwz r4,saver4(r30) ; Restore r4
601 lwz r9,0(r10) ; Get counter
602 mtctr r0 ; Set function address
603 lwz r5,saver5(r30) ; Restore r5
604 lwz r6,saver6(r30) ; Restore r6
605 addi r9,r9,1 ; Add 1
606 lwz r7,saver7(r30) ; Restore r7
607 lwz r8,saver8(r30) ; Restore r8
608 stw r9,0(r10) ; Save it back
609 lwz r9,saver9(r30) ; Restore r9
610 lwz r10,saver10(r30) ; Restore r10
611
612
613 ;
614 ; Note that all arguments from the system call are passed into the function
615 ;
616
617 bctrl ; Perform the actual syscall
618
619 /* 'standard' syscall returns here - INTERRUPTS ARE STILL ON */
620
621 /* r3 contains value that we're going to return to the user
622 */
623
624 /*
625 * Ok, return from C function, R3 = return value
626 *
627 * get the active thread's PCB pointer and thus pointer to user state
628 * saved state is still in R30 and the active thread is in R16 .
629 */
630
631 /* Store return value into saved state structure, since
632 * we need to pick up the value from here later - the
633 * syscall may perform a thread_set_syscall_return
634 * followed by a thread_exception_return, ending up
635 * at thread_syscall_return below, with SS_R3 having
636 * been set up already
637 */
638
639 /* When we are here, r16 should point to the current thread,
640 * r30 should point to the current pcb
641 */
642
643 /* save off return value, we must load it
644 * back anyway for thread_exception_return
645 */
646
647 .L_syscall_return:
648 mr r31,r16 ; Move the current thread pointer
649 stw r3,saver3(r30) ; Stash the return code
650
651 mr r4,r30 ; Pass in the savearea
652 bl EXT(syscall_trace_end) ; Trace the exit of the system call
653
654 .L_thread_syscall_ret_check_ast:
655 mfmsr r12 ; Get the current MSR
656 rlwinm r12,r12,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
657 rlwinm r12,r12,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
658 rlwinm r12,r12,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions enable bit
659 mtmsr r12 ; Turn interruptions off
660
661 mfsprg r10,0 ; Get the per_processor block
662
663 /* Check to see if there's an outstanding AST */
664
665 lwz r4,PP_NEED_AST(r10) ; Get the pointer to the ast requests
666 lwz r4,0(r4) ; Get the flags
667 cmpi cr0,r4, 0 ; Any pending asts?
668 beq+ cr0,.L_syscall_no_ast ; Nope...
669
670 /* Yes there is, call ast_taken
671 * pretending that the user thread took an AST exception here,
672 * ast_taken will save all state and bring us back here
673 */
674
675 #if DEBUG
676 /* debug assert - make sure that we're not returning to kernel */
677 lwz r3,savesrr1(r30)
678 andi. r3,r3,MASK(MSR_PR)
679 bne+ scrnotkern ; returning to user level, check
680
681 lis r0,hi16(Choke) ; Choke code
682 ori r0,r0,lo16(Choke) ; and the rest
683 li r3,failContext ; Bad state code
684 sc ; System ABEND
685
686 scrnotkern:
687 #endif /* DEBUG */
688
689 li r3,AST_ALL ; Set ast flags
690 li r4,1 ; Set interrupt allowed
691 bl EXT(ast_taken) ; Process the pending ast
692 b .L_thread_syscall_ret_check_ast ; Go see if there was another...
693
694 /* thread_exception_return returns to here, almost all
695 * registers intact. It expects a full context restore
696 * of what it hasn't restored itself (ie. what we use).
697 *
698 * In particular for us,
699 * we still have r31 points to the current thread,
700 * r30 points to the current pcb
701 */
702
703 .align 5
704
705 .L_syscall_no_ast:
706 .L_thread_syscall_return:
707
708 mr r3,r30 ; Get savearea to the correct register for common exit
709 mfsprg r8,1 ; Now find the current activation
710
711 lwz r11,SAVflags(r30) ; Get the flags
712 lwz r5,THREAD_KERNEL_STACK(r31) ; Get the base pointer to the stack
713 rlwinm r11,r11,0,15,13 ; Clear the syscall flag
714 lwz r4,SAVprev(r30) ; Get the previous save area
715 stw r11,SAVflags(r30) ; Stick back the flags
716 addi r5,r5,KERNEL_STACK_SIZE-FM_SIZE ; Reset to empty
717 stw r4,ACT_MACT_PCB(r8) ; Save previous save area
718 stw r5,ACT_MACT_KSP(r8) ; Save the empty stack pointer
719 b chkfac ; Go end it all...
720
721 .align 5
722
723 .L_syscall_copyin_recover:
724
725 /* This is the catcher for any data faults in the copyin
726 * of arguments from the user's stack.
727 * r30 still holds a pointer to the PCB
728 *
729 * call syscall_error(EXC_BAD_ACCESS, EXC_PPC_VM_PROT_READ, sp, ssp),
730 *
731 * we already had a frame so we can do this
732 */
733
734 li r3,EXC_BAD_ACCESS ; Set bad access code
735 li r4,EXC_PPC_VM_PROT_READ ; Set protection exception
736 lwz r5,saver1(r30) ; Point to the stack
737 mr r6,r30 ; Pass savearea
738
739 bl EXT(syscall_error) ; Generate error...
740 b .L_syscall_return ; Continue out...
741
742
743 /*
744 * thread_exception_return()
745 *
746 * Return to user mode directly from within a system call.
747 */
748
749 .align 5
750 .globl EXT(thread_bootstrap_return)
751 LEXT(thread_bootstrap_return) ; NOTE: THIS IS GOING AWAY IN A FEW DAYS....
752
753 .globl EXT(thread_exception_return)
754 LEXT(thread_exception_return) ; Directly return to user mode
755
756 .L_thread_exc_ret_check_ast:
757 mfmsr r3 ; Get the MSR
758 rlwinm r3,r3,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
759 rlwinm r3,r3,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
760 rlwinm r3,r3,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Clear EE
761 mtmsr r3 ; Disable interrupts
762
763 /* Check to see if there's an outstanding AST */
764 /* We don't bother establishing a call frame even though CHECK_AST
765 can invoke ast_taken(), because it can just borrow our caller's
766 frame, given that we're not going to return.
767 */
768
769 mfsprg r10,0 ; Get the per_processor block
770 lwz r4,PP_NEED_AST(r10)
771 lwz r4,0(r4)
772 cmpi cr0,r4, 0
773 beq cr0,.L_exc_ret_no_ast
774
775 /* Yes there is, call ast_taken
776 * pretending that the user thread took an AST exception here,
777 * ast_taken will save all state and bring us back here
778 */
779
780 li r3,AST_ALL
781 li r4,1
782
783 bl EXT(ast_taken)
784 b .L_thread_exc_ret_check_ast ; check for a second AST (rare)
785
786 /* arriving here, interrupts should be disabled */
787 /* Get the active thread's PCB pointer to restore regs
788 */
789 .L_exc_ret_no_ast:
790
791 mfsprg r30,1 ; Get the currrent activation
792 lwz r31,ACT_THREAD(r30) ; Get the current thread
793
794 lwz r30,ACT_MACT_PCB(r30)
795 mr. r30,r30 ; Is there any context yet?
796 beq- makeDummyCtx ; No, hack one up...
797 #if DEBUG
798 /*
799 * debug assert - make sure that we're not returning to kernel
800 * get the active thread's PCB pointer and thus pointer to user state
801 */
802
803 lwz r3,savesrr1(r30)
804 andi. r3,r3,MASK(MSR_PR)
805 bne+ ret_user2 ; We are ok...
806
807 lis r0,hi16(Choke) ; Choke code
808 ori r0,r0,lo16(Choke) ; and the rest
809 li r3,failContext ; Bad state code
810 sc ; System ABEND
811
812 ret_user2:
813 #endif /* DEBUG */
814
815 /* If the system call flag isn't set, then we came from a trap,
816 * so warp into the return_from_trap (thread_return) routine,
817 * which takes PCB pointer in R3, not in r30!
818 */
819 lwz r0,SAVflags(r30) ; Grab the savearea flags
820 mr r3,r30 ; Copy pcb pointer into r3 in case we need it
821 andis. r0,r0,SAVsyscall>>16 ; Are we returning from a syscall?
822 beq- cr0,thread_return ; Nope, must be a thread return...
823 b .L_thread_syscall_return ; Join up with the system call return...
824
825 ;
826 ; This is where we handle someone trying who did a thread_create followed
827 ; by a thread_resume with no intervening thread_set_state. Just make an
828 ; empty context, initialize it to trash and let em execute at 0...
829 ;
830
831 .align 5
832
833 makeDummyCtx:
834 bl EXT(save_get) ; Get a save_area
835 li r4,SAVgeneral ; Get the general context type
836 li r0,0 ; Get a 0
837 stb r4,SAVflags+2(r3) ; Set type
838 addi r2,r3,savevscr ; Point past what we are clearing
839 mr r4,r3 ; Save the start
840
841 cleardummy: stw r0,0(r4) ; Clear stuff
842 addi r4,r4,4 ; Next word
843 cmplw r4,r2 ; Still some more?
844 blt+ cleardummy ; Yeah...
845
846 lis r2,hi16(MSR_EXPORT_MASK_SET) ; Set the high part of the user MSR
847 ori r2,r2,lo16(MSR_EXPORT_MASK_SET) ; And the low part
848 stw r2,savesrr1(r3) ; Set the default user MSR
849
850 b thread_return ; Go let em try to execute, hah!
851
852 /*
853 * ihandler(type)
854 *
855 * ENTRY: VM switched ON
856 * Interrupts OFF
857 * R3 contains exception code
858 * R4 points to the saved context (virtual address)
859 * Everything is saved in savearea
860 *
861 */
862
863 .align 5
864 .globl EXT(ihandler)
865 LEXT(ihandler) ; Interrupt handler */
866
867 /*
868 * get the value of istackptr, if it's zero then we're already on the
869 * interrupt stack.
870 */
871
872 lwz r10,savesrr1(r4) ; Get SRR1
873 lwz r7,savevrsave(r4) ; Get the VRSAVE register
874 mfsprg r25,0 ; Get the per_proc block
875 li r14,0 ; Zero this for now
876 rlwinm. r13,r10,0,MSR_VEC_BIT,MSR_VEC_BIT ; Was vector on?
877 lwz r1,PP_ISTACKPTR(r25) ; Get the interrupt stack
878 li r13,0 ; Zero this for now
879 lwz r16,PP_ACTIVE_THREAD(r25) ; Get the thread pointer
880
881 beq+ ivecoff ; Vector off, do not save vrsave...
882 stw r7,liveVRS(r25) ; Set the live value
883
884 ivecoff: li r0,0 ; Get a constant 0
885 cmplwi cr1,r16,0 ; Are we still booting?
886
887 ifpoff: mr. r1,r1 ; Is it active?
888 beq- cr1,ihboot1 ; We are still coming up...
889 lwz r13,THREAD_TOP_ACT(r16) ; Pick up the active thread
890 lwz r14,ACT_MACT_PCB(r13) ; Now point to the PCB
891
892 ihboot1: lwz r9,saver1(r4) ; Pick up the rupt time stack
893 stw r14,SAVprev(r4) ; Queue the new save area in the front
894 stw r13,SAVact(r4) ; Point the savearea at its activation
895 beq- cr1,ihboot4 ; We are still coming up...
896 stw r4,ACT_MACT_PCB(r13) ; Point to our savearea
897
898 ihboot4: bne .L_istackfree ; Nope...
899
900 /* We're already on the interrupt stack, get back the old
901 * stack pointer and make room for a frame
902 */
903
904 lwz r10,PP_INTSTACK_TOP_SS(r25) ; Get the top of the interrupt stack
905 addi r5,r9,INTSTACK_SIZE-FM_SIZE ; Shift stack for bounds check
906 subi r1,r9,FM_REDZONE ; Back up beyond the red zone
907 sub r5,r5,r10 ; Get displacement into stack
908 cmplwi r5,INTSTACK_SIZE-FM_SIZE ; Is the stack actually invalid?
909 blt+ ihsetback ; The stack is ok...
910
911 lwz r5,PP_DEBSTACK_TOP_SS(r25) ; Pick up debug stack top
912 subi r5,r5,KERNEL_STACK_SIZE-FM_SIZE ; Adjust to start of stack
913 sub r5,r1,r5 ; Get displacement into debug stack
914 cmplwi cr2,r5,KERNEL_STACK_SIZE-FM_SIZE ; Check if we are on debug stack
915 blt+ ihsetback ; Yeah, that is ok too...
916
917 lis r0,hi16(Choke) ; Choke code
918 ori r0,r0,lo16(Choke) ; and the rest
919 li r3,failStack ; Bad stack code
920 sc ; System ABEND
921
922 .align 5
923
924 .L_istackfree:
925 lwz r10,SAVflags(r4)
926 stw r0,PP_ISTACKPTR(r25) ; Mark the stack in use
927 oris r10,r10,HIGH_ADDR(SAVrststk) ; Indicate we reset stack when we return from this one
928 stw r10,SAVflags(r4) ; Stick it back
929
930 /*
931 * To summarize, when we reach here, the state has been saved and
932 * the stack is marked as busy. We now generate a small
933 * stack frame with backpointers to follow the calling
934 * conventions. We set up the backpointers to the trapped
935 * routine allowing us to backtrace.
936 */
937
938 ihsetback: subi r1,r1,FM_SIZE ; Make a new frame
939 stw r9,FM_BACKPTR(r1) ; Point back to previous stackptr
940
941 #if VERIFYSAVE
942 beq- cr1,ihbootnover ; (TEST/DEBUG)
943 bl versave ; (TEST/DEBUG)
944 ihbootnover: ; (TEST/DEBUG)
945 #endif
946
947 #if DEBUG
948 /* If debugging, we need two frames, the first being a dummy
949 * which links back to the trapped routine. The second is
950 * that which the C routine below will need
951 */
952 lwz r5,savesrr0(r4) ; Get interrupt address
953 stw r5,FM_LR_SAVE(r1) ; save old instr ptr as LR value
954 stwu r1,-FM_SIZE(r1) ; Make another new frame for C routine
955 #endif /* DEBUG */
956
957 lwz r5,savedsisr(r4) ; Get the DSISR
958 lwz r6,savedar(r4) ; Get the DAR
959
960 bl EXT(interrupt)
961
962
963 /* interrupt() returns a pointer to the saved state in r3
964 *
965 * Ok, back from C. Disable interrupts while we restore things
966 */
967 .globl EXT(ihandler_ret)
968
969 LEXT(ihandler_ret) ; Marks our return point from debugger entry
970
971 mfmsr r0 ; Get our MSR
972 rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
973 rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
974 rlwinm r0,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Flip off the interrupt enabled bit
975 mtmsr r0 ; Make sure interrupts are disabled
976 mfsprg r10,0 ; Get the per_proc block
977
978 lwz r7,SAVflags(r3) ; Pick up the flags
979 lwz r8,PP_ACTIVE_THREAD(r10) ; and the active thread
980 lwz r9,SAVprev(r3) ; Get previous save area
981 cmplwi cr1,r8,0 ; Are we still initializing?
982 lwz r12,savesrr1(r3) ; Get the MSR we will load on return
983 beq- cr1,ihboot2 ; Skip if we are still in init...
984 lwz r8,THREAD_TOP_ACT(r8) ; Pick up the active thread
985
986 ihboot2: andis. r11,r7,hi16(SAVrststk) ; Is this the first on the stack?
987 beq- cr1,ihboot3 ; Skip if we are still in init...
988 stw r9,ACT_MACT_PCB(r8) ; Point to previous context savearea
989
990 ihboot3: mr r4,r3 ; Move the savearea pointer
991 beq .L_no_int_ast2 ; Get going if not the top-o-stack...
992
993
994 /* We're the last frame on the stack. Restore istackptr to empty state.
995 *
996 * Check for ASTs if one of the below is true:
997 * returning to user mode
998 * returning to a kloaded server
999 */
1000 lwz r9,PP_INTSTACK_TOP_SS(r10) ; Get the empty stack value
1001 andc r7,r7,r11 ; Remove the stack reset bit in case we pass this one
1002 stw r9,PP_ISTACKPTR(r10) ; Save that saved state ptr
1003 lwz r3,PP_PREEMPT_CNT(r10) ; Get preemption level
1004 stw r7,SAVflags(r4) ; Save the flags
1005 cmplwi r3, 0 ; Check for preemption
1006 bne .L_no_int_ast ; Do not preempt if level is not zero
1007 andi. r6,r12,MASK(MSR_PR) ; privilege mode
1008 lwz r11,PP_NEED_AST(r10) ; Get the AST request address
1009 lwz r11,0(r11) ; Get the request
1010 beq- .L_kernel_int_ast ; In kernel space, AST_URGENT check
1011 li r3,T_AST ; Assume the worst
1012 mr. r11,r11 ; Are there any pending?
1013 beq .L_no_int_ast ; Nope...
1014 b .L_call_thandler
1015
1016 .L_kernel_int_ast:
1017 andi. r11,r11,AST_URGENT ; Do we have AST_URGENT?
1018 li r3,T_PREEMPT ; Assume the worst
1019 beq .L_no_int_ast ; Nope...
1020
1021 /*
1022 * There is a pending AST. Massage things to make it look like
1023 * we took a trap and jump into the trap handler. To do this
1024 * we essentially pretend to return from the interrupt but
1025 * at the last minute jump into the trap handler with an AST
1026 * trap instead of performing an rfi.
1027 */
1028
1029 .L_call_thandler:
1030 stw r3,saveexception(r4) ; Set the exception code to T_AST/T_PREEMPT
1031 b EXT(thandler) ; We need to preempt so treat like a trap...
1032
1033 .L_no_int_ast:
1034 mr r3,r4 ; Get into the right register for common code
1035
1036 .L_no_int_ast2:
1037 rlwinm r7,r7,0,15,13 ; Clear the syscall flag
1038 li r4,0 ; Assume for a moment that we are in init
1039 stw r7,SAVflags(r3) ; Set the flags with cleared syscall flag
1040 beq- cr1,chkfac ; Jump away if we are in init...
1041
1042 lwz r4,ACT_MACT_PCB(r8) ; Get the new level marker
1043
1044
1045 ;
1046 ; This section is common to all exception exits. It throws away vector
1047 ; and floating point saveareas as the exception level of a thread is
1048 ; exited.
1049 ;
1050 ; It also enables the facility if its context is live
1051 ; Requires:
1052 ; R3 = Savearea to be released (virtual)
1053 ; R4 = New top of savearea stack (could be 0)
1054 ; R8 = pointer to activation
1055 ; R10 = per_proc block
1056 ;
1057 ; Note that barring unforseen crashes, there is no escape from this point
1058 ; on. We WILL call exception_exit and launch this context. No worries
1059 ; about preemption or interruptions here.
1060 ;
1061 ; Note that we will set up R26 with whatever context we will be launching,
1062 ; so it will indicate the current, or the deferred it it is set and we
1063 ; are going to user state. CR2_eq will be set to indicate deferred.
1064 ;
1065
1066 chkfac: mr r31,r10 ; Move per_proc address
1067 mr r30,r4 ; Preserve new level
1068 lwz r29,savesrr1(r3) ; Get the current MSR
1069 mr. r28,r8 ; Are we still in boot?
1070 mr r27,r3 ; Save the old level
1071 beq- chkenax ; Yeah, skip it all...
1072
1073 rlwinm. r0,r29,0,MSR_PR_BIT,MSR_PR_BIT ; Are we going into user state?
1074
1075 #if 0
1076 beq+ lllll ; (TEST/DEBUG)
1077 BREAKPOINT_TRAP ; (TEST/DEBUG)
1078 lllll:
1079 #endif
1080
1081 lwz r20,curctx(r28) ; Get our current context
1082 lwz r26,deferctx(r28) ; Get any deferred context switch
1083 rlwinm r29,r29,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Turn off floating point for now
1084 lwz r21,FPUlevel(r20) ; Get the facility level
1085 cmplwi cr2,r26,0 ; Are we going into a deferred context later?
1086 rlwinm r29,r29,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Turn off vector for now
1087 crnor cr2_eq,cr0_eq,cr2_eq ; Set cr2_eq if going to user state and there is deferred
1088 cmplw r27,r21 ; Are we returning from the active level?
1089 lhz r19,PP_CPU_NUMBER(r31) ; Get our CPU number
1090 bne+ fpuchkena ; Nope...
1091
1092 ;
1093 ; First clean up any live context we are returning from
1094 ;
1095
1096 lwz r22,FPUcpu(r20) ; Get CPU this context was last dispatched on
1097
1098 stw r19,FPUcpu(r20) ; Claim context for us
1099
1100 eieio ; Make sure this gets out before owner clear
1101
1102 lis r23,hi16(EXT(per_proc_info)) ; Set base per_proc
1103 mulli r22,r22,ppSize ; Find offset to the owner per_proc
1104 ori r23,r23,lo16(EXT(per_proc_info)) ; Set base per_proc
1105 li r24,FPUowner ; Displacement to FPU owner
1106 add r22,r23,r22 ; Point to the owner per_proc
1107 li r0,0 ; We need this in a bit
1108
1109 fpuinvothr: lwarx r23,r24,r22 ; Get the owner
1110 cmplw r23,r20 ; Does he still have this context?
1111 bne fpuinvoths ; Nope...
1112 stwcx. r0,r24,r22 ; Try to invalidate it
1113 bne- fpuinvothr ; Try again if there was a collision...
1114
1115 fpuinvoths: isync
1116
1117 ;
1118 ; Now if there is a savearea associated with the popped context, release it.
1119 ; Either way, pop the level to the top stacked context.
1120 ;
1121
1122 lwz r22,FPUsave(r20) ; Get pointer to the first savearea
1123 li r21,0 ; Assume we popped all the way out
1124 mr. r22,r22 ; Is there anything there?
1125 beq+ fpusetlvl ; No, see if we need to enable...
1126
1127 lwz r21,SAVlevel(r22) ; Get the level of that savearea
1128 cmplw r21,r27 ; Is this the saved copy of the live stuff?
1129 bne fpusetlvl ; No, leave as is...
1130
1131 lwz r24,SAVprev(r22) ; Pick up the previous area
1132 li r21,0 ; Assume we popped all the way out
1133 mr. r24,r24 ; Any more context stacked?
1134 beq- fpuonlyone ; Nope...
1135 lwz r21,SAVlevel(r24) ; Get the level associated with save
1136
1137 fpuonlyone: stw r24,FPUsave(r20) ; Dequeue this savearea
1138
1139 rlwinm r3,r22,0,0,19 ; Find main savearea header
1140 lwz r3,SACvrswap(r3) ; Get the virtual to real conversion
1141 la r9,quickfret(r31) ; Point to the quickfret chain header
1142 xor r3,r22,r3 ; Convert to physical
1143
1144 #if FPVECDBG
1145 lis r0,HIGH_ADDR(CutTrace) ; (TEST/DEBUG)
1146 li r2,0x3301 ; (TEST/DEBUG)
1147 oris r0,r0,LOW_ADDR(CutTrace) ; (TEST/DEBUG)
1148 sc ; (TEST/DEBUG)
1149 #endif
1150
1151 fpufpucdq: lwarx r0,0,r9 ; Pick up the old chain head
1152 stw r0,SAVprev(r22) ; Move it to the current guy
1153 stwcx. r3,0,r9 ; Save it
1154 bne- fpufpucdq ; Someone chaged the list...
1155
1156 fpusetlvl: stw r21,FPUlevel(r20) ; Save the level
1157
1158 ;
1159 ; Here we check if we are at the right level
1160 ; We need to check the level we are entering, not the one we are exiting.
1161 ; Therefore, we will use the defer level if it is non-zero and we are
1162 ; going into user state.
1163 ;
1164
1165 fpuchkena: bt- cr2_eq,fpuhasdfrd ; Skip if deferred, R26 already set up...
1166 mr r26,r20 ; Use the non-deferred value
1167
1168 fpuhasdfrd: lwz r21,FPUowner(r31) ; Get the ID of the live context
1169 lwz r23,FPUlevel(r26) ; Get the level ID
1170 cmplw cr3,r26,r21 ; Do we have the live context?
1171 lwz r24,FPUcpu(r26) ; Get the CPU that the context was last dispatched on
1172 bne- cr3,chkvec ; No, can not possibly enable...
1173 cmplw r30,r23 ; Are we about to launch the live level?
1174 cmplw cr1,r19,r24 ; Was facility used on this processor last?
1175 bne- chkvec ; No, not live...
1176 bne- cr1,chkvec ; No, wrong cpu, have to enable later....
1177
1178 lwz r24,FPUsave(r26) ; Get the first savearea
1179 mr. r24,r24 ; Any savearea?
1180 beq+ fpuena ; Nope...
1181 lwz r25,SAVlevel(r24) ; Get the level of savearea
1182 lwz r0,SAVprev(r24) ; Get the previous
1183 cmplw r30,r25 ; Is savearea for the level we are launching?
1184 bne+ fpuena ; No, just go enable...
1185
1186 stw r0,FPUsave(r26) ; Pop the chain
1187
1188 rlwinm r3,r24,0,0,19 ; Find main savearea header
1189 lwz r3,SACvrswap(r3) ; Get the virtual to real conversion
1190 la r9,quickfret(r31) ; Point to the quickfret chain header
1191 xor r3,r24,r3 ; Convert to physical
1192
1193 #if FPVECDBG
1194 lis r0,HIGH_ADDR(CutTrace) ; (TEST/DEBUG)
1195 li r2,0x3302 ; (TEST/DEBUG)
1196 oris r0,r0,LOW_ADDR(CutTrace) ; (TEST/DEBUG)
1197 sc ; (TEST/DEBUG)
1198 #endif
1199
1200 fpuhascdq: lwarx r0,0,r9 ; Pick up the old chain head
1201 stw r0,SAVprev(r24) ; Move it to the current guy
1202 stwcx. r3,0,r9 ; Save it
1203 bne- fpuhascdq ; Someone chaged the list...
1204
1205 fpuena: ori r29,r29,lo16(MASK(MSR_FP)) ; Enable facility
1206
1207 chkvec:
1208
1209 #if 0
1210 rlwinm. r21,r29,0,MSR_PR_BIT,MSR_PR_BIT ; (TEST/DEBUG)
1211 beq+ ppppp ; (TEST/DEBUG)
1212 lwz r21,FPUlevel(r26) ; (TEST/DEBUG)
1213 mr. r21,r21 ; (TEST/DEBUG)
1214 bne- qqqqq ; (TEST/DEBUG)
1215 lwz r21,FPUsave(r26) ; (TEST/DEBUG)
1216 mr. r21,r21 ; (TEST/DEBUG)
1217 beq+ ppppp ; (TEST/DEBUG)
1218 lwz r22,SAVlevel(r21) ; (TEST/DEBUG)
1219 mr. r22,r22 ; (TEST/DEBUG)
1220 beq+ ppppp ; (TEST/DEBUG)
1221 qqqqq:
1222 BREAKPOINT_TRAP ; (TEST/DEBUG)
1223
1224 ppppp: ; (TEST/DEBUG)
1225 #endif
1226
1227 lwz r21,VMXlevel(r20) ; Get the facility level
1228
1229 cmplw r27,r21 ; Are we returning from the active level?
1230 bne+ vmxchkena ; Nope...
1231
1232
1233 ;
1234 ; First clean up any live context we are returning from
1235 ;
1236
1237 lwz r22,VMXcpu(r20) ; Get CPU this context was last dispatched on
1238
1239 stw r19,VMXcpu(r20) ; Claim context for us
1240
1241 eieio ; Make sure this gets out before owner clear
1242
1243 lis r23,hi16(EXT(per_proc_info)) ; Set base per_proc
1244 mulli r22,r22,ppSize ; Find offset to the owner per_proc
1245 ori r23,r23,lo16(EXT(per_proc_info)) ; Set base per_proc
1246 li r24,VMXowner ; Displacement to VMX owner
1247 add r22,r23,r22 ; Point to the owner per_proc
1248 li r0,0 ; We need this in a bit
1249
1250 vmxinvothr: lwarx r23,r24,r22 ; Get the owner
1251 cmplw r23,r20 ; Does he still have this context?
1252 bne vmxinvoths ; Nope...
1253 stwcx. r0,r24,r22 ; Try to invalidate it
1254 bne- vmxinvothr ; Try again if there was a collision...
1255
1256 vmxinvoths: isync
1257
1258 ;
1259 ; Now if there is a savearea associated with the popped context, release it.
1260 ; Either way, pop the level to the top stacked context.
1261 ;
1262
1263 lwz r22,VMXsave(r20) ; Get pointer to the first savearea
1264 li r21,0 ; Assume we popped all the way out
1265 mr. r22,r22 ; Is there anything there?
1266 beq+ vmxsetlvl ; No, see if we need to enable...
1267
1268 lwz r21,SAVlevel(r22) ; Get the level of that savearea
1269 cmplw r21,r27 ; Is this the saved copy of the live stuff?
1270 bne vmxsetlvl ; No, leave as is...
1271
1272 lwz r24,SAVprev(r22) ; Pick up the previous area
1273 li r21,0 ; Assume we popped all the way out
1274 mr. r24,r24 ; Any more context?
1275 beq- vmxonlyone ; Nope...
1276 lwz r21,SAVlevel(r24) ; Get the level associated with save
1277
1278 vmxonlyone: stw r24,VMXsave(r20) ; Dequeue this savearea
1279
1280 rlwinm r3,r22,0,0,19 ; Find main savearea header
1281 lwz r3,SACvrswap(r3) ; Get the virtual to real conversion
1282 la r9,quickfret(r31) ; Point to the quickfret chain header
1283 xor r3,r22,r3 ; Convert to physical
1284
1285 #if FPVECDBG
1286 lis r0,HIGH_ADDR(CutTrace) ; (TEST/DEBUG)
1287 li r2,0x3401 ; (TEST/DEBUG)
1288 oris r0,r0,LOW_ADDR(CutTrace) ; (TEST/DEBUG)
1289 sc ; (TEST/DEBUG)
1290 #endif
1291
1292 vmxhscdq: lwarx r0,0,r9 ; Pick up the old chain head
1293 stw r0,SAVprev(r22) ; Move it to the current guy
1294 stwcx. r3,0,r9 ; Save it
1295 bne- vmxhscdq ; Someone chaged the list...
1296
1297 vmxsetlvl: stw r21,VMXlevel(r20) ; Save the level
1298
1299 ;
1300 ; Here we check if we are at the right level
1301 ;
1302
1303 vmxchkena: lwz r21,VMXowner(r31) ; Get the ID of the live context
1304 lwz r23,VMXlevel(r26) ; Get the level ID
1305 cmplw r26,r21 ; Do we have the live context?
1306 lwz r24,VMXcpu(r26) ; Get the CPU that the context was last dispatched on
1307 bne- setena ; No, can not possibly enable...
1308 cmplw r30,r23 ; Are we about to launch the live level?
1309 cmplw cr1,r19,r24 ; Was facility used on this processor last?
1310 bne- setena ; No, not live...
1311 bne- cr1,setena ; No, wrong cpu, have to enable later....
1312
1313 lwz r24,VMXsave(r26) ; Get the first savearea
1314 mr. r24,r24 ; Any savearea?
1315 beq+ vmxena ; Nope...
1316 lwz r25,SAVlevel(r24) ; Get the level of savearea
1317 lwz r0,SAVprev(r24) ; Get the previous
1318 cmplw r30,r25 ; Is savearea for the level we are launching?
1319 bne+ vmxena ; No, just go enable...
1320
1321 stw r0,VMXsave(r26) ; Pop the chain
1322
1323 rlwinm r3,r24,0,0,19 ; Find main savearea header
1324 lwz r3,SACvrswap(r3) ; Get the virtual to real conversion
1325 la r9,quickfret(r31) ; Point to the quickfret chain header
1326 xor r3,r24,r3 ; Convert to physical
1327
1328 #if FPVECDBG
1329 lis r0,HIGH_ADDR(CutTrace) ; (TEST/DEBUG)
1330 li r2,0x3402 ; (TEST/DEBUG)
1331 oris r0,r0,LOW_ADDR(CutTrace) ; (TEST/DEBUG)
1332 sc ; (TEST/DEBUG)
1333 #endif
1334
1335 vmxckcdq: lwarx r0,0,r9 ; Pick up the old chain head
1336 stw r0,SAVprev(r24) ; Move it to the current guy
1337 stwcx. r3,0,r9 ; Save it
1338 bne- vmxckcdq ; Someone chaged the list...
1339
1340 vmxena: oris r29,r29,hi16(MASK(MSR_VEC)) ; Enable facility
1341
1342
1343 setena: rlwinm. r0,r29,0,MSR_PR_BIT,MSR_PR_BIT ; Are we about to launch user state?
1344 rlwinm r20,r29,(((31-vectorCngbit)+(MSR_VEC_BIT+1))&31),vectorCngbit,vectorCngbit ; Set flag if we enabled vector
1345 stw r29,savesrr1(r27) ; Turn facility on or off
1346 crmove cr7_eq,cr0_eq ; Remember if we are going to user state
1347 lwz r19,deferctx(r28) ; Get any deferred facility context switch
1348 rlwimi. r20,r29,(((31-floatCngbit)+(MSR_FP_BIT+1))&31),floatCngbit,floatCngbit ; Set flag if we enabled floats
1349 beq setenaa ; Neither float nor vector turned on....
1350
1351 lwz r5,ACT_MACT_SPF(r28) ; Get activation copy
1352 lwz r6,spcFlags(r31) ; Get per_proc copy
1353 or r5,r5,r20 ; Set vector/float changed bits in activation
1354 or r6,r6,r20 ; Set vector/float changed bits in per_proc
1355 stw r5,ACT_MACT_SPF(r28) ; Set activation copy
1356 stw r6,spcFlags(r31) ; Set per_proc copy
1357
1358 setenaa: mfdec r24 ; Get decrementer
1359 bf+ cr2_eq,nodefer ; No deferred to switch to...
1360
1361 li r20,0 ; Clear this
1362 stw r26,curctx(r28) ; Make the facility context current
1363 stw r20,deferctx(r28) ; Clear deferred context
1364
1365 nodefer: lwz r22,qactTimer(r28) ; Get high order quick activation timer
1366 mr. r24,r24 ; See if it has popped already...
1367 lwz r23,qactTimer+4(r28) ; Get low order qact timer
1368 ble- chkenax ; We have popped or are just about to...
1369
1370 segtb: mftbu r20 ; Get the upper time base
1371 mftb r21 ; Get the low
1372 mftbu r19 ; Get upper again
1373 or. r0,r22,r23 ; Any time set?
1374 cmplw cr1,r20,r19 ; Did they change?
1375 beq+ chkenax ; No time set....
1376 bne- cr1,segtb ; Timebase ticked, get them again...
1377
1378 subfc r6,r21,r23 ; Subtract current from qact time
1379 li r0,0 ; Make a 0
1380 subfe r5,r20,r22 ; Finish subtract
1381 subfze r0,r0 ; Get a 0 if qact was bigger than current, -1 otherwise
1382 andc. r12,r5,r0 ; Set 0 if qact has passed
1383 andc r13,r6,r0 ; Set 0 if qact has passed
1384 bne chkenax ; If high order is non-zero, this is too big for a decrementer
1385 cmplw r13,r24 ; Is this earlier than the decrementer? (logical compare takes care of high bit on)
1386 bge+ chkenax ; No, do not reset decrementer...
1387
1388 mtdec r13 ; Set our value
1389
1390 chkenax:
1391
1392
1393 #if DEBUG
1394 lwz r20,SAVact(r27) ; (TEST/DEBUG) Make sure our restore
1395 lwz r21,PP_ACTIVE_THREAD(r31) ; (TEST/DEBUG) with the current act.
1396 cmpwi r21,0 ; (TEST/DEBUG)
1397 beq- yeswereok ; (TEST/DEBUG)
1398 lwz r21,THREAD_TOP_ACT(r21) ; (TEST/DEBUG)
1399 cmplw r21,r20 ; (TEST/DEBUG)
1400 beq+ yeswereok ; (TEST/DEBUG)
1401
1402 lis r0,hi16(Choke) ; (TEST/DEBUG) Choke code
1403 ori r0,r0,lo16(Choke) ; (TEST/DEBUG) and the rest
1404 mr r21,r27 ; (TEST/DEBUG) Save the savearea address
1405 li r3,failContext ; (TEST/DEBUG) Bad state code
1406 sc ; (TEST/DEBUG) System ABEND
1407
1408 yeswereok:
1409 #endif
1410
1411 rlwinm r5,r27,0,0,19 ; Round savearea down to page bndry
1412 lwz r5,SACvrswap(r5) ; Get the conversion from virtual to real
1413 xor r3,r27,r5 ; Flip to physical address
1414 b EXT(exception_exit) ; We are all done now...
1415
1416
1417
1418 /*
1419 * Here's where we handle the fastpath stuff
1420 * We'll do what we can here because registers are already
1421 * loaded and it will be less confusing that moving them around.
1422 * If we need to though, we'll branch off somewhere's else.
1423 *
1424 * Registers when we get here:
1425 *
1426 * r0 = syscall number
1427 * r4 = savearea/pcb
1428 * r13 = activation
1429 * r14 = previous savearea (if any)
1430 * r16 = thread
1431 * r25 = per_proc
1432 */
1433
1434 .align 5
1435
1436 fastpath: cmplwi cr3,r0,0x7FF1 ; Is it CthreadSetSelfNumber?
1437 bnelr- cr3 ; Not a fast path...
1438
1439 /*
1440 * void cthread_set_self(cproc_t p)
1441 *
1442 * set's thread state "user_value"
1443 *
1444 * This op is invoked as follows:
1445 * li r0, CthreadSetSelfNumber // load the fast-trap number
1446 * sc // invoke fast-trap
1447 * blr
1448 *
1449 */
1450
1451 CthreadSetSelfNumber:
1452
1453 lwz r5,saver3(r4) /* Retrieve the self number */
1454 stw r5,CTHREAD_SELF(r13) /* Remember it */
1455 stw r5,UAW(r25) /* Prime the per_proc_info with it */
1456
1457
1458 .globl EXT(fastexit)
1459 EXT(fastexit):
1460 rlwinm r9,r4,0,0,19 /* Round down to the base savearea block */
1461 lwz r9,SACvrswap(r9) /* Get the conversion from virtual to real */
1462 xor r3,r4,r9 /* Switch savearea to physical addressing */
1463 b EXT(exception_exit) /* Go back to the caller... */
1464
1465
1466 /*
1467 * Here's where we check for a hit on the Blue Box Assist
1468 * Most registers are non-volatile, so be careful here. If we don't
1469 * recognize the trap instruction we go back for regular processing.
1470 * Otherwise we transfer to the assist code.
1471 */
1472
1473 .align 5
1474
1475 checkassist:
1476 lwz r0,saveexception(r4) ; Get the exception code
1477 lwz r23,savesrr1(r4) ; Get the interrupted MSR
1478 lwz r26,ACT_MACT_BEDA(r13) ; Get Blue Box Descriptor Area
1479 mtcrf 0x18,r23 ; Check what SRR1 says
1480 lwz r24,ACT_MACT_BTS(r13) ; Get the table start
1481 cmplwi r0,T_AST ; Check for T_AST trap
1482 lwz r27,savesrr0(r4) ; Get trapped address
1483 crnand cr1_eq,SRR1_PRG_TRAP_BIT,MSR_PR_BIT ; We need both trap and user state
1484 sub r24,r27,r24 ; See how far into it we are
1485 cror cr0_eq,cr0_eq,cr1_eq ; Need to bail if AST or not trap or not user state
1486 cmplwi cr1,r24,BB_MAX_TRAP ; Do we fit in the list?
1487 cror cr0_eq,cr0_eq,cr1_gt ; Also leave it trap not in range
1488 btlr- cr0_eq ; No assist if AST or not trap or not user state or trap not in range
1489 b EXT(atomic_switch_trap) ; Go to the assist...
1490
1491 ;
1492 ; Virtual Machine Monitor
1493 ; Here is where we exit from the emulated context
1494 ; Note that most registers get trashed here
1495 ; R3 and R30 are preserved across the call and hold the activation
1496 ; and savearea respectivily.
1497 ;
1498
1499 .align 5
1500
1501 exitFromVM: mr r30,r4 ; Get the savearea
1502 mr r3,r13 ; Get the activation
1503
1504 b EXT(vmm_exit) ; Do it to it
1505
1506 .align 5
1507 .globl EXT(retFromVM)
1508
1509 LEXT(retFromVM)
1510 mfsprg r10,0 ; Restore the per_proc info
1511 mr r8,r3 ; Get the activation
1512 lwz r4,SAVprev(r30) ; Pick up the previous savearea
1513 mr r3,r30 ; Put savearea in proper register for common code
1514 lwz r11,SAVflags(r30) ; Get the flags of the current savearea
1515 rlwinm r11,r11,0,15,13 ; Clear the syscall flag
1516 lwz r1,ACT_THREAD(r8) ; and the active thread
1517 stw r11,SAVflags(r3) ; Save back the flags (with reset stack cleared)
1518
1519 stw r4,ACT_MACT_PCB(r8) ; Point to the previous savearea (or 0 if none)
1520
1521 lwz r5,THREAD_KERNEL_STACK(r1) ; Get the base pointer to the stack
1522 addi r5,r5,KERNEL_STACK_SIZE-FM_SIZE ; Reset to empty
1523 stw r5,ACT_MACT_KSP(r8) ; Save the empty stack pointer
1524 b chkfac ; Go end it all...
1525
1526
1527 ;
1528 ; chandler (note: not a candle maker or tallow merchant)
1529 ;
1530 ; Here is the system choke handler. This is where the system goes
1531 ; to die.
1532 ;
1533 ; We get here as a result of a T_CHOKE exception which is generated
1534 ; by the Choke firmware call or by lowmem_vectors when it detects a
1535 ; fatal error. Examples of where this may be used is when we detect
1536 ; problems in low-level mapping chains, trashed savearea free chains,
1537 ; or stack guardpage violations.
1538 ;
1539 ; Note that we can not set a back chain in the stack when we come
1540 ; here because we are probably here because the chain was corrupt.
1541 ;
1542
1543
1544 .align 5
1545 .globl EXT(chandler)
1546 LEXT(chandler) /* Choke handler */
1547
1548 lis r25,hi16(EXT(trcWork)) ; (TEST/DEBUG)
1549 li r31,0 ; (TEST/DEBUG)
1550 ori r25,r25,lo16(EXT(trcWork)) ; (TEST/DEBUG)
1551 stw r31,traceMask(r25) ; (TEST/DEBUG)
1552
1553
1554 mfsprg r25,0 ; Get the per_proc
1555
1556 lwz r1,PP_DEBSTACKPTR(r25) ; Get debug stack pointer
1557 cmpwi r1,-1 ; Are we already choking?
1558 bne chokefirst ; Nope...
1559
1560 chokespin: addi r31,r31,1 ; Spin and hope for an analyzer connection...
1561 addi r31,r31,1 ; Spin and hope for an analyzer connection...
1562 addi r31,r31,1 ; Spin and hope for an analyzer connection...
1563 addi r31,r31,1 ; Spin and hope for an analyzer connection...
1564 addi r31,r31,1 ; Spin and hope for an analyzer connection...
1565 addi r31,r31,1 ; Spin and hope for an analyzer connection...
1566 b chokespin ; Spin and hope for an analyzer connection...
1567
1568 chokefirst: li r0,-1 ; Set choke value
1569 mr. r1,r1 ; See if we are on debug stack yet
1570 lwz r10,saver1(r4) ;
1571 stw r0,PP_DEBSTACKPTR(r25) ; Show we are choking
1572 bne chokestart ; We are not on the debug stack yet...
1573
1574 lwz r2,PP_DEBSTACK_TOP_SS(r25) ; Get debug stack top
1575 sub r11,r2,r10 ; Get stack depth
1576
1577 cmplwi r11,KERNEL_STACK_SIZE-FM_SIZE-TRAP_SPACE_NEEDED ; Check if stack pointer is ok
1578 bgt chokespin ; Bad stack pointer or too little left, just die...
1579
1580 subi r1,r10,FM_REDZONE ; Make a red zone
1581
1582 chokestart: li r0,0 ; Get a zero
1583 stw r0,FM_BACKPTR(r1) ; We now have terminated the back chain
1584
1585 bl EXT(SysChoked) ; Call the "C" phase of this
1586 b chokespin ; Should not be here so just go spin...
1587
1588
1589 #if VERIFYSAVE
1590 ;
1591 ; Savearea chain verification
1592 ;
1593
1594 versave:
1595 #if 1
1596 ;
1597 ; Make sure that all savearea chains have the right type on them
1598 ;
1599
1600 lis r28,hi16(EXT(default_pset)) ; (TEST/DEBUG)
1601 lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG)
1602 ori r28,r28,lo16(EXT(default_pset)) ; (TEST/DEBUG)
1603 ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG)
1604 li r20,0 ; (TEST/DEBUG)
1605 lwz r26,0(r27) ; (TEST/DEBUG)
1606 lwz r27,psthreadcnt(r28) ; (TEST/DEBUG)
1607 mr. r26,r26 ; (TEST/DEBUG) Have we locked the test out?
1608 lwz r28,psthreads(r28) ; (TEST/DEBUG)
1609 mflr r31 ; (TEST/DEBUG) Save return
1610 bnelr- ; (TEST/DEBUG) Test already triggered, skip...
1611 b fckgo ; (TEST/DEBUG) Join up...
1612
1613 fcknext: mr. r27,r27 ; (TEST/DEBUG) Any more threads?
1614 bne+ fckxxx ; (TEST/DEBUG) Yes...
1615
1616 mtlr r31 ; (TEST/DEBUG) Restore return
1617 blr ; (TEST/DEBUG) Leave...
1618
1619 fckxxx: lwz r28,THREAD_PSTHRN(r28) ; (TEST/DEBUG) Get next thread
1620
1621 fckgo: subi r27,r27,1 ; (TEST/DEBUG) Decrement thread count
1622 lwz r24,THREAD_TOP_ACT(r28) ; (TEST/DEBUG) Get activation for the thread
1623 lwz r20,ACT_MACT_PCB(r24) ; (TEST/DEBUG) Get the normal context
1624 li r21,SAVgeneral ; (TEST/DEBUG) Make sure this is all general context
1625 bl versavetype ; (TEST/DEBUG) Check the chain
1626
1627 lwz r20,facctx+FPUsave(r24) ; (TEST/DEBUG) Get regular floating point
1628 li r21,SAVfloat ; (TEST/DEBUG) Make sure this is all floating point
1629 bl versavetype ; (TEST/DEBUG) Check the chain
1630
1631 lwz r20,facctx+VMXsave(r24) ; (TEST/DEBUG) Get regular vector point
1632 li r21,SAVvector ; (TEST/DEBUG) Make sure this is all vector
1633 bl versavetype ; (TEST/DEBUG) Check the chain
1634
1635 lwz r29,vmmControl(r24) ; (TEST/DEBUG) Get the virtual machine control blocks
1636 mr. r29,r29 ; (TEST/DEBUG) Are there any?
1637 beq+ fcknext ; (TEST/DEBUG) Nope, next thread...
1638
1639 li r22,kVmmMaxContextsPerThread ; (TEST/DEBUG) Get the number of control blocks
1640 subi r29,r29,vmmCEntrySize ; (TEST/DEBUG) Get running start
1641
1642 fcknvmm: subi r22,r22,1 ; (TEST/DEBUG) Do all of them
1643 mr. r22,r22 ; (TEST/DEBUG) Are we all done?
1644 addi r29,r29,vmmCEntrySize ; (TEST/DEBUG) Get the next entry
1645 blt- fcknext ; (TEST/DEBUG) Yes, check next thread...
1646
1647 lwz r23,vmmFlags(r29) ; (TEST/DEBUG) Get entry flags
1648 rlwinm. r23,r23,0,0,0 ; (TEST/DEBUG) Is this in use?
1649 beq+ fcknvmm ; (TEST/DEBUG) Not in use...
1650
1651 lwz r20,vmmFacCtx+FPUsave(r29) ; (TEST/DEBUG) Get regular floating point
1652 li r21,SAVfloat ; (TEST/DEBUG) Make sure this is all floating point
1653 bl versavetype ; (TEST/DEBUG) Check the chain
1654
1655 lwz r20,vmmFacCtx+VMXsave(r29) ; (TEST/DEBUG) Get regular vector point
1656 li r21,SAVvector ; (TEST/DEBUG) Make sure this is all vector
1657 bl versavetype ; (TEST/DEBUG) Check the chain
1658 b fcknvmm ; (TEST/DEBUG) Get then vmm block...
1659
1660 versavetype:
1661 mr. r20,r20 ; (TEST/DEBUG) Chain done?
1662 beqlr- ; (TEST/DEBUG) Yes...
1663
1664 lwz r23,SAVflags(r20) ; (TEST/DEBUG) Get the flags
1665 rlwinm r23,r23,24,24,31 ; (TEST/DEBUG) Position it
1666 cmplw r23,r21 ; (TEST/DEBUG) Are we the correct type?
1667 beq+ versvok ; (TEST/DEBUG) This one is ok...
1668
1669 lis r22,hi16(EXT(DebugWork)) ; (TEST/DEBUG)
1670 ori r22,r22,lo16(EXT(DebugWork)) ; (TEST/DEBUG)
1671 stw r22,0(r22) ; (TEST/DEBUG) Lock out more checks
1672 BREAKPOINT_TRAP ; (TEST/DEBUG) Get into debugger
1673
1674 versvok: lwz r20,SAVprev(r20) ; (TEST/DEBUG) Get the previous one
1675 b versavetype ; (TEST/DEBUG) Go check its type...
1676 #endif
1677
1678 #if 0
1679 ;
1680 ; Make sure there are no circular links in the float chain
1681 ; And that FP is marked busy in it.
1682 ; And the only the top is marked invalid.
1683 ; And that the owning PCB is correct.
1684 ;
1685
1686 lis r28,hi16(EXT(default_pset)) ; (TEST/DEBUG)
1687 lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG)
1688 ori r28,r28,lo16(EXT(default_pset)) ; (TEST/DEBUG)
1689 ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG)
1690 li r20,0 ; (TEST/DEBUG)
1691 lwz r26,0(r27) ; (TEST/DEBUG)
1692 lwz r27,psthreadcnt(r28) ; (TEST/DEBUG)
1693 mr. r26,r26 ; (TEST/DEBUG)
1694 lwz r28,psthreads(r28) ; (TEST/DEBUG)
1695 bnelr- ; (TEST/DEBUG)
1696
1697 fcknxtth: mr. r27,r27 ; (TEST/DEBUG)
1698 beqlr- ; (TEST/DEBUG)
1699
1700 lwz r26,THREAD_TOP_ACT(r28) ; (TEST/DEBUG)
1701
1702 fckact: mr. r26,r26 ; (TEST/DEBUG)
1703 bne+ fckact2 ; (TEST/DEBUG)
1704
1705 lwz r28,THREAD_PSTHRN(r28) ; (TEST/DEBUG) Next in line
1706 subi r27,r27,1 ; (TEST/DEBUG)
1707 b fcknxtth ; (TEST/DEBUG)
1708
1709 fckact2: lwz r20,ACT_MACT_FPU(r26) ; (TEST/DEBUG) Get FPU chain
1710 li r29,1 ; (TEST/DEBUG)
1711 li r22,0 ; (TEST/DEBUG)
1712
1713 fckact3: mr. r20,r20 ; (TEST/DEBUG) Are there any?
1714 beq+ fckact5 ; (TEST/DEBUG) No...
1715
1716 addi r22,r22,1 ; (TEST/DEBUG) Count chain depth
1717
1718 lwz r21,SAVflags(r20) ; (TEST/DEBUG) Get the flags
1719 rlwinm. r21,r21,0,1,1 ; (TEST/DEBUG) FP busy?
1720 bne+ fckact3a ; (TEST/DEBUG) Yeah...
1721 lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG)
1722 ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG)
1723 stw r27,0(r27) ; (TEST/DEBUG)
1724 BREAKPOINT_TRAP ; (TEST/DEBUG) Die
1725
1726 fckact3a: cmplwi r22,1 ; (TEST/DEBUG) At first SA?
1727 beq+ fckact3b ; (TEST/DEBUG) Yeah, invalid is ok...
1728 lwz r21,SAVlvlfp(r20) ; (TEST/DEBUG) Get level
1729 cmplwi r21,1 ; (TEST/DEBUG) Is it invalid?
1730 bne+ fckact3b ; (TEST/DEBUG) Nope, it is ok...
1731 lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG)
1732 ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG)
1733 stw r27,0(r27) ; (TEST/DEBUG)
1734 BREAKPOINT_TRAP ; (TEST/DEBUG) Die
1735
1736 fckact3b: lwz r21,SAVact(r20) ; (TEST/DEBUG) Get the owner
1737 cmplw r21,r26 ; (TEST/DEBUG) Correct activation?
1738 beq+ fckact3c ; (TEST/DEBUG) Yup...
1739 lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG)
1740 ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG)
1741 stw r27,0(r27) ; (TEST/DEBUG)
1742 BREAKPOINT_TRAP ; (TEST/DEBUG) Die
1743
1744 fckact3c: ; (TEST/DEBUG)
1745 lbz r21,SAVflags+3(r20) ; (TEST/DEBUG) Pick up the test byte
1746 mr. r21,r21 ; (TEST/DEBUG) marked?
1747 beq+ fckact4 ; (TEST/DEBUG) No, good...
1748
1749 lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG)
1750 ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG)
1751 stw r27,0(r27) ; (TEST/DEBUG)
1752 BREAKPOINT_TRAP ; (TEST/DEBUG)
1753
1754 fckact4: stb r29,SAVflags+3(r20) ; (TEST/DEBUG) Set the test byte
1755 lwz r20,SAVprefp(r20) ; (TEST/DEBUG) Next in list
1756 b fckact3 ; (TEST/DEBUG) Try it...
1757
1758 fckact5: lwz r20,ACT_MACT_FPU(r26) ; (TEST/DEBUG) Get FPU chain
1759 li r29,0 ; (TEST/DEBUG)
1760
1761 fckact6: mr. r20,r20 ; (TEST/DEBUG) Are there any?
1762 beq+ fcknact ; (TEST/DEBUG) No...
1763
1764 stb r29,SAVflags+3(r20) ; (TEST/DEBUG) Clear the test byte
1765 lwz r20,SAVprefp(r20) ; (TEST/DEBUG) Next in list
1766 b fckact6 ; (TEST/DEBUG) Try it...
1767
1768 fcknact: lwz r26,ACT_LOWER(r26) ; (TEST/DEBUG) Next activation
1769 b fckact ; (TEST/DEBUG)
1770 #endif
1771
1772
1773 #if 0
1774 ;
1775 ; Make sure in use count matches found savearea. This is
1776 ; not always accurate. There is a variable "fuzz" factor in count.
1777
1778 lis r28,hi16(EXT(default_pset)) ; (TEST/DEBUG)
1779 lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG)
1780 ori r28,r28,lo16(EXT(default_pset)) ; (TEST/DEBUG)
1781 ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG)
1782 li r20,0 ; (TEST/DEBUG)
1783 lwz r26,0(r27) ; (TEST/DEBUG)
1784 lwz r27,psthreadcnt(r28) ; (TEST/DEBUG)
1785 mr. r26,r26 ; (TEST/DEBUG)
1786 lwz r28,psthreads(r28) ; (TEST/DEBUG)
1787 bnelr- ; (TEST/DEBUG)
1788
1789 cknxtth: mr. r27,r27 ; (TEST/DEBUG)
1790 beq- cktotal ; (TEST/DEBUG)
1791
1792 lwz r26,THREAD_TOP_ACT(r28) ; (TEST/DEBUG)
1793
1794 ckact: mr. r26,r26 ; (TEST/DEBUG)
1795 bne+ ckact2 ; (TEST/DEBUG)
1796
1797 lwz r28,THREAD_PSTHRN(r28) ; (TEST/DEBUG) Next in line
1798 subi r27,r27,1 ; (TEST/DEBUG)
1799 b cknxtth ; (TEST/DEBUG)
1800
1801 ckact2: lwz r29,ACT_MACT_PCB(r26) ; (TEST/DEBUG)
1802
1803 cknorm: mr. r29,r29 ; (TEST/DEBUG)
1804 beq- cknormd ; (TEST/DEBUG)
1805
1806 addi r20,r20,1 ; (TEST/DEBUG) Count normal savearea
1807
1808 lwz r29,SAVprev(r29) ; (TEST/DEBUG)
1809 b cknorm ; (TEST/DEBUG)
1810
1811 cknormd: lwz r29,ACT_MACT_FPU(r26) ; (TEST/DEBUG)
1812
1813 ckfpu: mr. r29,r29 ; (TEST/DEBUG)
1814 beq- ckfpud ; (TEST/DEBUG)
1815
1816 lwz r21,SAVflags(r29) ; (TEST/DEBUG)
1817 rlwinm. r21,r21,0,0,0 ; (TEST/DEBUG) See if already counted
1818 bne- cknfpu ; (TEST/DEBUG)
1819
1820 addi r20,r20,1 ; (TEST/DEBUG) Count fpu savearea
1821
1822 cknfpu: lwz r29,SAVprefp(r29) ; (TEST/DEBUG)
1823 b ckfpu ; (TEST/DEBUG)
1824
1825 ckfpud: lwz r29,ACT_MACT_VMX(r26) ; (TEST/DEBUG)
1826
1827 ckvmx: mr. r29,r29 ; (TEST/DEBUG)
1828 beq- ckvmxd ; (TEST/DEBUG)
1829
1830 lwz r21,SAVflags(r29) ; (TEST/DEBUG)
1831 rlwinm. r21,r21,0,0,1 ; (TEST/DEBUG) See if already counted
1832 bne- cknvmx ; (TEST/DEBUG)
1833
1834 addi r20,r20,1 ; (TEST/DEBUG) Count vector savearea
1835
1836 cknvmx: lwz r29,SAVprevec(r29) ; (TEST/DEBUG)
1837 b ckvmx ; (TEST/DEBUG)
1838
1839 ckvmxd: lwz r26,ACT_LOWER(r26) ; (TEST/DEBUG) Next activation
1840 b ckact ; (TEST/DEBUG)
1841
1842 cktotal: lis r28,hi16(EXT(saveanchor)) ; (TEST/DEBUG)
1843 lis r27,hi16(EXT(real_ncpus)) ; (TEST/DEBUG)
1844 ori r28,r28,lo16(EXT(saveanchor)) ; (TEST/DEBUG)
1845 ori r27,r27,lo16(EXT(real_ncpus)) ; (TEST/DEBUG)
1846
1847 lwz r21,SVinuse(r28) ; (TEST/DEBUG)
1848 lwz r27,0(r27) ; (TEST/DEBUG) Get the number of CPUs
1849 sub. r29,r21,r20 ; (TEST/DEBUG) Get number accounted for
1850 blt- badsave ; (TEST/DEBUG) Have too many in use...
1851 sub r26,r29,r27 ; (TEST/DEBUG) Should be 1 unaccounted for for each processor
1852 cmpwi r26,10 ; (TEST/DEBUG) Allow a 10 area slop factor
1853 bltlr+ ; (TEST/DEBUG)
1854
1855 badsave: lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG)
1856 ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG)
1857 stw r27,0(r27) ; (TEST/DEBUG)
1858 BREAKPOINT_TRAP ; (TEST/DEBUG)
1859 #endif
1860 #endif
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