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1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
43866e37 6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
1c79356b 7 *
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8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * file.
14 *
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
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19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
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22 *
23 * @APPLE_LICENSE_HEADER_END@
24 */
25/*
26 * @OSF_COPYRIGHT@
27 */
28#ifndef _PPC_ASM_H_
29#define _PPC_ASM_H_
30
31#define __ASMNL__ @
32#define STRINGD .ascii
33
34#ifdef ASSEMBLER
35
36
37#define br0 0
38
39#define ARG0 r3
40#define ARG1 r4
41#define ARG2 r5
42#define ARG3 r6
43#define ARG4 r7
44#define ARG5 r8
45#define ARG6 r9
46#define ARG7 r10
47
48#define tmp0 r0 /* Temporary GPR remapping (603e specific) */
49#define tmp1 r1
50#define tmp2 r2
51#define tmp3 r3
52
53/* SPR registers */
54
55#define mq 0 /* MQ register for 601 emulation */
56#define rtcu 4 /* RTCU - upper word of RTC for 601 emulation */
57#define rtcl 5 /* RTCL - lower word of RTC for 601 emulation */
58#define dsisr 18
59#define ppcDAR 19
60#define ppcdar 19
61#define dar 19
62#define SDR1 25
63#define sdr1 25
64#define srr0 26
65#define srr1 27
66#define vrsave 256 /* Vector Register save */
67#define sprg0 272
68#define sprg1 273
69#define sprg2 274
70#define sprg3 275
71#define pvr 287
72
73#define IBAT0U 528
74#define IBAT0L 529
75#define IBAT1U 530
76#define IBAT1L 531
77#define IBAT2U 532
78#define IBAT2L 533
79#define IBAT3U 534
80#define IBAT3L 535
81#define ibat0u 528
82#define ibat0l 529
83#define ibat1u 530
84#define ibat1l 531
85#define ibat2u 532
86#define ibat2l 533
87#define ibat3u 534
88#define ibat3l 535
89
90#define DBAT0U 536
91#define DBAT0L 537
92#define DBAT1U 538
93#define DBAT1L 539
94#define DBAT2U 540
95#define DBAT2L 541
96#define DBAT3U 542
97#define DBAT3L 543
98#define dbat0u 536
99#define dbat0l 537
100#define dbat1u 538
101#define dbat1l 539
102#define dbat2u 540
103#define dbat2l 541
104#define dbat3u 542
105#define dbat3l 543
106
107#define ummcr2 928 /* Performance monitor control */
108#define ubamr 935 /* Performance monitor mask */
109#define ummcr0 936 /* Performance monitor control */
110#define upmc1 937 /* Performance monitor counter */
111#define upmc2 938 /* Performance monitor counter */
112#define usia 939 /* User sampled instruction address */
113#define ummcr1 940 /* Performance monitor control */
114#define upmc3 941 /* Performance monitor counter */
115#define upmc4 942 /* Performance monitor counter */
116#define usda 943 /* User sampled data address */
117#define mmcr2 944 /* Performance monitor control */
118#define bamr 951 /* Performance monitor mask */
119#define mmcr0 952
120#define pmc1 953
121#define pmc2 954
122#define sia 955
123#define mmcr1 956
124#define pmc3 957
125#define pmc4 958
126#define sda 959 /* Sampled data address */
127#define dmiss 976 /* ea that missed */
128#define dcmp 977 /* compare value for the va that missed */
129#define hash1 978 /* pointer to first hash pteg */
130#define hash2 979 /* pointer to second hash pteg */
131#define imiss 980 /* ea that missed */
132#define tlbmiss 980 /* ea that missed */
133#define icmp 981 /* compare value for the va that missed */
134#define ptehi 981 /* compare value for the va that missed */
135#define rpa 982 /* required physical address register */
136#define ptelo 982 /* required physical address register */
137#define l3pdet 984 /* l3pdet */
138
139#define HID0 1008 /* Checkstop and misc enables */
140#define hid0 1008 /* Checkstop and misc enables */
141#define HID1 1009 /* Clock configuration */
142#define hid1 1009 /* Clock configuration */
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143#define HID2 1016 /* Other processor controls */
144#define hid2 1016 /* Other processor controls */
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145#define iabr 1010 /* Instruction address breakpoint register */
146#define ictrl 1011 /* Instruction Cache Control */
0b4e3aa0 147#define ldstdb 1012 /* Load/Store Debug */
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148#define dabr 1013 /* Data address breakpoint register */
149#define msscr0 1014 /* Memory subsystem control */
150#define msscr1 1015 /* Memory subsystem debug */
151#define msssr0 1015 /* Memory Subsystem Status */
152#define ldstcr 1016 /* Load/Store Status/Control */
153#define l2cr2 1016 /* L2 Cache control 2 */
154#define l2cr 1017 /* L2 Cache control */
155#define l3cr 1018 /* L3 Cache control */
156#define ictc 1019 /* I-cache throttling control */
157#define thrm1 1020 /* Thermal management 1 */
158#define thrm2 1021 /* Thermal management 2 */
159#define thrm3 1022 /* Thermal management 3 */
160#define pir 1023 /* Processor ID Register */
161
162; hid0 bits
163#define emcp 0
164#define emcpm 0x80000000
165#define dbp 1
166#define dbpm 0x40000000
167#define eba 2
168#define ebam 0x20000000
169#define ebd 3
170#define ebdm 0x10000000
171#define sbclk 4
172#define sbclkm 0x08000000
173#define eclk 6
174#define eclkm 0x02000000
175#define par 7
176#define parm 0x01000000
177#define sten 7
178#define stenm 0x01000000
179#define doze 8
180#define dozem 0x00800000
181#define nap 9
182#define napm 0x00400000
183#define sleep 10
184#define sleepm 0x00200000
185#define dpm 11
186#define dpmm 0x00100000
187#define riseg 12
188#define risegm 0x00080000
189#define eiec 13
190#define eiecm 0x00040000
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191#define mum 14
192#define mumm 0x00020000
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193#define nhr 15
194#define nhrm 0x00010000
195#define ice 16
196#define icem 0x00008000
197#define dce 17
198#define dcem 0x00004000
199#define ilock 18
200#define ilockm 0x00002000
201#define dlock 19
202#define dlockm 0x00001000
203#define icfi 20
204#define icfim 0x00000800
205#define dcfi 21
206#define dcfim 0x00000400
207#define spd 22
208#define spdm 0x00000200
209#define sge 24
210#define sgem 0x00000080
211#define dcfa 25
212#define dcfam 0x00000040
213#define btic 26
214#define bticm 0x00000020
215#define lrstk 27
216#define lrstkm 0x00000010
217#define abe 28
218#define abem 0x00000008
219#define fold 28
220#define foldm 0x00000008
221#define bht 29
222#define bhtm 0x00000004
223#define nopdst 30
224#define nopdstm 0x00000002
225#define nopti 31
226#define noptim 0x00000001
227
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228; hid1 bits
229#define hid1pcem 0xF8000000
230#define hid1prem 0x06000000
231#define hid1pi0 14
232#define hid1pi0m 0x00020000
233#define hid1ps 15
234#define hid1psm 0x00010000
235#define hid1pc0 0x0000F800
236#define hid1pr0 0x00000600
237#define hid1pc1 0x000000F8
238#define hid1pc0 0x0000F800
239#define hid1pr1 0x00000006
240
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241
242; hid2 bits
243#define hid2vmin 18
244#define hid2vminm 0x00002000
245
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246; msscr0 bits
247#define shden 0
248#define shdenm 0x80000000
249#define shden3 1
250#define shdenm3 0x40000000
251#define l1intvs 2
252#define l1intve 4
253#define l1intvb 0x38000000
254#define l2intvs 5
255#define l2intve 7
256#define l2intvb 0x07000000
257#define dl1hwf 8
258#define dl1hwfm 0x00800000
259#define dbsiz 9
260#define dbsizm 0x00400000
261#define emode 10
262#define emodem 0x00200000
263#define abgd 11
264#define abgdm 0x00100000
265#define tfsts 24
266#define tfste 25
267#define tfstm 0x000000C0
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268#define l2pfes 30
269#define l2pfee 31
270#define l2pfem 0x00000003
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271
272; msscr1 bits
273#define cqd 15
274#define cqdm 0x00010000
275#define csqs 1
276#define csqe 2
277#define csqm 0x60000000
278
279; msssr1 bits - 7450
280#define vgL2PARA 0
281#define vgL3PARA 1
282#define vgL2COQEL 2
283#define vgL3COQEL 3
284#define vgL2CTR 4
285#define vgL3CTR 5
286#define vgL2COQR 6
287#define vgL3COQR 7
288#define vgLMQ 8
289#define vgSMC 9
290#define vgSNP 10
291#define vgBIU 11
292#define vgSMCE 12
293#define vgL2TAG 13
294#define vgL2DAT 14
295#define vgL3TAG 15
296#define vgL3DAT 16
297#define vgAPE 17
298#define vgDPE 18
299#define vgTEA 19
300
301; srr1 bits
302#define icmck 1
303#define icmckm 0x40000000
304#define dcmck 2
305#define dcmckm 0x20000000
306#define l2mck 3
307#define l2mckm 0x10000000
308#define tlbmck 4
309#define tlbmckm 0x08000000
310#define brmck 5
311#define brmckm 0x04000000
312#define othmck 10
313#define othmckm 0x00200000
314#define l2dpmck 11
315#define l2dpmckm 0x00100000
316#define mcpmck 12
317#define mcpmckm 0x00080000
318#define teamck 13
319#define teamckm 0x00040000
320#define dpmck 14
321#define dpmckm 0x00020000
322#define apmck 15
323#define apmckm 0x00010000
324
325; L2 cache control
326#define l2e 0
327#define l2em 0x80000000
328#define l2pe 1
329#define l2pem 0x40000000
330#define l2siz 2
331#define l2sizf 3
332#define l2sizm 0x30000000
333#define l2clk 4
334#define l2clkf 6
335#define l2clkm 0x0E000000
336#define l2ram 7
337#define l2ramf 8
338#define l2ramm 0x01800000
339#define l2do 9
340#define l2dom 0x00400000
341#define l2i 10
342#define l2im 0x00200000
343#define l2ctl 11
344#define l2ctlm 0x00100000
345#define l2ionly 11
346#define l2ionlym 0x00100000
347#define l2wt 12
348#define l2wtm 0x00080000
349#define l2ts 13
350#define l2tsm 0x00040000
351#define l2oh 14
352#define l2ohf 15
353#define l2ohm 0x00030000
354#define l2donly 15
355#define l2donlym 0x00010000
356#define l2sl 16
357#define l2slm 0x00008000
358#define l2df 17
359#define l2dfm 0x00004000
360#define l2byp 18
361#define l2bypm 0x00002000
362#define l2fa 19
363#define l2fam 0x00001000
364#define l2hwf 20
365#define l2hwfm 0x00000800
366#define l2io 21
367#define l2iom 0x00000400
368#define l2clkstp 22
369#define l2clkstpm 0x00000200
370#define l2dro 23
371#define l2drom 0x00000100
372#define l2ctr 24
373#define l2ctrf 30
374#define l2ctrm 0x000000FE
375#define l2ip 31
376#define l2ipm 0x00000001
377
378; L3 cache control
379#define l3e 0
380#define l3em 0x80000000
381#define l3pe 1
382#define l3pem 0x40000000
383#define l3siz 3
384#define l3sizm 0x10000000
385#define l3clken 4
386#define l3clkenm 0x08000000
387#define l3dx 5
388#define l3dxm 0x04000000
389#define l3clk 6
390#define l3clkf 8
391#define l3clkm 0x03800000
392#define l3io 9
393#define l3iom 0x00400000
394#define l3spo 13
395#define l3spom 0x00040000
396#define l3cksp 14
397#define l3ckspf 15
398#define l3ckspm 0x00030000
399#define l3psp 16
400#define l3pspf 18
401#define l3pspm 0x0000E000
402#define l3rep 19
403#define l3repm 0x00001000
404#define l3hwf 20
405#define l3hwfm 0x00000800
406#define l3i 21
407#define l3im 0x00000400
408#define l3rt 22
409#define l3rtf 23
410#define l3rtm 0x00000300
411#define l3dro 23
412#define l3drom 0x00000100
413#define l3cya 24
414#define l3cyam 0x00000080
415#define l3donly 25
416#define l3donlym 0x00000040
417#define l3dmem 29
418#define l3dmemm 0x00000004
419#define l3dmsiz 31
420#define l3dmsizm 0x00000001
421
422#define thrmtin 0
423#define thrmtinm 0x80000000
424#define thrmtiv 1
425#define thrmtivm 0x40000000
426#define thrmthrs 2
427#define thrmthre 8
428#define thrmthrm 0x3F800000
429#define thrmtid 29
430#define thrmtidm 0x00000004
431#define thrmtie 30
432#define thrmtiem 0x00000002
433#define thrmv 31
434#define thrmvm 0x00000001
435
436#define thrmsitvs 15
437#define thrmsitve 30
438#define thrmsitvm 0x0001FFFE
439#define thrme 31
440#define thrmem 0x00000001
441
442#define ictcfib 23
443#define ictcfie 30
444#define ictcfim 0x000001FE
445#define ictce 31
446#define ictcem 0x00000001
447
448#define cr0_lt 0
449#define cr0_gt 1
450#define cr0_eq 2
451#define cr0_so 3
452#define cr0_un 3
453#define cr1_lt 4
454#define cr1_gt 5
455#define cr1_eq 6
456#define cr1_so 7
457#define cr1_un 7
458#define cr2_lt 8
459#define cr2_gt 9
460#define cr2_eq 10
461#define cr2_so 11
462#define cr2_un 11
463#define cr3_lt 12
464#define cr3_gt 13
465#define cr3_eq 14
466#define cr3_so 15
467#define cr3_un 15
468#define cr4_lt 16
469#define cr4_gt 17
470#define cr4_eq 18
471#define cr4_so 19
472#define cr4_un 19
473#define cr5_lt 20
474#define cr5_gt 21
475#define cr5_eq 22
476#define cr5_so 23
477#define cr5_un 23
478#define cr6_lt 24
479#define cr6_gt 25
480#define cr6_eq 26
481#define cr6_so 27
482#define cr6_un 27
483#define cr7_lt 28
484#define cr7_gt 29
485#define cr7_eq 30
486#define cr7_so 31
487#define cr7_un 31
488
489/*
490 * Macros to access high and low word values of an address
491 */
492
493#define HIGH_CADDR(x) ha16(x)
494#define HIGH_ADDR(x) hi16(x)
495#define LOW_ADDR(x) lo16(x)
496
497#endif /* ASSEMBLER */
498
499/* Tags are placed before Immediately Following Code (IFC) for the debugger
500 * to be able to deduce where to find various registers when backtracing
501 *
502 * We only define the values as we use them, see SVR4 ABI PowerPc Supplement
503 * for more details (defined in ELF spec).
504 */
505
506#define TAG_NO_FRAME_USED 0x00000000
507
508/* (should use genassym to get these offsets) */
509
510#define FM_BACKPTR 0
511#define FM_CR_SAVE 4
512#define FM_LR_SAVE 8 /* MacOSX is NOT following the ABI at the moment.. */
513#define FM_SIZE 64 /* minimum frame contents, backptr and LR save. Make sure it is quadaligned */
514#define FM_ARG0 56
515#define FM_ALIGN(l) ((l+15)&-16)
516#define PK_SYSCALL_BEGIN 0x7000
517
518
519/* redzone is the area under the stack pointer which must be preserved
520 * when taking a trap, interrupt etc.
521 */
522#define FM_REDZONE 224 /* is ((32-14+1)*4) */
523
524#define COPYIN_ARG0_OFFSET FM_ARG0
525
526#ifdef MACH_KERNEL
527#include <mach_kdb.h>
528#else /* MACH_KERNEL */
529#define MACH_KDB 0
530#endif /* MACH_KERNEL */
531
532#define BREAKPOINT_TRAP tw 4,r4,r4
533
534/* There is another definition of ALIGN for .c sources */
535#ifndef __LANGUAGE_ASSEMBLY
536#define ALIGN 4
537#endif /* __LANGUAGE_ASSEMBLY */
538
539#ifndef FALIGN
540#define FALIGN 4 /* Align functions on words for now. Cachelines is better */
541#endif
542
543#define LB(x,n) n
544#if __STDC__
545#define LCL(x) L ## x
546#define EXT(x) _ ## x
547#define LEXT(x) _ ## x ## :
548#define LBc(x,n) n ## :
549#define LBb(x,n) n ## b
550#define LBf(x,n) n ## f
551#else /* __STDC__ */
552#define LCL(x) L/**/x
553#define EXT(x) _/**/x
554#define LEXT(x) _/**/x/**/:
555#define LBc(x,n) n/**/:
556#define LBb(x,n) n/**/b
557#define LBf(x,n) n/**/f
558#endif /* __STDC__ */
559
560#define String .asciz
561#define Value .word
562#define Times(a,b) (a*b)
563#define Divide(a,b) (a/b)
564
565#define data16 .byte 0x66
566#define addr16 .byte 0x67
567
568#if !GPROF
569#define MCOUNT
570#endif /* GPROF */
571
572#define ELF_FUNC(x)
573#define ELF_DATA(x)
574#define ELF_SIZE(x,s)
575
576#define Entry(x,tag) .text@.align FALIGN@ .globl EXT(x)@ LEXT(x)
577#define ENTRY(x,tag) Entry(x,tag)@MCOUNT
578#define ENTRY2(x,y,tag) .text@ .align FALIGN@ .globl EXT(x)@ .globl EXT(y)@ \
579 LEXT(x)@ LEXT(y) @\
580 MCOUNT
581#if __STDC__
582#define ASENTRY(x) .globl x @ .align FALIGN; x ## @ MCOUNT
583#else
584#define ASENTRY(x) .globl x @ .align FALIGN; x @ MCOUNT
585#endif /* __STDC__ */
586#define DATA(x) .globl EXT(x) @ .align ALIGN @ LEXT(x)
587
588
589#define End(x) ELF_SIZE(x,.-x)
590#define END(x) End(EXT(x))
591#define ENDDATA(x) END(x)
592#define Enddata(x) End(x)
593
594/* These defines are here for .c files that wish to reference global symbols
595 * within __asm__ statements.
596 */
597#define CC_SYM_PREFIX "_"
598
599#endif /* _PPC_ASM_H_ */