[apple/xnu.git] / osfmk / i386 / cpu_number.h

/*
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this
 * file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */
/* 
 * Mach Operating System
 * Copyright (c) 1991,1990 Carnegie Mellon University
 * All Rights Reserved.
 * 
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 * 
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 * 
 * Carnegie Mellon requests users of this software to return to
 * 
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 * 
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 */

/*
 */

/*
 *	Machine-dependent definitions for cpu identification.
 *
 */
#ifndef	_I386_CPU_NUMBER_H_
#define	_I386_CPU_NUMBER_H_

#include <sys/appleapiopts.h>

#ifdef __APPLE_API_UNSTABLE
extern int	cpu_number(void);

#ifdef MACH_KERNEL_PRIVATE

#include <platforms.h>
#include <cpus.h>

#include <mp_v1_1.h>

#if	MP_V1_1
#include <i386/apic.h>
#include <i386/asm.h>

extern int lapic_id;

extern __inline__ int cpu_number(void)
{
	register int cpu;

	__asm__ volatile ("movl " CC_SYM_PREFIX "lapic_id, %0\n"
			  "	movl 0(%0), %0\n"
			  "	shrl %1, %0\n"
			  "	andl %2, %0"
		    : "=r" (cpu)
		    : "i" (LAPIC_ID_SHIFT), "i" (LAPIC_ID_MASK));

	return(cpu);
}
#else	/* MP_V1_1 */
/*
 * At least one corollary cpu type does not have local memory at all.
 * The only way I found to store the cpu number was in some 386/486
 * system register. cr3 has bits 0, 1, 2 and 5, 6, 7, 8, 9, 10, 11
 * available. Right now we use 0, 1 and 2. So we are limited to 8 cpus.
 * For more cpus, we could use bits 5 - 11 with a shift.
 *
 * Even for other machines, like COMPAQ this is much faster the inb/outb
 * 4 cycles instead of 10 to 30.
 */
#if	defined(__GNUC__)
#if	NCPUS	> 8
#error	cpu_number() definition only works for #cpus <= 8
#else

extern __inline__ int cpu_number(void)
{
	register int cpu;

	__asm__ volatile ("movl %%cr3, %0\n"
		"	andl $0x7, %0"
		    : "=r" (cpu));
	return(cpu);
}
#endif
#endif	/* defined(__GNUC__) */

#endif	/* MP_V1_1 */

#endif	/* MACH_KERNEL_PRIVATE */

#endif  /* __APPLE_API_UNSTABLE */

#endif	/* _I386_CPU_NUMBER_H_ */
Commit	Line	Data
1c79356b A	1	/*
	2	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_LICENSE_HEADER_START@
	5	*
43866e37	6	* Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
1c79356b	7	*
43866e37 A	8	* This file contains Original Code and/or Modifications of Original Code
	9	* as defined in and that are subject to the Apple Public Source License
	10	* Version 2.0 (the 'License'). You may not use this file except in
	11	* compliance with the License. Please obtain a copy of the License at
	12	* http://www.opensource.apple.com/apsl/ and read it before using this
	13	* file.
	14	*
	15	* The Original Code and all software distributed under the License are
	16	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
1c79356b A	17	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
1c79356b A	18	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
43866e37 A	19	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	20	* Please see the License for the specific language governing rights and
	21	* limitations under the License.
1c79356b A	22	*
	23	* @APPLE_LICENSE_HEADER_END@
	24	*/
	25	/*
	26	* @OSF_COPYRIGHT@
	27	*/
	28	/*
	29	* Mach Operating System
	30	* Copyright (c) 1991,1990 Carnegie Mellon University
	31	* All Rights Reserved.
	32	*
	33	* Permission to use, copy, modify and distribute this software and its
	34	* documentation is hereby granted, provided that both the copyright
	35	* notice and this permission notice appear in all copies of the
	36	* software, derivative works or modified versions, and any portions
	37	* thereof, and that both notices appear in supporting documentation.
	38	*
	39	* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
	40	* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
	41	* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
	42	*
	43	* Carnegie Mellon requests users of this software to return to
	44	*
	45	* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
	46	* School of Computer Science
	47	* Carnegie Mellon University
	48	* Pittsburgh PA 15213-3890
	49	*
	50	* any improvements or extensions that they make and grant Carnegie Mellon
	51	* the rights to redistribute these changes.
	52	*/
	53
	54	/*
	55	*/
	56
	57	/*
	58	* Machine-dependent definitions for cpu identification.
	59	*
	60	*/
	61	#ifndef _I386_CPU_NUMBER_H_
	62	#define _I386_CPU_NUMBER_H_
	63
9bccf70c A	64	#include <sys/appleapiopts.h>
	65
	66	#ifdef __APPLE_API_UNSTABLE
1c79356b A	67	extern int cpu_number(void);
	68
	69	#ifdef MACH_KERNEL_PRIVATE
	70
	71	#include <platforms.h>
	72	#include <cpus.h>
	73
	74	#include <mp_v1_1.h>
	75
	76	#if MP_V1_1
	77	#include <i386/apic.h>
	78	#include <i386/asm.h>
	79
	80	extern int lapic_id;
	81
	82	extern __inline__ int cpu_number(void)
	83	{
	84	register int cpu;
	85
	86	__asm__ volatile ("movl " CC_SYM_PREFIX "lapic_id, %0\n"
	87	" movl 0(%0), %0\n"
	88	" shrl %1, %0\n"
	89	" andl %2, %0"
	90	: "=r" (cpu)
	91	: "i" (LAPIC_ID_SHIFT), "i" (LAPIC_ID_MASK));
	92
	93	return(cpu);
	94	}
	95	#else /* MP_V1_1 */
	96	/*
	97	* At least one corollary cpu type does not have local memory at all.
	98	* The only way I found to store the cpu number was in some 386/486
	99	* system register. cr3 has bits 0, 1, 2 and 5, 6, 7, 8, 9, 10, 11
	100	* available. Right now we use 0, 1 and 2. So we are limited to 8 cpus.
	101	* For more cpus, we could use bits 5 - 11 with a shift.
	102	*
	103	* Even for other machines, like COMPAQ this is much faster the inb/outb
	104	* 4 cycles instead of 10 to 30.
	105	*/
	106	#if defined(__GNUC__)
	107	#if NCPUS > 8
	108	#error cpu_number() definition only works for #cpus <= 8
	109	#else
	110
	111	extern __inline__ int cpu_number(void)
	112	{
	113	register int cpu;
	114
	115	__asm__ volatile ("movl %%cr3, %0\n"
	116	" andl $0x7, %0"
	117	: "=r" (cpu));
	118	return(cpu);
	119	}
	120	#endif
	121	#endif /* defined(__GNUC__) */
	122
	123	#endif /* MP_V1_1 */
	124
	125	#endif /* MACH_KERNEL_PRIVATE */
	126
9bccf70c A	127	#endif /* __APPLE_API_UNSTABLE */
9bccf70c A	128
1c79356b	129	#endif /* _I386_CPU_NUMBER_H_ */