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1c79356b A |
1 | /* |
2 | * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_LICENSE_HEADER_START@ | |
5 | * | |
43866e37 | 6 | * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved. |
1c79356b | 7 | * |
43866e37 A |
8 | * This file contains Original Code and/or Modifications of Original Code |
9 | * as defined in and that are subject to the Apple Public Source License | |
10 | * Version 2.0 (the 'License'). You may not use this file except in | |
11 | * compliance with the License. Please obtain a copy of the License at | |
12 | * http://www.opensource.apple.com/apsl/ and read it before using this | |
13 | * file. | |
14 | * | |
15 | * The Original Code and all software distributed under the License are | |
16 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
1c79356b A |
17 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, |
18 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
43866e37 A |
19 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. |
20 | * Please see the License for the specific language governing rights and | |
21 | * limitations under the License. | |
1c79356b A |
22 | * |
23 | * @APPLE_LICENSE_HEADER_END@ | |
24 | */ | |
25 | /* | |
26 | * @OSF_COPYRIGHT@ | |
27 | */ | |
28 | /* | |
29 | * Mach Operating System | |
30 | * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University | |
31 | * All Rights Reserved. | |
32 | * | |
33 | * Permission to use, copy, modify and distribute this software and its | |
34 | * documentation is hereby granted, provided that both the copyright | |
35 | * notice and this permission notice appear in all copies of the | |
36 | * software, derivative works or modified versions, and any portions | |
37 | * thereof, and that both notices appear in supporting documentation. | |
38 | * | |
39 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" | |
40 | * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR | |
41 | * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. | |
42 | * | |
43 | * Carnegie Mellon requests users of this software to return to | |
44 | * | |
45 | * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU | |
46 | * School of Computer Science | |
47 | * Carnegie Mellon University | |
48 | * Pittsburgh PA 15213-3890 | |
49 | * | |
50 | * any improvements or extensions that they make and grant Carnegie Mellon | |
51 | * the rights to redistribute these changes. | |
52 | */ | |
53 | /* | |
54 | */ | |
55 | ||
56 | /* | |
57 | * | |
58 | * This file contains routines to check whether an ast is needed. | |
59 | * | |
60 | * ast_check() - check whether ast is needed for interrupt or context | |
61 | * switch. Usually called by clock interrupt handler. | |
62 | * | |
63 | */ | |
64 | ||
65 | #include <cputypes.h> | |
66 | #include <cpus.h> | |
67 | #include <platforms.h> | |
1c79356b A |
68 | |
69 | #include <kern/ast.h> | |
70 | #include <kern/counters.h> | |
71 | #include <kern/cpu_number.h> | |
72 | #include <kern/misc_protos.h> | |
73 | #include <kern/queue.h> | |
1c79356b A |
74 | #include <kern/sched_prim.h> |
75 | #include <kern/thread.h> | |
76 | #include <kern/thread_act.h> | |
77 | #include <kern/thread_swap.h> | |
78 | #include <kern/processor.h> | |
79 | #include <kern/spl.h> | |
80 | #include <mach/policy.h> | |
1c79356b A |
81 | |
82 | volatile ast_t need_ast[NCPUS]; | |
83 | ||
84 | void | |
85 | ast_init(void) | |
86 | { | |
87 | #ifndef MACHINE_AST | |
88 | register int i; | |
89 | ||
90 | for (i=0; i<NCPUS; i++) { | |
91 | need_ast[i] = AST_NONE; | |
92 | } | |
93 | #endif /* MACHINE_AST */ | |
94 | } | |
95 | ||
96 | void | |
97 | ast_taken( | |
0b4e3aa0 A |
98 | ast_t reasons, |
99 | boolean_t enable | |
1c79356b A |
100 | ) |
101 | { | |
0b4e3aa0 A |
102 | register int mycpu; |
103 | register processor_t myprocessor; | |
104 | register thread_t self = current_thread(); | |
105 | boolean_t preempt_trap = (reasons == AST_PREEMPT); | |
1c79356b | 106 | |
0b4e3aa0 | 107 | disable_preemption(); |
1c79356b | 108 | mycpu = cpu_number(); |
0b4e3aa0 | 109 | reasons &= need_ast[mycpu]; |
1c79356b | 110 | need_ast[mycpu] &= ~reasons; |
0b4e3aa0 | 111 | enable_preemption(); |
1c79356b A |
112 | |
113 | /* | |
114 | * No ast for an idle thread | |
115 | */ | |
116 | if (self->state & TH_IDLE) | |
0b4e3aa0 | 117 | goto enable_and_return; |
1c79356b A |
118 | |
119 | /* | |
0b4e3aa0 | 120 | * Check for urgent preemption |
1c79356b | 121 | */ |
0b4e3aa0 A |
122 | if ((reasons & AST_URGENT) && wait_queue_assert_possible(self)) { |
123 | if (reasons & AST_BLOCK) { | |
1c79356b | 124 | counter(c_ast_taken_block++); |
0b4e3aa0 | 125 | thread_block_reason((void (*)(void))0, AST_BLOCK); |
1c79356b | 126 | } |
0b4e3aa0 A |
127 | |
128 | reasons &= ~AST_PREEMPT; | |
1c79356b | 129 | if (reasons == 0) |
0b4e3aa0 | 130 | goto enable_and_return; |
1c79356b A |
131 | } |
132 | ||
0b4e3aa0 A |
133 | if (preempt_trap) |
134 | goto enable_and_return; | |
135 | ||
136 | ml_set_interrupts_enabled(enable); | |
137 | ||
1c79356b A |
138 | #ifdef MACH_BSD |
139 | /* | |
9bccf70c | 140 | * Check for BSD hook |
1c79356b A |
141 | */ |
142 | if (reasons & AST_BSD) { | |
0b4e3aa0 A |
143 | extern void bsd_ast(thread_act_t act); |
144 | thread_act_t act = self->top_act; | |
145 | ||
146 | thread_ast_clear(act, AST_BSD); | |
1c79356b A |
147 | bsd_ast(act); |
148 | } | |
1c79356b A |
149 | #endif |
150 | ||
1c79356b A |
151 | /* |
152 | * migration APC hook | |
153 | */ | |
154 | if (reasons & AST_APC) { | |
155 | act_execute_returnhandlers(); | |
156 | } | |
157 | ||
158 | /* | |
0b4e3aa0 | 159 | * Check for normal preemption |
1c79356b | 160 | */ |
0b4e3aa0 A |
161 | reasons &= AST_BLOCK; |
162 | if (reasons == 0) { | |
163 | disable_preemption(); | |
164 | myprocessor = current_processor(); | |
165 | if (csw_needed(self, myprocessor)) | |
166 | reasons = AST_BLOCK; | |
167 | enable_preemption(); | |
168 | } | |
169 | if ( (reasons & AST_BLOCK) && | |
170 | wait_queue_assert_possible(self) ) { | |
1c79356b | 171 | counter(c_ast_taken_block++); |
0b4e3aa0 | 172 | thread_block_reason(thread_exception_return, AST_BLOCK); |
1c79356b | 173 | } |
0b4e3aa0 A |
174 | |
175 | goto just_return; | |
176 | ||
177 | enable_and_return: | |
178 | ml_set_interrupts_enabled(enable); | |
179 | ||
180 | just_return: | |
181 | return; | |
1c79356b A |
182 | } |
183 | ||
9bccf70c A |
184 | /* |
185 | * Called at splsched. | |
186 | */ | |
1c79356b | 187 | void |
9bccf70c A |
188 | ast_check( |
189 | processor_t processor) | |
1c79356b | 190 | { |
9bccf70c | 191 | register thread_t self = processor->cpu_data->active_thread; |
1c79356b | 192 | |
9bccf70c A |
193 | processor->current_pri = self->sched_pri; |
194 | if (processor->state == PROCESSOR_RUNNING) { | |
195 | register ast_t preempt; | |
196 | processor_running: | |
1c79356b | 197 | |
1c79356b | 198 | /* |
0b4e3aa0 | 199 | * Propagate thread ast to processor. |
1c79356b | 200 | */ |
0b4e3aa0 | 201 | ast_propagate(self->top_act->ast); |
1c79356b A |
202 | |
203 | /* | |
204 | * Context switch check. | |
205 | */ | |
9bccf70c A |
206 | if ((preempt = csw_check(self, processor)) != AST_NONE) |
207 | ast_on(preempt); | |
1c79356b | 208 | } |
9bccf70c A |
209 | else |
210 | if ( processor->state == PROCESSOR_DISPATCHING || | |
211 | processor->state == PROCESSOR_IDLE ) { | |
212 | return; | |
213 | } | |
214 | else | |
215 | if (processor->state == PROCESSOR_SHUTDOWN) | |
216 | goto processor_running; | |
217 | else | |
218 | if (processor->state == PROCESSOR_ASSIGN) | |
219 | ast_on(AST_BLOCK); | |
1c79356b | 220 | } |