osfmk/kdp/ml/ppc/kdp_misc.s

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
   7  *
   8  * This file contains Original Code and/or Modifications of Original Code
   9  * as defined in and that are subject to the Apple Public Source License
  10  * Version 2.0 (the 'License'). You may not use this file except in
  11  * compliance with the License. Please obtain a copy of the License at
  12  * http://www.opensource.apple.com/apsl/ and read it before using this
  13  * file.
  14  *
  15  * The Original Code and all software distributed under the License are
  16  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  17  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  18  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  20  * Please see the License for the specific language governing rights and
  21  * limitations under the License.
  22  *
  23  * @APPLE_LICENSE_HEADER_END@
  24  */
  25 #include <debug.h>
  26 #include <ppc/asm.h>
  27 #include <ppc/proc_reg.h>
  28 #include <mach/ppc/vm_param.h>
  29 #include <assym.s>
  30
  31 .set kLog2CacheLineSize, 5
  32 .set kCacheLineSize, 32
  33
  34 ENTRY(kdp_flush_cache, TAG_NO_FRAME_USED)
  35         cmpi    cr0,0,r4,0                      /* is this zero length? */
  36         add     r4,r3,r4                        /* calculate last byte + 1 */
  37         subi    r4,r4,1                         /* calculate last byte */
  38
  39         srwi    r5,r3,kLog2CacheLineSize        /* calc first cache line index */
  40         srwi    r4,r4,kLog2CacheLineSize        /* calc last cache line index */
  41         beq     cr0, LdataToCodeDone            /* done if zero length */
  42
  43         subf    r4,r5,r4                        /* calc diff (# lines minus 1) */
  44         addi    r4,r4,1                         /* # of cache lines to flush */
  45         slwi    r5,r5,kLog2CacheLineSize        /* calc addr of first cache line */
  46
  47         /* flush the data cache lines */
  48         mr      r3,r5                           /* starting address for loop */
  49         mtctr   r4                                      /* loop count */
  50 LdataToCodeFlushLoop:
  51         dcbf    0, r3                                           /* flush the data cache line */
  52         addi    r3,r3,kCacheLineSize            /* advance to next cache line */
  53         bdnz    LdataToCodeFlushLoop            /* loop until count is zero */
  54         sync                                                            /* wait until RAM is valid */
  55
  56         /* invalidate the code cache lines */
  57         mr      r3,r5                                           /* starting address for loop */
  58         mtctr   r4                                                      /* loop count */
  59 LdataToCodeInvalidateLoop:
  60         icbi    0, r3                                           /* invalidate code cache line */
  61         addi    r3,r3,kCacheLineSize            /* advance to next cache line */
  62         bdnz    LdataToCodeInvalidateLoop       /* loop until count is zero */
  63         sync                                                            /* wait until last icbi completes */
  64         isync                                                           /* discard prefetched instructions */
  65 LdataToCodeDone:
  66         blr                                                                     /* return nothing */
  67
  68 ENTRY(kdp_sync_cache, TAG_NO_FRAME_USED)
  69         sync                                    /* data sync */
  70         isync                                   /* inst sync */
  71         blr                                             /* return nothing */
  72
  73 ENTRY(kdp_xlate_off, TAG_NO_FRAME_USED)
  74         mfmsr   r3
  75         rlwinm  r3,r3,0,MSR_FP_BIT+1,MSR_FP_BIT-1       ; Force floating point off
  76         rlwinm  r3,r3,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1     ; Force vectors off
  77         rlwinm  r4, r3, 0, MSR_DR_BIT+1, MSR_IR_BIT-1
  78         mtmsr   r4
  79         isync
  80         blr
  81
  82 ENTRY(kdp_xlate_restore, TAG_NO_FRAME_USED)
  83         mtmsr   r3
  84         isync
  85         blr
  86