[apple/xnu.git] / osfmk / ppc / misc_asm.s

/*
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this
 * file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#include <mach_kdb.h>
#include <mach_kgdb.h>
#include <mach_debug.h>
#include <assym.s>
#include <ppc/asm.h>
#include <ppc/proc_reg.h>
#include <mach/ppc/vm_param.h>

/*
 * vm_offset_t getrpc(void) - Return address of the function
 *	                      that called the current function
 */

/* By using this function, we force the caller to save its LR in a known
 * location, which we can pick up and return. See PowerPC ELF specs.
 */
ENTRY(getrpc, TAG_NO_FRAME_USED)
	lwz	ARG0,	FM_BACKPTR(r1)		/* Load our backchain ptr */
	lwz	ARG0,	FM_LR_SAVE(ARG0)	/* Load previously saved LR */
	blr					/* And return */


/* Mask and unmask interrupts at the processor level */	
ENTRY(interrupt_disable, TAG_NO_FRAME_USED)
	mfmsr	r0
	rlwinm	r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1	; Force floating point off
	rlwinm	r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1	; Force vectors off
	rlwinm	r0,	r0,	0,	MSR_EE_BIT+1,	MSR_EE_BIT-1
	mtmsr	r0
	isync
	blr

ENTRY(interrupt_enable, TAG_NO_FRAME_USED)

	mfmsr	r0
	ori		r0,	r0,	MASK(MSR_EE)
	mtmsr	r0
	blr

#if	MACH_KDB
/*
 * Kernel debugger versions of the spl*() functions.  This allows breakpoints
 * in the spl*() functions.
 */

/* Mask and unmask interrupts at the processor level */	
ENTRY(db_interrupt_disable, TAG_NO_FRAME_USED)
	mfmsr	r0
	rlwinm	r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1	; Force floating point off
	rlwinm	r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1	; Force vectors off
	rlwinm	r0,	r0,	0,	MSR_EE_BIT+1,	MSR_EE_BIT-1
	mtmsr	r0
	isync
	blr

ENTRY(db_interrupt_enable, TAG_NO_FRAME_USED)
	mfmsr	r0
	ori	r0,	r0,	MASK(MSR_EE)
	mtmsr	r0
	blr
#endif	/* MACH_KDB */

/*
 *	General entry for all debuggers.  This gets us onto the debug stack and
 *	then back off at exit. We need to pass back R3 to caller.
 */
 
ENTRY(Call_Debugger, TAG_NO_FRAME_USED)

			mfmsr	r7				; Get the current MSR
			rlwinm	r7,r7,0,MSR_FP_BIT+1,MSR_FP_BIT-1	; Force floating point off
			rlwinm	r7,r7,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1	; Force vectors off
			mflr	r0				; Save the return
			rlwinm	r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1	; Turn off interruptions
			mtmsr	r7				; Do it 
			isync
			mfsprg	r8,0			; Get the per_proc block
			stw		r0,FM_LR_SAVE(r1)	; Save return on current stack
			
			lwz		r9,PP_DEBSTACKPTR(r8)	; Get the debug stack
			cmpwi	r9,0			; Are we already on it?
			bne		cdNewDeb		; No...
		
			mr		r9,r1 			; We are already on the stack, so use the current value
			subi	r9,r9,FM_REDZONE+FM_SIZE	; Carve some extra space here
		
cdNewDeb:	li		r0,0			; Clear this out
			stw		r1,FM_ARG0(r9)	; Save the old stack pointer as if it were the first arg

			stw		r0,PP_DEBSTACKPTR(r8)	; Mark debug stack as busy
			
			subi	r1,r9,FM_SIZE	; Carve a new frame
			stw		r0,FM_BACKPTR(r1)	; Chain back
			
			bl		EXT(Call_DebuggerC)	; Call the "C" phase of this
		
			mfmsr	r0				; Get the MSR just in case it was enabled
			addi	r1,r1,FM_SIZE	; Pop off first stack frame
			rlwinm	r0,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1	; Turn off interruptions enable bit
			mtmsr	r0
		
			mfsprg	r8,0			; Get the per_proc block address
			
			lwz		r9,PP_DEBSTACK_TOP_SS(r8)	; Get the top of the stack
			cmplw	r1,r9			; Have we hit the bottom of the debug stack?
			lwz		r1,FM_ARG0(r1)	; Get previous stack frame
			lwz		r0,FM_LR_SAVE(r1)	; Get return address
			mtlr	r0				; Set the return point
			bnelr					; Return if still on debug stack

			stw		r9,PP_DEBSTACKPTR(r8)	; Mark debug stack as free		
			blr
 

/* The following routines are for C-support. They are usually
 * inlined into the C using the specifications in proc_reg.h,
 * but if optimisation is switched off, the inlining doesn't work
 */

ENTRY(get_got, TAG_NO_FRAME_USED)
	mr	ARG0,	r2
	blr
	
ENTRY(mflr, TAG_NO_FRAME_USED)
	mflr	ARG0
	blr

ENTRY(mfpvr, TAG_NO_FRAME_USED)
	mfpvr	ARG0
	blr

ENTRY(mtmsr, TAG_NO_FRAME_USED)
	mtmsr	ARG0
	isync
	blr

ENTRY(mfmsr, TAG_NO_FRAME_USED)
	mfmsr	ARG0
	blr

ENTRY(mtsrin, TAG_NO_FRAME_USED)
	isync
	mtsrin	ARG0,	ARG1
	isync
	blr

ENTRY(mfsrin, TAG_NO_FRAME_USED)
	mfsrin	ARG0,	ARG0
	blr

ENTRY(mtsdr1, TAG_NO_FRAME_USED)
	mtsdr1	ARG0
	blr

ENTRY(mtdar, TAG_NO_FRAME_USED)
	mtdar	ARG0
	blr

ENTRY(mfdar, TAG_NO_FRAME_USED)
	mfdar	ARG0
	blr

ENTRY(mtdec, TAG_NO_FRAME_USED)
	mtdec	ARG0
	blr

/* Decrementer frequency and realtime|timebase processor registers
 * are different between ppc601 and ppc603/4, we define them all.
 */

ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
	isync
	mfdec	ARG0
	blr


ENTRY(mftb, TAG_NO_FRAME_USED)
	mftb	ARG0
	blr

ENTRY(mftbu, TAG_NO_FRAME_USED)
	mftbu	ARG0
	blr

ENTRY(mfrtcl, TAG_NO_FRAME_USED)
	mfspr	ARG0,	5
	blr

ENTRY(mfrtcu, TAG_NO_FRAME_USED)
	mfspr	ARG0,	4
	blr

ENTRY(tlbie, TAG_NO_FRAME_USED)
	tlbie	ARG0
	blr


/*
 * Performance Monitor Register Support
 */	

ENTRY(mfmmcr0, TAG_NO_FRAME_USED)	
	mfspr	r3,mmcr0
	blr

ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
	mtspr	mmcr0,r3
	blr								

ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
	mfspr	r3,mmcr1
	blr								

ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
	mtspr	mmcr1,r3
	blr

ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
	mfspr	r3,mmcr2
	blr								

ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
	mtspr	mmcr2,r3
	blr

ENTRY(mfpmc1, TAG_NO_FRAME_USED)
	mfspr	r3,pmc1
	blr

ENTRY(mtpmc1, TAG_NO_FRAME_USED)
	mtspr	pmc1,r3
	blr								

ENTRY(mfpmc2, TAG_NO_FRAME_USED)
	mfspr	r3,pmc2
	blr

ENTRY(mtpmc2, TAG_NO_FRAME_USED)
	mtspr	pmc2,r3
	blr								

ENTRY(mfpmc3, TAG_NO_FRAME_USED)
	mfspr	r3,pmc3
	blr

ENTRY(mtpmc3, TAG_NO_FRAME_USED)
	mtspr	pmc3,r3
	blr								

ENTRY(mfpmc4, TAG_NO_FRAME_USED)
	mfspr	r3,pmc4
	blr

ENTRY(mtpmc4, TAG_NO_FRAME_USED)
	mtspr	pmc4,r3
	blr			
						
ENTRY(mfsia, TAG_NO_FRAME_USED)
	mfspr	r3,sia
	blr

ENTRY(mfsda, TAG_NO_FRAME_USED)
	mfspr	r3,sda
	blr
Commit	Line	Data
1c79356b A	1	/*
	2	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_LICENSE_HEADER_START@
	5	*
43866e37	6	* Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
1c79356b	7	*
43866e37 A	8	* This file contains Original Code and/or Modifications of Original Code
	9	* as defined in and that are subject to the Apple Public Source License
	10	* Version 2.0 (the 'License'). You may not use this file except in
	11	* compliance with the License. Please obtain a copy of the License at
	12	* http://www.opensource.apple.com/apsl/ and read it before using this
	13	* file.
	14	*
	15	* The Original Code and all software distributed under the License are
	16	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
1c79356b A	17	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
1c79356b A	18	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
43866e37 A	19	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	20	* Please see the License for the specific language governing rights and
	21	* limitations under the License.
1c79356b A	22	*
	23	* @APPLE_LICENSE_HEADER_END@
	24	*/
	25	/*
	26	* @OSF_COPYRIGHT@
	27	*/
	28
	29	#include <mach_kdb.h>
	30	#include <mach_kgdb.h>
	31	#include <mach_debug.h>
	32	#include <assym.s>
	33	#include <ppc/asm.h>
	34	#include <ppc/proc_reg.h>
	35	#include <mach/ppc/vm_param.h>
	36
	37	/*
	38	* vm_offset_t getrpc(void) - Return address of the function
	39	* that called the current function
	40	*/
	41
	42	/* By using this function, we force the caller to save its LR in a known
	43	* location, which we can pick up and return. See PowerPC ELF specs.
	44	*/
	45	ENTRY(getrpc, TAG_NO_FRAME_USED)
	46	lwz ARG0, FM_BACKPTR(r1) /* Load our backchain ptr */
	47	lwz ARG0, FM_LR_SAVE(ARG0) /* Load previously saved LR */
	48	blr /* And return */
	49
	50
	51	/* Mask and unmask interrupts at the processor level */
	52	ENTRY(interrupt_disable, TAG_NO_FRAME_USED)
de355530 A	53	mfmsr r0
	54	rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
	55	rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
	56	rlwinm r0, r0, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
	57	mtmsr r0
	58	isync
	59	blr
1c79356b A	60
	61	ENTRY(interrupt_enable, TAG_NO_FRAME_USED)
	62
	63	mfmsr r0
	64	ori r0, r0, MASK(MSR_EE)
	65	mtmsr r0
	66	blr
	67
	68	#if MACH_KDB
	69	/*
	70	* Kernel debugger versions of the spl*() functions. This allows breakpoints
	71	* in the spl*() functions.
	72	*/
	73
	74	/* Mask and unmask interrupts at the processor level */
	75	ENTRY(db_interrupt_disable, TAG_NO_FRAME_USED)
de355530 A	76	mfmsr r0
	77	rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
	78	rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
	79	rlwinm r0, r0, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
	80	mtmsr r0
	81	isync
	82	blr
1c79356b A	83
	84	ENTRY(db_interrupt_enable, TAG_NO_FRAME_USED)
	85	mfmsr r0
	86	ori r0, r0, MASK(MSR_EE)
	87	mtmsr r0
	88	blr
	89	#endif /* MACH_KDB */
	90
	91	/*
	92	* General entry for all debuggers. This gets us onto the debug stack and
	93	* then back off at exit. We need to pass back R3 to caller.
	94	*/
	95
	96	ENTRY(Call_Debugger, TAG_NO_FRAME_USED)
	97
	98	mfmsr r7 ; Get the current MSR
de355530 A	99	rlwinm r7,r7,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
de355530 A	100	rlwinm r7,r7,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
1c79356b	101	mflr r0 ; Save the return
de355530	102	rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions
1c79356b	103	mtmsr r7 ; Do it
9bccf70c	104	isync
1c79356b A	105	mfsprg r8,0 ; Get the per_proc block
	106	stw r0,FM_LR_SAVE(r1) ; Save return on current stack
	107
	108	lwz r9,PP_DEBSTACKPTR(r8) ; Get the debug stack
	109	cmpwi r9,0 ; Are we already on it?
	110	bne cdNewDeb ; No...
	111
	112	mr r9,r1 ; We are already on the stack, so use the current value
	113	subi r9,r9,FM_REDZONE+FM_SIZE ; Carve some extra space here
	114
	115	cdNewDeb: li r0,0 ; Clear this out
	116	stw r1,FM_ARG0(r9) ; Save the old stack pointer as if it were the first arg
	117
	118	stw r0,PP_DEBSTACKPTR(r8) ; Mark debug stack as busy
	119
	120	subi r1,r9,FM_SIZE ; Carve a new frame
	121	stw r0,FM_BACKPTR(r1) ; Chain back
	122
	123	bl EXT(Call_DebuggerC) ; Call the "C" phase of this
	124
de355530	125	mfmsr r0 ; Get the MSR just in case it was enabled
1c79356b	126	addi r1,r1,FM_SIZE ; Pop off first stack frame
de355530	127	rlwinm r0,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions enable bit
1c79356b A	128	mtmsr r0
	129
	130	mfsprg r8,0 ; Get the per_proc block address
	131
	132	lwz r9,PP_DEBSTACK_TOP_SS(r8) ; Get the top of the stack
	133	cmplw r1,r9 ; Have we hit the bottom of the debug stack?
	134	lwz r1,FM_ARG0(r1) ; Get previous stack frame
	135	lwz r0,FM_LR_SAVE(r1) ; Get return address
	136	mtlr r0 ; Set the return point
	137	bnelr ; Return if still on debug stack
	138
	139	stw r9,PP_DEBSTACKPTR(r8) ; Mark debug stack as free
	140	blr
	141
	142
	143	/* The following routines are for C-support. They are usually
	144	* inlined into the C using the specifications in proc_reg.h,
	145	* but if optimisation is switched off, the inlining doesn't work
	146	*/
	147
	148	ENTRY(get_got, TAG_NO_FRAME_USED)
	149	mr ARG0, r2
	150	blr
	151
	152	ENTRY(mflr, TAG_NO_FRAME_USED)
	153	mflr ARG0
	154	blr
	155
	156	ENTRY(mfpvr, TAG_NO_FRAME_USED)
	157	mfpvr ARG0
	158	blr
	159
	160	ENTRY(mtmsr, TAG_NO_FRAME_USED)
	161	mtmsr ARG0
	162	isync
	163	blr
	164
	165	ENTRY(mfmsr, TAG_NO_FRAME_USED)
	166	mfmsr ARG0
	167	blr
	168
	169	ENTRY(mtsrin, TAG_NO_FRAME_USED)
	170	isync
	171	mtsrin ARG0, ARG1
	172	isync
	173	blr
	174
	175	ENTRY(mfsrin, TAG_NO_FRAME_USED)
	176	mfsrin ARG0, ARG0
	177	blr
	178
	179	ENTRY(mtsdr1, TAG_NO_FRAME_USED)
	180	mtsdr1 ARG0
	181	blr
	182
	183	ENTRY(mtdar, TAG_NO_FRAME_USED)
	184	mtdar ARG0
	185	blr
	186
	187	ENTRY(mfdar, TAG_NO_FRAME_USED)
	188	mfdar ARG0
	189	blr
	190
	191	ENTRY(mtdec, TAG_NO_FRAME_USED)
192	mtdec ARG0
193	blr
194
195	/* Decrementer frequency and realtime\|timebase processor registers
196	* are different between ppc601 and ppc603/4, we define them all.
197	*/
198
199	ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
200	isync
201	mfdec ARG0
202	blr
203
204
205	ENTRY(mftb, TAG_NO_FRAME_USED)
206	mftb ARG0
207	blr
208
209	ENTRY(mftbu, TAG_NO_FRAME_USED)
210	mftbu ARG0
211	blr
212
213	ENTRY(mfrtcl, TAG_NO_FRAME_USED)
214	mfspr ARG0, 5
215	blr
216
217	ENTRY(mfrtcu, TAG_NO_FRAME_USED)
218	mfspr ARG0, 4
219	blr
220
221	ENTRY(tlbie, TAG_NO_FRAME_USED)
222	tlbie ARG0
223	blr
224
225
226	/*
227	* Performance Monitor Register Support
228	*/
229
230	ENTRY(mfmmcr0, TAG_NO_FRAME_USED)
231	mfspr r3,mmcr0
232	blr
233
234	ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
235	mtspr mmcr0,r3
236	blr
237
238	ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
239	mfspr r3,mmcr1
240	blr
241
242	ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
243	mtspr mmcr1,r3
244	blr
245
246	ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
247	mfspr r3,mmcr2
248	blr
249
250	ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
251	mtspr mmcr2,r3
252	blr
253
254	ENTRY(mfpmc1, TAG_NO_FRAME_USED)
255	mfspr r3,pmc1
256	blr
257
258	ENTRY(mtpmc1, TAG_NO_FRAME_USED)
259	mtspr pmc1,r3
260	blr
261
262	ENTRY(mfpmc2, TAG_NO_FRAME_USED)
263	mfspr r3,pmc2
264	blr
265
266	ENTRY(mtpmc2, TAG_NO_FRAME_USED)
267	mtspr pmc2,r3
268	blr
269
270	ENTRY(mfpmc3, TAG_NO_FRAME_USED)
271	mfspr r3,pmc3
272	blr
273
274	ENTRY(mtpmc3, TAG_NO_FRAME_USED)
275	mtspr pmc3,r3
276	blr
277
278	ENTRY(mfpmc4, TAG_NO_FRAME_USED)
279	mfspr r3,pmc4
280	blr
281
282	ENTRY(mtpmc4, TAG_NO_FRAME_USED)
283	mtspr pmc4,r3
284	blr
285
286	ENTRY(mfsia, TAG_NO_FRAME_USED)
287	mfspr r3,sia
288	blr
289
290	ENTRY(mfsda, TAG_NO_FRAME_USED)
291	mfspr r3,sda
292	blr
293