]> git.saurik.com Git - apple/xnu.git/blame - osfmk/mach/i386/thread_status.h
xnu-7195.101.1.tar.gz
[apple/xnu.git] / osfmk / mach / i386 / thread_status.h
CommitLineData
1c79356b 1/*
f427ee49 2 * Copyright (c) 2000-2020 Apple Computer, Inc. All rights reserved.
1c79356b 3 *
2d21ac55 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
0a7de745 5 *
2d21ac55
A
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
0a7de745 14 *
2d21ac55
A
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
0a7de745 17 *
2d21ac55
A
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5
A
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55
A
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
0a7de745 25 *
2d21ac55 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b
A
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
0a7de745 31/*
1c79356b
A
32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
34 * All Rights Reserved.
0a7de745 35 *
1c79356b
A
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
0a7de745 41 *
1c79356b
A
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
0a7de745 45 *
1c79356b 46 * Carnegie Mellon requests users of this software to return to
0a7de745 47 *
1c79356b
A
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
0a7de745 52 *
1c79356b
A
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58/*
59 * File: thread_status.h
60 * Author: Avadis Tevanian, Jr.
61 * Date: 1985
62 *
63 * This file contains the structure definitions for the thread
64 * state as applied to I386 processors.
65 */
66
0a7de745 67#ifndef _MACH_I386_THREAD_STATUS_H_
1c79356b
A
68#define _MACH_I386_THREAD_STATUS_H_
69
5ba3f43e 70#include <mach/machine/_structs.h>
91447636 71#include <mach/message.h>
1c79356b
A
72#include <mach/i386/fp_reg.h>
73#include <mach/i386/thread_state.h>
0c530ab8
A
74#include <i386/eflags.h>
75
5ba3f43e
A
76#ifdef KERNEL_PRIVATE
77#include <i386/proc_reg.h>
78#endif
79
1c79356b 80/*
0c530ab8
A
81 * the i386_xxxx form is kept for legacy purposes since these types
82 * are externally known... eventually they should be deprecated.
83 * our internal implementation has moved to the following naming convention
6601e61a 84 *
0c530ab8
A
85 * x86_xxxx32 names are used to deal with 32 bit states
86 * x86_xxxx64 names are used to deal with 64 bit states
87 * x86_xxxx names are used to deal with either 32 or 64 bit states
88 * via a self-describing mechanism
c0fea474
A
89 */
90
c0fea474 91/*
0c530ab8
A
92 * these are the legacy names which should be deprecated in the future
93 * they are externally known which is the only reason we don't just get
94 * rid of them
95 */
0a7de745
A
96#define i386_THREAD_STATE 1
97#define i386_FLOAT_STATE 2
98#define i386_EXCEPTION_STATE 3
0c530ab8 99
0c530ab8 100/*
c0fea474 101 * THREAD_STATE_FLAVOR_LIST 0
0a7de745 102 * these are the supported flavors
1c79356b 103 */
0a7de745
A
104#define x86_THREAD_STATE32 1
105#define x86_FLOAT_STATE32 2
106#define x86_EXCEPTION_STATE32 3
107#define x86_THREAD_STATE64 4
108#define x86_FLOAT_STATE64 5
109#define x86_EXCEPTION_STATE64 6
110#define x86_THREAD_STATE 7
111#define x86_FLOAT_STATE 8
112#define x86_EXCEPTION_STATE 9
113#define x86_DEBUG_STATE32 10
114#define x86_DEBUG_STATE64 11
115#define x86_DEBUG_STATE 12
116#define THREAD_STATE_NONE 13
bd504ef0 117/* 14 and 15 are used for the internal x86_SAVED_STATE flavours */
5ba3f43e 118/* Arrange for flavors to take sequential values, 32-bit, 64-bit, non-specific */
0a7de745
A
119#define x86_AVX_STATE32 16
120#define x86_AVX_STATE64 (x86_AVX_STATE32 + 1)
121#define x86_AVX_STATE (x86_AVX_STATE32 + 2)
0a7de745
A
122#define x86_AVX512_STATE32 19
123#define x86_AVX512_STATE64 (x86_AVX512_STATE32 + 1)
124#define x86_AVX512_STATE (x86_AVX512_STATE32 + 2)
cb323159 125#define x86_PAGEIN_STATE 22
0a7de745 126#define x86_THREAD_FULL_STATE64 23
f427ee49
A
127#define x86_INSTRUCTION_STATE 24
128#define x86_LAST_BRANCH_STATE 25
8ad349bb 129
6601e61a
A
130/*
131 * Largest state on this machine:
132 * (be sure mach/machine/thread_state.h matches!)
133 */
0a7de745 134#define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX
6601e61a 135
6601e61a 136/*
0c530ab8
A
137 * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed
138 * an exception flavor will return if that is a defined flavor for that
139 * platform. The macro must be manually updated to include all of the valid
140 * exception flavors as defined above.
6601e61a 141 */
cb323159
A
142#define VALID_THREAD_STATE_FLAVOR(x) \
143 ((x == x86_THREAD_STATE32) || \
144 (x == x86_FLOAT_STATE32) || \
145 (x == x86_EXCEPTION_STATE32) || \
146 (x == x86_DEBUG_STATE32) || \
147 (x == x86_THREAD_STATE64) || \
148 (x == x86_THREAD_FULL_STATE64) || \
149 (x == x86_FLOAT_STATE64) || \
150 (x == x86_EXCEPTION_STATE64) || \
151 (x == x86_DEBUG_STATE64) || \
152 (x == x86_THREAD_STATE) || \
153 (x == x86_FLOAT_STATE) || \
154 (x == x86_EXCEPTION_STATE) || \
155 (x == x86_DEBUG_STATE) || \
156 (x == x86_AVX_STATE32) || \
157 (x == x86_AVX_STATE64) || \
158 (x == x86_AVX_STATE) || \
159 (x == x86_AVX512_STATE32) || \
160 (x == x86_AVX512_STATE64) || \
161 (x == x86_AVX512_STATE) || \
162 (x == x86_PAGEIN_STATE) || \
f427ee49
A
163 (x == x86_INSTRUCTION_STATE) || \
164 (x == x86_LAST_BRANCH_STATE) || \
5ba3f43e 165 (x == THREAD_STATE_NONE))
6601e61a 166
0c530ab8 167struct x86_state_hdr {
0a7de745
A
168 uint32_t flavor;
169 uint32_t count;
6601e61a 170};
0c530ab8 171typedef struct x86_state_hdr x86_state_hdr_t;
6601e61a 172
c0fea474
A
173/*
174 * Default segment register values.
175 */
0a7de745
A
176
177#define USER_CODE_SELECTOR 0x0017
178#define USER_DATA_SELECTOR 0x001f
179#define KERN_CODE_SELECTOR 0x0008
180#define KERN_DATA_SELECTOR 0x0010
c0fea474 181
c0fea474 182/*
2d21ac55 183 * to be deprecated in the future
4452a7af 184 */
2d21ac55 185typedef _STRUCT_X86_THREAD_STATE32 i386_thread_state_t;
0a7de745 186#define i386_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
2d21ac55 187 ( sizeof (i386_thread_state_t) / sizeof (int) ))
89b3af67 188
2d21ac55 189typedef _STRUCT_X86_THREAD_STATE32 x86_thread_state32_t;
0a7de745 190#define x86_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \
2d21ac55 191 ( sizeof (x86_thread_state32_t) / sizeof (int) ))
c0fea474
A
192
193/*
2d21ac55 194 * to be deprecated in the future
c0fea474 195 */
2d21ac55 196typedef _STRUCT_X86_FLOAT_STATE32 i386_float_state_t;
0c530ab8 197#define i386_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 198 (sizeof(i386_float_state_t)/sizeof(unsigned int)))
2d21ac55
A
199
200typedef _STRUCT_X86_FLOAT_STATE32 x86_float_state32_t;
c0fea474 201#define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \
0a7de745 202 (sizeof(x86_float_state32_t)/sizeof(unsigned int)))
c0fea474 203
060df5ea
A
204typedef _STRUCT_X86_AVX_STATE32 x86_avx_state32_t;
205#define x86_AVX_STATE32_COUNT ((mach_msg_type_number_t) \
0a7de745 206 (sizeof(x86_avx_state32_t)/sizeof(unsigned int)))
060df5ea 207
5ba3f43e
A
208typedef _STRUCT_X86_AVX512_STATE32 x86_avx512_state32_t;
209#define x86_AVX512_STATE32_COUNT ((mach_msg_type_number_t) \
0a7de745 210 (sizeof(x86_avx512_state32_t)/sizeof(unsigned int)))
5ba3f43e 211
c0fea474 212/*
2d21ac55 213 * to be deprecated in the future
c0fea474 214 */
2d21ac55 215typedef _STRUCT_X86_EXCEPTION_STATE32 i386_exception_state_t;
0a7de745 216#define i386_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
0c530ab8
A
217 ( sizeof (i386_exception_state_t) / sizeof (int) ))
218
2d21ac55 219typedef _STRUCT_X86_EXCEPTION_STATE32 x86_exception_state32_t;
0a7de745 220#define x86_EXCEPTION_STATE32_COUNT ((mach_msg_type_number_t) \
c0fea474
A
221 ( sizeof (x86_exception_state32_t) / sizeof (int) ))
222
2d21ac55 223#define I386_EXCEPTION_STATE_COUNT i386_EXCEPTION_STATE_COUNT
c0fea474 224
2d21ac55 225typedef _STRUCT_X86_DEBUG_STATE32 x86_debug_state32_t;
c0fea474
A
226#define x86_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \
227 ( sizeof (x86_debug_state32_t) / sizeof (int) ))
c0fea474 228
2d21ac55 229#define X86_DEBUG_STATE32_COUNT x86_DEBUG_STATE32_COUNT
c0fea474 230
2d21ac55 231typedef _STRUCT_X86_THREAD_STATE64 x86_thread_state64_t;
0a7de745 232#define x86_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \
2d21ac55 233 ( sizeof (x86_thread_state64_t) / sizeof (int) ))
c0fea474 234
0a7de745
A
235typedef _STRUCT_X86_THREAD_FULL_STATE64 x86_thread_full_state64_t;
236#define x86_THREAD_FULL_STATE64_COUNT ((mach_msg_type_number_t) \
237 ( sizeof (x86_thread_full_state64_t) / sizeof (int) ))
238
2d21ac55
A
239typedef _STRUCT_X86_FLOAT_STATE64 x86_float_state64_t;
240#define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \
0a7de745 241 (sizeof(x86_float_state64_t)/sizeof(unsigned int)))
060df5ea
A
242
243typedef _STRUCT_X86_AVX_STATE64 x86_avx_state64_t;
244#define x86_AVX_STATE64_COUNT ((mach_msg_type_number_t) \
0a7de745 245 (sizeof(x86_avx_state64_t)/sizeof(unsigned int)))
060df5ea 246
5ba3f43e
A
247typedef _STRUCT_X86_AVX512_STATE64 x86_avx512_state64_t;
248#define x86_AVX512_STATE64_COUNT ((mach_msg_type_number_t) \
0a7de745 249 (sizeof(x86_avx512_state64_t)/sizeof(unsigned int)))
5ba3f43e 250
2d21ac55 251typedef _STRUCT_X86_EXCEPTION_STATE64 x86_exception_state64_t;
0a7de745 252#define x86_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \
c0fea474
A
253 ( sizeof (x86_exception_state64_t) / sizeof (int) ))
254
2d21ac55 255#define X86_EXCEPTION_STATE64_COUNT x86_EXCEPTION_STATE64_COUNT
c0fea474 256
2d21ac55 257typedef _STRUCT_X86_DEBUG_STATE64 x86_debug_state64_t;
0a7de745 258#define x86_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \
c0fea474
A
259 ( sizeof (x86_debug_state64_t) / sizeof (int) ))
260
261#define X86_DEBUG_STATE64_COUNT x86_DEBUG_STATE64_COUNT
262
cb323159
A
263typedef _STRUCT_X86_PAGEIN_STATE x86_pagein_state_t;
264#define x86_PAGEIN_STATE_COUNT \
265 ((mach_msg_type_number_t)(sizeof(x86_pagein_state_t) / sizeof(int)))
266
267#define X86_PAGEIN_STATE_COUNT x86_PAGEIN_STATE_COUNT
268
f427ee49
A
269typedef _STRUCT_X86_INSTRUCTION_STATE x86_instruction_state_t;
270#define x86_INSTRUCTION_STATE_COUNT \
271 ((mach_msg_type_number_t)(sizeof(x86_instruction_state_t) / sizeof(int)))
272
273#define X86_INSTRUCTION_STATE_COUNT x86_INSTRUCTION_STATE_COUNT
274
275typedef _STRUCT_LAST_BRANCH_STATE last_branch_state_t;
276#define x86_LAST_BRANCH_STATE_COUNT \
277 ((mach_msg_type_number_t)(sizeof(last_branch_state_t) / sizeof(int)))
278
279#define X86_LAST_BRANCH_STATE_COUNT x86_LAST_BRANCH_STATE_COUNT
280
281
2d21ac55
A
282/*
283 * Combined thread, float and exception states
284 */
285struct x86_thread_state {
0a7de745 286 x86_state_hdr_t tsh;
2d21ac55 287 union {
0a7de745
A
288 x86_thread_state32_t ts32;
289 x86_thread_state64_t ts64;
2d21ac55
A
290 } uts;
291};
c0fea474 292
2d21ac55 293struct x86_float_state {
0a7de745 294 x86_state_hdr_t fsh;
2d21ac55 295 union {
0a7de745
A
296 x86_float_state32_t fs32;
297 x86_float_state64_t fs64;
2d21ac55
A
298 } ufs;
299};
c0fea474
A
300
301struct x86_exception_state {
0a7de745 302 x86_state_hdr_t esh;
2d21ac55 303 union {
0a7de745
A
304 x86_exception_state32_t es32;
305 x86_exception_state64_t es64;
2d21ac55
A
306 } ues;
307};
c0fea474
A
308
309struct x86_debug_state {
0a7de745 310 x86_state_hdr_t dsh;
c0fea474 311 union {
0a7de745
A
312 x86_debug_state32_t ds32;
313 x86_debug_state64_t ds64;
c0fea474
A
314 } uds;
315};
316
bd504ef0 317struct x86_avx_state {
0a7de745 318 x86_state_hdr_t ash;
bd504ef0 319 union {
0a7de745
A
320 x86_avx_state32_t as32;
321 x86_avx_state64_t as64;
bd504ef0
A
322 } ufs;
323};
324
5ba3f43e 325struct x86_avx512_state {
0a7de745 326 x86_state_hdr_t ash;
5ba3f43e 327 union {
0a7de745
A
328 x86_avx512_state32_t as32;
329 x86_avx512_state64_t as64;
5ba3f43e
A
330 } ufs;
331};
5ba3f43e 332
2d21ac55 333typedef struct x86_thread_state x86_thread_state_t;
0a7de745
A
334#define x86_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
335 ( sizeof (x86_thread_state_t) / sizeof (int) ))
c0fea474 336
2d21ac55
A
337typedef struct x86_float_state x86_float_state_t;
338#define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 339 (sizeof(x86_float_state_t)/sizeof(unsigned int)))
2d21ac55
A
340
341typedef struct x86_exception_state x86_exception_state_t;
342#define x86_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 343 (sizeof(x86_exception_state_t)/sizeof(unsigned int)))
c0fea474
A
344
345typedef struct x86_debug_state x86_debug_state_t;
346#define x86_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 347 (sizeof(x86_debug_state_t)/sizeof(unsigned int)))
c0fea474 348
bd504ef0
A
349typedef struct x86_avx_state x86_avx_state_t;
350#define x86_AVX_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 351 (sizeof(x86_avx_state_t)/sizeof(unsigned int)))
bd504ef0 352
5ba3f43e
A
353typedef struct x86_avx512_state x86_avx512_state_t;
354#define x86_AVX512_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 355 (sizeof(x86_avx512_state_t)/sizeof(unsigned int)))
5ba3f43e 356
0c530ab8
A
357/*
358 * Machine-independent way for servers and Mach's exception mechanism to
359 * choose the most efficient state flavor for exception RPC's:
360 */
0a7de745
A
361#define MACHINE_THREAD_STATE x86_THREAD_STATE
362#define MACHINE_THREAD_STATE_COUNT x86_THREAD_STATE_COUNT
0c530ab8 363
2d21ac55
A
364#ifdef XNU_KERNEL_PRIVATE
365
0a7de745
A
366#define x86_SAVED_STATE32 THREAD_STATE_NONE + 1
367#define x86_SAVED_STATE64 THREAD_STATE_NONE + 2
0c530ab8 368
0c530ab8
A
369/*
370 * The format in which thread state is saved by Mach on this machine. This
371 * state flavor is most efficient for exception RPC's to kernel-loaded
372 * servers, because copying can be avoided:
1c79356b 373 */
0c530ab8 374struct x86_saved_state32 {
0a7de745
A
375 uint32_t gs;
376 uint32_t fs;
377 uint32_t es;
378 uint32_t ds;
379 uint32_t edi;
380 uint32_t esi;
381 uint32_t ebp;
382 uint32_t cr2; /* kernel esp stored by pusha - we save cr2 here later */
383 uint32_t ebx;
384 uint32_t edx;
385 uint32_t ecx;
386 uint32_t eax;
387 uint16_t trapno;
388 uint16_t cpu;
389 uint32_t err;
390 uint32_t eip;
391 uint32_t cs;
392 uint32_t efl;
393 uint32_t uesp;
394 uint32_t ss;
0c530ab8
A
395};
396typedef struct x86_saved_state32 x86_saved_state32_t;
6601e61a 397
0a7de745 398#define x86_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \
0c530ab8
A
399 (sizeof (x86_saved_state32_t)/sizeof(unsigned int)))
400
b0d623f7 401#pragma pack(4)
0c530ab8 402
0c530ab8
A
403/*
404 * This is the state pushed onto the 64-bit interrupt stack
405 * on any exception/trap/interrupt.
406 */
407struct x86_64_intr_stack_frame {
0a7de745
A
408 uint16_t trapno;
409 uint16_t cpu;
410 uint32_t _pad;
411 uint64_t trapfn;
412 uint64_t err;
413 uint64_t rip;
414 uint64_t cs;
415 uint64_t rflags;
416 uint64_t rsp;
417 uint64_t ss;
0c530ab8
A
418};
419typedef struct x86_64_intr_stack_frame x86_64_intr_stack_frame_t;
39037602 420_Static_assert((sizeof(x86_64_intr_stack_frame_t) % 16) == 0,
0a7de745 421 "interrupt stack frame size must be a multiple of 16 bytes");
0c530ab8 422
0c530ab8
A
423/*
424 * thread state format for task running in 64bit long mode
425 * in long mode, the same hardware frame is always pushed regardless
39037602 426 * of whether there was a change in privilege level... therefore, there
0c530ab8
A
427 * is no need for an x86_saved_state64_from_kernel variant
428 */
0c530ab8 429struct x86_saved_state64 {
0a7de745
A
430 uint64_t rdi; /* arg0 for system call */
431 uint64_t rsi;
432 uint64_t rdx;
433 uint64_t r10; /* R10 := RCX prior to syscall trap */
434 uint64_t r8;
435 uint64_t r9; /* arg5 for system call */
436
437 uint64_t cr2;
438 uint64_t r15;
439 uint64_t r14;
440 uint64_t r13;
441 uint64_t r12;
442 uint64_t r11;
443 uint64_t rbp;
444 uint64_t rbx;
445 uint64_t rcx;
446 uint64_t rax;
447
448 uint32_t gs;
449 uint32_t fs;
450
451 uint32_t ds;
452 uint32_t es;
453
454 struct x86_64_intr_stack_frame isf;
0c530ab8
A
455};
456typedef struct x86_saved_state64 x86_saved_state64_t;
0a7de745 457#define x86_SAVED_STATE64_COUNT ((mach_msg_type_number_t) \
0c530ab8
A
458 (sizeof (struct x86_saved_state64)/sizeof(unsigned int)))
459
0c530ab8 460extern uint32_t get_eflags_exportmask(void);
2d21ac55 461
0c530ab8
A
462/*
463 * Unified, tagged saved state:
464 */
465typedef struct {
0a7de745
A
466 uint32_t flavor;
467 uint32_t _pad_for_16byte_alignment[3];
0c530ab8 468 union {
0a7de745
A
469 x86_saved_state32_t ss_32;
470 x86_saved_state64_t ss_64;
0c530ab8
A
471 } uss;
472} x86_saved_state_t;
0a7de745
A
473#define ss_32 uss.ss_32
474#define ss_64 uss.ss_64
b0d623f7 475#pragma pack()
0c530ab8
A
476
477static inline boolean_t
478is_saved_state64(x86_saved_state_t *iss)
479{
0a7de745 480 return iss->flavor == x86_SAVED_STATE64;
0c530ab8
A
481}
482
483static inline boolean_t
484is_saved_state32(x86_saved_state_t *iss)
485{
0a7de745 486 return iss->flavor == x86_SAVED_STATE32;
0c530ab8
A
487}
488
489static inline x86_saved_state32_t *
490saved_state32(x86_saved_state_t *iss)
491{
0a7de745 492 return &iss->ss_32;
0c530ab8
A
493}
494
495static inline x86_saved_state64_t *
496saved_state64(x86_saved_state_t *iss)
497{
0a7de745 498 return &iss->ss_64;
0c530ab8
A
499}
500
501#endif /* XNU_KERNEL_PRIVATE */
1c79356b 502
0a7de745 503#endif /* _MACH_I386_THREAD_STATUS_H_ */