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1c79356b 1/*
2d21ac55 2 * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
1c79356b 3 *
2d21ac55 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b 5 *
2d21ac55
A
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
8f6c56a5 14 *
2d21ac55
A
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5
A
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55
A
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
8f6c56a5 25 *
2d21ac55 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b
A
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58/*
59 * File: thread_status.h
60 * Author: Avadis Tevanian, Jr.
61 * Date: 1985
62 *
63 * This file contains the structure definitions for the thread
64 * state as applied to I386 processors.
65 */
66
67#ifndef _MACH_I386_THREAD_STATUS_H_
68#define _MACH_I386_THREAD_STATUS_H_
69
5ba3f43e 70#include <mach/machine/_structs.h>
91447636 71#include <mach/message.h>
1c79356b
A
72#include <mach/i386/fp_reg.h>
73#include <mach/i386/thread_state.h>
0c530ab8
A
74#include <i386/eflags.h>
75
5ba3f43e
A
76#ifdef KERNEL_PRIVATE
77#include <i386/proc_reg.h>
78#endif
79
1c79356b 80/*
0c530ab8
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81 * the i386_xxxx form is kept for legacy purposes since these types
82 * are externally known... eventually they should be deprecated.
83 * our internal implementation has moved to the following naming convention
6601e61a 84 *
0c530ab8
A
85 * x86_xxxx32 names are used to deal with 32 bit states
86 * x86_xxxx64 names are used to deal with 64 bit states
87 * x86_xxxx names are used to deal with either 32 or 64 bit states
88 * via a self-describing mechanism
c0fea474
A
89 */
90
c0fea474 91/*
0c530ab8
A
92 * these are the legacy names which should be deprecated in the future
93 * they are externally known which is the only reason we don't just get
94 * rid of them
95 */
96#define i386_THREAD_STATE 1
97#define i386_FLOAT_STATE 2
98#define i386_EXCEPTION_STATE 3
99
0c530ab8 100/*
c0fea474
A
101 * THREAD_STATE_FLAVOR_LIST 0
102 * these are the supported flavors
1c79356b 103 */
c0fea474
A
104#define x86_THREAD_STATE32 1
105#define x86_FLOAT_STATE32 2
106#define x86_EXCEPTION_STATE32 3
107#define x86_THREAD_STATE64 4
108#define x86_FLOAT_STATE64 5
109#define x86_EXCEPTION_STATE64 6
110#define x86_THREAD_STATE 7
111#define x86_FLOAT_STATE 8
112#define x86_EXCEPTION_STATE 9
113#define x86_DEBUG_STATE32 10
114#define x86_DEBUG_STATE64 11
115#define x86_DEBUG_STATE 12
0c530ab8 116#define THREAD_STATE_NONE 13
bd504ef0 117/* 14 and 15 are used for the internal x86_SAVED_STATE flavours */
5ba3f43e 118/* Arrange for flavors to take sequential values, 32-bit, 64-bit, non-specific */
060df5ea 119#define x86_AVX_STATE32 16
5ba3f43e
A
120#define x86_AVX_STATE64 (x86_AVX_STATE32 + 1)
121#define x86_AVX_STATE (x86_AVX_STATE32 + 2)
122#if !defined(RC_HIDE_XNU_J137)
123#define x86_AVX512_STATE32 19
124#define x86_AVX512_STATE64 (x86_AVX512_STATE32 + 1)
125#define x86_AVX512_STATE (x86_AVX512_STATE32 + 2)
126#endif /* not RC_HIDE_XNU_J137 */
060df5ea 127
8ad349bb 128
6601e61a
A
129/*
130 * Largest state on this machine:
131 * (be sure mach/machine/thread_state.h matches!)
132 */
133#define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX
134
6601e61a 135/*
0c530ab8
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136 * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed
137 * an exception flavor will return if that is a defined flavor for that
138 * platform. The macro must be manually updated to include all of the valid
139 * exception flavors as defined above.
6601e61a 140 */
5ba3f43e
A
141#if !defined(RC_HIDE_XNU_J137)
142#define VALID_THREAD_STATE_FLAVOR(x) \
143 ((x == x86_THREAD_STATE32) || \
144 (x == x86_FLOAT_STATE32) || \
145 (x == x86_EXCEPTION_STATE32) || \
146 (x == x86_DEBUG_STATE32) || \
147 (x == x86_THREAD_STATE64) || \
148 (x == x86_FLOAT_STATE64) || \
149 (x == x86_EXCEPTION_STATE64) || \
150 (x == x86_DEBUG_STATE64) || \
151 (x == x86_THREAD_STATE) || \
152 (x == x86_FLOAT_STATE) || \
153 (x == x86_EXCEPTION_STATE) || \
154 (x == x86_DEBUG_STATE) || \
155 (x == x86_AVX_STATE32) || \
156 (x == x86_AVX_STATE64) || \
157 (x == x86_AVX_STATE) || \
158 (x == x86_AVX512_STATE32) || \
159 (x == x86_AVX512_STATE64) || \
160 (x == x86_AVX512_STATE) || \
161 (x == THREAD_STATE_NONE))
162#else
0c530ab8 163#define VALID_THREAD_STATE_FLAVOR(x) \
2d21ac55
A
164 ((x == x86_THREAD_STATE32) || \
165 (x == x86_FLOAT_STATE32) || \
166 (x == x86_EXCEPTION_STATE32) || \
167 (x == x86_DEBUG_STATE32) || \
168 (x == x86_THREAD_STATE64) || \
169 (x == x86_FLOAT_STATE64) || \
170 (x == x86_EXCEPTION_STATE64) || \
171 (x == x86_DEBUG_STATE64) || \
172 (x == x86_THREAD_STATE) || \
173 (x == x86_FLOAT_STATE) || \
174 (x == x86_EXCEPTION_STATE) || \
175 (x == x86_DEBUG_STATE) || \
060df5ea
A
176 (x == x86_AVX_STATE32) || \
177 (x == x86_AVX_STATE64) || \
bd504ef0 178 (x == x86_AVX_STATE) || \
2d21ac55 179 (x == THREAD_STATE_NONE))
5ba3f43e 180#endif /* not RC_HIDE_XNU_J137 */
6601e61a 181
0c530ab8 182struct x86_state_hdr {
5ba3f43e
A
183 uint32_t flavor;
184 uint32_t count;
6601e61a 185};
0c530ab8 186typedef struct x86_state_hdr x86_state_hdr_t;
6601e61a 187
c0fea474
A
188/*
189 * Default segment register values.
190 */
191
192#define USER_CODE_SELECTOR 0x0017
193#define USER_DATA_SELECTOR 0x001f
194#define KERN_CODE_SELECTOR 0x0008
195#define KERN_DATA_SELECTOR 0x0010
196
c0fea474 197/*
2d21ac55 198 * to be deprecated in the future
4452a7af 199 */
2d21ac55
A
200typedef _STRUCT_X86_THREAD_STATE32 i386_thread_state_t;
201#define i386_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
202 ( sizeof (i386_thread_state_t) / sizeof (int) ))
89b3af67 203
2d21ac55
A
204typedef _STRUCT_X86_THREAD_STATE32 x86_thread_state32_t;
205#define x86_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \
206 ( sizeof (x86_thread_state32_t) / sizeof (int) ))
c0fea474
A
207
208/*
2d21ac55 209 * to be deprecated in the future
c0fea474 210 */
2d21ac55 211typedef _STRUCT_X86_FLOAT_STATE32 i386_float_state_t;
0c530ab8
A
212#define i386_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
213 (sizeof(i386_float_state_t)/sizeof(unsigned int)))
2d21ac55
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214
215typedef _STRUCT_X86_FLOAT_STATE32 x86_float_state32_t;
c0fea474
A
216#define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \
217 (sizeof(x86_float_state32_t)/sizeof(unsigned int)))
c0fea474 218
060df5ea
A
219typedef _STRUCT_X86_AVX_STATE32 x86_avx_state32_t;
220#define x86_AVX_STATE32_COUNT ((mach_msg_type_number_t) \
221 (sizeof(x86_avx_state32_t)/sizeof(unsigned int)))
222
5ba3f43e
A
223#if !defined(RC_HIDE_XNU_J137)
224typedef _STRUCT_X86_AVX512_STATE32 x86_avx512_state32_t;
225#define x86_AVX512_STATE32_COUNT ((mach_msg_type_number_t) \
226 (sizeof(x86_avx512_state32_t)/sizeof(unsigned int)))
227#endif /* not RC_HIDE_XNU_J137 */
228
c0fea474 229/*
2d21ac55 230 * to be deprecated in the future
c0fea474 231 */
2d21ac55 232typedef _STRUCT_X86_EXCEPTION_STATE32 i386_exception_state_t;
0c530ab8
A
233#define i386_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
234 ( sizeof (i386_exception_state_t) / sizeof (int) ))
235
2d21ac55 236typedef _STRUCT_X86_EXCEPTION_STATE32 x86_exception_state32_t;
c0fea474
A
237#define x86_EXCEPTION_STATE32_COUNT ((mach_msg_type_number_t) \
238 ( sizeof (x86_exception_state32_t) / sizeof (int) ))
239
2d21ac55 240#define I386_EXCEPTION_STATE_COUNT i386_EXCEPTION_STATE_COUNT
c0fea474 241
2d21ac55 242typedef _STRUCT_X86_DEBUG_STATE32 x86_debug_state32_t;
c0fea474
A
243#define x86_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \
244 ( sizeof (x86_debug_state32_t) / sizeof (int) ))
c0fea474 245
2d21ac55 246#define X86_DEBUG_STATE32_COUNT x86_DEBUG_STATE32_COUNT
c0fea474 247
2d21ac55
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248typedef _STRUCT_X86_THREAD_STATE64 x86_thread_state64_t;
249#define x86_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \
250 ( sizeof (x86_thread_state64_t) / sizeof (int) ))
c0fea474 251
2d21ac55
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252typedef _STRUCT_X86_FLOAT_STATE64 x86_float_state64_t;
253#define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \
254 (sizeof(x86_float_state64_t)/sizeof(unsigned int)))
060df5ea
A
255
256typedef _STRUCT_X86_AVX_STATE64 x86_avx_state64_t;
257#define x86_AVX_STATE64_COUNT ((mach_msg_type_number_t) \
258 (sizeof(x86_avx_state64_t)/sizeof(unsigned int)))
259
5ba3f43e
A
260#if !defined(RC_HIDE_XNU_J137)
261typedef _STRUCT_X86_AVX512_STATE64 x86_avx512_state64_t;
262#define x86_AVX512_STATE64_COUNT ((mach_msg_type_number_t) \
263 (sizeof(x86_avx512_state64_t)/sizeof(unsigned int)))
264#endif /* not RC_HIDE_XNU_J137 */
265
2d21ac55 266typedef _STRUCT_X86_EXCEPTION_STATE64 x86_exception_state64_t;
c0fea474
A
267#define x86_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \
268 ( sizeof (x86_exception_state64_t) / sizeof (int) ))
269
2d21ac55 270#define X86_EXCEPTION_STATE64_COUNT x86_EXCEPTION_STATE64_COUNT
c0fea474 271
2d21ac55 272typedef _STRUCT_X86_DEBUG_STATE64 x86_debug_state64_t;
c0fea474
A
273#define x86_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \
274 ( sizeof (x86_debug_state64_t) / sizeof (int) ))
275
276#define X86_DEBUG_STATE64_COUNT x86_DEBUG_STATE64_COUNT
277
2d21ac55
A
278/*
279 * Combined thread, float and exception states
280 */
281struct x86_thread_state {
282 x86_state_hdr_t tsh;
283 union {
284 x86_thread_state32_t ts32;
285 x86_thread_state64_t ts64;
286 } uts;
287};
c0fea474 288
2d21ac55
A
289struct x86_float_state {
290 x86_state_hdr_t fsh;
291 union {
292 x86_float_state32_t fs32;
293 x86_float_state64_t fs64;
294 } ufs;
295};
c0fea474
A
296
297struct x86_exception_state {
2d21ac55
A
298 x86_state_hdr_t esh;
299 union {
300 x86_exception_state32_t es32;
301 x86_exception_state64_t es64;
302 } ues;
303};
c0fea474
A
304
305struct x86_debug_state {
306 x86_state_hdr_t dsh;
307 union {
308 x86_debug_state32_t ds32;
309 x86_debug_state64_t ds64;
310 } uds;
311};
312
bd504ef0
A
313struct x86_avx_state {
314 x86_state_hdr_t ash;
315 union {
316 x86_avx_state32_t as32;
317 x86_avx_state64_t as64;
318 } ufs;
319};
320
5ba3f43e
A
321#if !defined(RC_HIDE_XNU_J137)
322struct x86_avx512_state {
323 x86_state_hdr_t ash;
324 union {
325 x86_avx512_state32_t as32;
326 x86_avx512_state64_t as64;
327 } ufs;
328};
329#endif /* not RC_HIDE_XNU_J137 */
330
2d21ac55
A
331typedef struct x86_thread_state x86_thread_state_t;
332#define x86_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
333 ( sizeof (x86_thread_state_t) / sizeof (int) ))
c0fea474 334
2d21ac55
A
335typedef struct x86_float_state x86_float_state_t;
336#define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
337 (sizeof(x86_float_state_t)/sizeof(unsigned int)))
338
339typedef struct x86_exception_state x86_exception_state_t;
340#define x86_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
341 (sizeof(x86_exception_state_t)/sizeof(unsigned int)))
c0fea474
A
342
343typedef struct x86_debug_state x86_debug_state_t;
344#define x86_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \
345 (sizeof(x86_debug_state_t)/sizeof(unsigned int)))
346
bd504ef0
A
347typedef struct x86_avx_state x86_avx_state_t;
348#define x86_AVX_STATE_COUNT ((mach_msg_type_number_t) \
349 (sizeof(x86_avx_state_t)/sizeof(unsigned int)))
350
5ba3f43e
A
351#if !defined(RC_HIDE_XNU_J137)
352typedef struct x86_avx512_state x86_avx512_state_t;
353#define x86_AVX512_STATE_COUNT ((mach_msg_type_number_t) \
354 (sizeof(x86_avx512_state_t)/sizeof(unsigned int)))
355#endif /* not RC_HIDE_XNU_J137 */
356
0c530ab8
A
357/*
358 * Machine-independent way for servers and Mach's exception mechanism to
359 * choose the most efficient state flavor for exception RPC's:
360 */
361#define MACHINE_THREAD_STATE x86_THREAD_STATE
362#define MACHINE_THREAD_STATE_COUNT x86_THREAD_STATE_COUNT
363
2d21ac55
A
364#ifdef XNU_KERNEL_PRIVATE
365
366#define x86_SAVED_STATE32 THREAD_STATE_NONE + 1
367#define x86_SAVED_STATE64 THREAD_STATE_NONE + 2
0c530ab8 368
0c530ab8
A
369/*
370 * The format in which thread state is saved by Mach on this machine. This
371 * state flavor is most efficient for exception RPC's to kernel-loaded
372 * servers, because copying can be avoided:
1c79356b 373 */
0c530ab8 374struct x86_saved_state32 {
6d2010ae
A
375 uint32_t gs;
376 uint32_t fs;
377 uint32_t es;
378 uint32_t ds;
379 uint32_t edi;
380 uint32_t esi;
381 uint32_t ebp;
382 uint32_t cr2; /* kernel esp stored by pusha - we save cr2 here later */
383 uint32_t ebx;
384 uint32_t edx;
385 uint32_t ecx;
386 uint32_t eax;
387 uint16_t trapno;
388 uint16_t cpu;
389 uint32_t err;
390 uint32_t eip;
391 uint32_t cs;
392 uint32_t efl;
393 uint32_t uesp;
394 uint32_t ss;
0c530ab8
A
395};
396typedef struct x86_saved_state32 x86_saved_state32_t;
6601e61a 397
0c530ab8
A
398#define x86_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \
399 (sizeof (x86_saved_state32_t)/sizeof(unsigned int)))
400
b0d623f7 401#pragma pack(4)
0c530ab8 402
0c530ab8
A
403/*
404 * This is the state pushed onto the 64-bit interrupt stack
405 * on any exception/trap/interrupt.
406 */
407struct x86_64_intr_stack_frame {
6d2010ae
A
408 uint16_t trapno;
409 uint16_t cpu;
b0d623f7
A
410 uint32_t _pad;
411 uint64_t trapfn;
0c530ab8
A
412 uint64_t err;
413 uint64_t rip;
414 uint64_t cs;
415 uint64_t rflags;
416 uint64_t rsp;
417 uint64_t ss;
418};
419typedef struct x86_64_intr_stack_frame x86_64_intr_stack_frame_t;
39037602
A
420_Static_assert((sizeof(x86_64_intr_stack_frame_t) % 16) == 0,
421 "interrupt stack frame size must be a multiple of 16 bytes");
0c530ab8 422
0c530ab8
A
423/*
424 * thread state format for task running in 64bit long mode
425 * in long mode, the same hardware frame is always pushed regardless
39037602 426 * of whether there was a change in privilege level... therefore, there
0c530ab8
A
427 * is no need for an x86_saved_state64_from_kernel variant
428 */
0c530ab8 429struct x86_saved_state64 {
39236c6e 430 uint64_t rdi; /* arg0 for system call */
0c530ab8
A
431 uint64_t rsi;
432 uint64_t rdx;
39236c6e
A
433 uint64_t r10; /* R10 := RCX prior to syscall trap */
434 uint64_t r8;
435 uint64_t r9; /* arg5 for system call */
0c530ab8
A
436
437 uint64_t cr2;
438 uint64_t r15;
439 uint64_t r14;
440 uint64_t r13;
441 uint64_t r12;
442 uint64_t r11;
443 uint64_t rbp;
444 uint64_t rbx;
445 uint64_t rcx;
446 uint64_t rax;
447
448 uint32_t gs;
449 uint32_t fs;
6d2010ae 450
fe8ab488
A
451 uint64_t _pad;
452
0c530ab8
A
453 struct x86_64_intr_stack_frame isf;
454};
455typedef struct x86_saved_state64 x86_saved_state64_t;
456#define x86_SAVED_STATE64_COUNT ((mach_msg_type_number_t) \
457 (sizeof (struct x86_saved_state64)/sizeof(unsigned int)))
458
0c530ab8 459extern uint32_t get_eflags_exportmask(void);
2d21ac55 460
0c530ab8
A
461/*
462 * Unified, tagged saved state:
463 */
464typedef struct {
465 uint32_t flavor;
39236c6e 466 uint32_t _pad_for_16byte_alignment[3];
0c530ab8
A
467 union {
468 x86_saved_state32_t ss_32;
469 x86_saved_state64_t ss_64;
470 } uss;
471} x86_saved_state_t;
472#define ss_32 uss.ss_32
473#define ss_64 uss.ss_64
b0d623f7 474#pragma pack()
0c530ab8
A
475
476static inline boolean_t
477is_saved_state64(x86_saved_state_t *iss)
478{
479 return (iss->flavor == x86_SAVED_STATE64);
480}
481
482static inline boolean_t
483is_saved_state32(x86_saved_state_t *iss)
484{
485 return (iss->flavor == x86_SAVED_STATE32);
486}
487
488static inline x86_saved_state32_t *
489saved_state32(x86_saved_state_t *iss)
490{
491 return &iss->ss_32;
492}
493
494static inline x86_saved_state64_t *
495saved_state64(x86_saved_state_t *iss)
496{
497 return &iss->ss_64;
498}
499
500#endif /* XNU_KERNEL_PRIVATE */
1c79356b
A
501
502#endif /* _MACH_I386_THREAD_STATUS_H_ */