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1c79356b 1/*
2d21ac55 2 * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
1c79356b 3 *
2d21ac55 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
0a7de745 5 *
2d21ac55
A
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
0a7de745 14 *
2d21ac55
A
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
0a7de745 17 *
2d21ac55
A
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5
A
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55
A
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
0a7de745 25 *
2d21ac55 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b
A
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
0a7de745 31/*
1c79356b
A
32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
34 * All Rights Reserved.
0a7de745 35 *
1c79356b
A
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
0a7de745 41 *
1c79356b
A
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
0a7de745 45 *
1c79356b 46 * Carnegie Mellon requests users of this software to return to
0a7de745 47 *
1c79356b
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48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
0a7de745 52 *
1c79356b
A
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58/*
59 * File: thread_status.h
60 * Author: Avadis Tevanian, Jr.
61 * Date: 1985
62 *
63 * This file contains the structure definitions for the thread
64 * state as applied to I386 processors.
65 */
66
0a7de745 67#ifndef _MACH_I386_THREAD_STATUS_H_
1c79356b
A
68#define _MACH_I386_THREAD_STATUS_H_
69
5ba3f43e 70#include <mach/machine/_structs.h>
91447636 71#include <mach/message.h>
1c79356b
A
72#include <mach/i386/fp_reg.h>
73#include <mach/i386/thread_state.h>
0c530ab8
A
74#include <i386/eflags.h>
75
5ba3f43e
A
76#ifdef KERNEL_PRIVATE
77#include <i386/proc_reg.h>
78#endif
79
1c79356b 80/*
0c530ab8
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81 * the i386_xxxx form is kept for legacy purposes since these types
82 * are externally known... eventually they should be deprecated.
83 * our internal implementation has moved to the following naming convention
6601e61a 84 *
0c530ab8
A
85 * x86_xxxx32 names are used to deal with 32 bit states
86 * x86_xxxx64 names are used to deal with 64 bit states
87 * x86_xxxx names are used to deal with either 32 or 64 bit states
88 * via a self-describing mechanism
c0fea474
A
89 */
90
c0fea474 91/*
0c530ab8
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92 * these are the legacy names which should be deprecated in the future
93 * they are externally known which is the only reason we don't just get
94 * rid of them
95 */
0a7de745
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96#define i386_THREAD_STATE 1
97#define i386_FLOAT_STATE 2
98#define i386_EXCEPTION_STATE 3
0c530ab8 99
0c530ab8 100/*
c0fea474 101 * THREAD_STATE_FLAVOR_LIST 0
0a7de745 102 * these are the supported flavors
1c79356b 103 */
0a7de745
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104#define x86_THREAD_STATE32 1
105#define x86_FLOAT_STATE32 2
106#define x86_EXCEPTION_STATE32 3
107#define x86_THREAD_STATE64 4
108#define x86_FLOAT_STATE64 5
109#define x86_EXCEPTION_STATE64 6
110#define x86_THREAD_STATE 7
111#define x86_FLOAT_STATE 8
112#define x86_EXCEPTION_STATE 9
113#define x86_DEBUG_STATE32 10
114#define x86_DEBUG_STATE64 11
115#define x86_DEBUG_STATE 12
116#define THREAD_STATE_NONE 13
bd504ef0 117/* 14 and 15 are used for the internal x86_SAVED_STATE flavours */
5ba3f43e 118/* Arrange for flavors to take sequential values, 32-bit, 64-bit, non-specific */
0a7de745
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119#define x86_AVX_STATE32 16
120#define x86_AVX_STATE64 (x86_AVX_STATE32 + 1)
121#define x86_AVX_STATE (x86_AVX_STATE32 + 2)
0a7de745
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122#define x86_AVX512_STATE32 19
123#define x86_AVX512_STATE64 (x86_AVX512_STATE32 + 1)
124#define x86_AVX512_STATE (x86_AVX512_STATE32 + 2)
cb323159 125#define x86_PAGEIN_STATE 22
0a7de745 126#define x86_THREAD_FULL_STATE64 23
8ad349bb 127
6601e61a
A
128/*
129 * Largest state on this machine:
130 * (be sure mach/machine/thread_state.h matches!)
131 */
0a7de745 132#define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX
6601e61a 133
6601e61a 134/*
0c530ab8
A
135 * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed
136 * an exception flavor will return if that is a defined flavor for that
137 * platform. The macro must be manually updated to include all of the valid
138 * exception flavors as defined above.
6601e61a 139 */
cb323159
A
140#define VALID_THREAD_STATE_FLAVOR(x) \
141 ((x == x86_THREAD_STATE32) || \
142 (x == x86_FLOAT_STATE32) || \
143 (x == x86_EXCEPTION_STATE32) || \
144 (x == x86_DEBUG_STATE32) || \
145 (x == x86_THREAD_STATE64) || \
146 (x == x86_THREAD_FULL_STATE64) || \
147 (x == x86_FLOAT_STATE64) || \
148 (x == x86_EXCEPTION_STATE64) || \
149 (x == x86_DEBUG_STATE64) || \
150 (x == x86_THREAD_STATE) || \
151 (x == x86_FLOAT_STATE) || \
152 (x == x86_EXCEPTION_STATE) || \
153 (x == x86_DEBUG_STATE) || \
154 (x == x86_AVX_STATE32) || \
155 (x == x86_AVX_STATE64) || \
156 (x == x86_AVX_STATE) || \
157 (x == x86_AVX512_STATE32) || \
158 (x == x86_AVX512_STATE64) || \
159 (x == x86_AVX512_STATE) || \
160 (x == x86_PAGEIN_STATE) || \
5ba3f43e 161 (x == THREAD_STATE_NONE))
6601e61a 162
0c530ab8 163struct x86_state_hdr {
0a7de745
A
164 uint32_t flavor;
165 uint32_t count;
6601e61a 166};
0c530ab8 167typedef struct x86_state_hdr x86_state_hdr_t;
6601e61a 168
c0fea474
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169/*
170 * Default segment register values.
171 */
0a7de745
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172
173#define USER_CODE_SELECTOR 0x0017
174#define USER_DATA_SELECTOR 0x001f
175#define KERN_CODE_SELECTOR 0x0008
176#define KERN_DATA_SELECTOR 0x0010
c0fea474 177
c0fea474 178/*
2d21ac55 179 * to be deprecated in the future
4452a7af 180 */
2d21ac55 181typedef _STRUCT_X86_THREAD_STATE32 i386_thread_state_t;
0a7de745 182#define i386_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
2d21ac55 183 ( sizeof (i386_thread_state_t) / sizeof (int) ))
89b3af67 184
2d21ac55 185typedef _STRUCT_X86_THREAD_STATE32 x86_thread_state32_t;
0a7de745 186#define x86_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \
2d21ac55 187 ( sizeof (x86_thread_state32_t) / sizeof (int) ))
c0fea474
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188
189/*
2d21ac55 190 * to be deprecated in the future
c0fea474 191 */
2d21ac55 192typedef _STRUCT_X86_FLOAT_STATE32 i386_float_state_t;
0c530ab8 193#define i386_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 194 (sizeof(i386_float_state_t)/sizeof(unsigned int)))
2d21ac55
A
195
196typedef _STRUCT_X86_FLOAT_STATE32 x86_float_state32_t;
c0fea474 197#define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \
0a7de745 198 (sizeof(x86_float_state32_t)/sizeof(unsigned int)))
c0fea474 199
060df5ea
A
200typedef _STRUCT_X86_AVX_STATE32 x86_avx_state32_t;
201#define x86_AVX_STATE32_COUNT ((mach_msg_type_number_t) \
0a7de745 202 (sizeof(x86_avx_state32_t)/sizeof(unsigned int)))
060df5ea 203
5ba3f43e
A
204typedef _STRUCT_X86_AVX512_STATE32 x86_avx512_state32_t;
205#define x86_AVX512_STATE32_COUNT ((mach_msg_type_number_t) \
0a7de745 206 (sizeof(x86_avx512_state32_t)/sizeof(unsigned int)))
5ba3f43e 207
c0fea474 208/*
2d21ac55 209 * to be deprecated in the future
c0fea474 210 */
2d21ac55 211typedef _STRUCT_X86_EXCEPTION_STATE32 i386_exception_state_t;
0a7de745 212#define i386_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
0c530ab8
A
213 ( sizeof (i386_exception_state_t) / sizeof (int) ))
214
2d21ac55 215typedef _STRUCT_X86_EXCEPTION_STATE32 x86_exception_state32_t;
0a7de745 216#define x86_EXCEPTION_STATE32_COUNT ((mach_msg_type_number_t) \
c0fea474
A
217 ( sizeof (x86_exception_state32_t) / sizeof (int) ))
218
2d21ac55 219#define I386_EXCEPTION_STATE_COUNT i386_EXCEPTION_STATE_COUNT
c0fea474 220
2d21ac55 221typedef _STRUCT_X86_DEBUG_STATE32 x86_debug_state32_t;
c0fea474
A
222#define x86_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \
223 ( sizeof (x86_debug_state32_t) / sizeof (int) ))
c0fea474 224
2d21ac55 225#define X86_DEBUG_STATE32_COUNT x86_DEBUG_STATE32_COUNT
c0fea474 226
2d21ac55 227typedef _STRUCT_X86_THREAD_STATE64 x86_thread_state64_t;
0a7de745 228#define x86_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \
2d21ac55 229 ( sizeof (x86_thread_state64_t) / sizeof (int) ))
c0fea474 230
0a7de745
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231typedef _STRUCT_X86_THREAD_FULL_STATE64 x86_thread_full_state64_t;
232#define x86_THREAD_FULL_STATE64_COUNT ((mach_msg_type_number_t) \
233 ( sizeof (x86_thread_full_state64_t) / sizeof (int) ))
234
2d21ac55
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235typedef _STRUCT_X86_FLOAT_STATE64 x86_float_state64_t;
236#define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \
0a7de745 237 (sizeof(x86_float_state64_t)/sizeof(unsigned int)))
060df5ea
A
238
239typedef _STRUCT_X86_AVX_STATE64 x86_avx_state64_t;
240#define x86_AVX_STATE64_COUNT ((mach_msg_type_number_t) \
0a7de745 241 (sizeof(x86_avx_state64_t)/sizeof(unsigned int)))
060df5ea 242
5ba3f43e
A
243typedef _STRUCT_X86_AVX512_STATE64 x86_avx512_state64_t;
244#define x86_AVX512_STATE64_COUNT ((mach_msg_type_number_t) \
0a7de745 245 (sizeof(x86_avx512_state64_t)/sizeof(unsigned int)))
5ba3f43e 246
2d21ac55 247typedef _STRUCT_X86_EXCEPTION_STATE64 x86_exception_state64_t;
0a7de745 248#define x86_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \
c0fea474
A
249 ( sizeof (x86_exception_state64_t) / sizeof (int) ))
250
2d21ac55 251#define X86_EXCEPTION_STATE64_COUNT x86_EXCEPTION_STATE64_COUNT
c0fea474 252
2d21ac55 253typedef _STRUCT_X86_DEBUG_STATE64 x86_debug_state64_t;
0a7de745 254#define x86_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \
c0fea474
A
255 ( sizeof (x86_debug_state64_t) / sizeof (int) ))
256
257#define X86_DEBUG_STATE64_COUNT x86_DEBUG_STATE64_COUNT
258
cb323159
A
259typedef _STRUCT_X86_PAGEIN_STATE x86_pagein_state_t;
260#define x86_PAGEIN_STATE_COUNT \
261 ((mach_msg_type_number_t)(sizeof(x86_pagein_state_t) / sizeof(int)))
262
263#define X86_PAGEIN_STATE_COUNT x86_PAGEIN_STATE_COUNT
264
2d21ac55
A
265/*
266 * Combined thread, float and exception states
267 */
268struct x86_thread_state {
0a7de745 269 x86_state_hdr_t tsh;
2d21ac55 270 union {
0a7de745
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271 x86_thread_state32_t ts32;
272 x86_thread_state64_t ts64;
2d21ac55
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273 } uts;
274};
c0fea474 275
2d21ac55 276struct x86_float_state {
0a7de745 277 x86_state_hdr_t fsh;
2d21ac55 278 union {
0a7de745
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279 x86_float_state32_t fs32;
280 x86_float_state64_t fs64;
2d21ac55
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281 } ufs;
282};
c0fea474
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283
284struct x86_exception_state {
0a7de745 285 x86_state_hdr_t esh;
2d21ac55 286 union {
0a7de745
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287 x86_exception_state32_t es32;
288 x86_exception_state64_t es64;
2d21ac55
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289 } ues;
290};
c0fea474
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291
292struct x86_debug_state {
0a7de745 293 x86_state_hdr_t dsh;
c0fea474 294 union {
0a7de745
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295 x86_debug_state32_t ds32;
296 x86_debug_state64_t ds64;
c0fea474
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297 } uds;
298};
299
bd504ef0 300struct x86_avx_state {
0a7de745 301 x86_state_hdr_t ash;
bd504ef0 302 union {
0a7de745
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303 x86_avx_state32_t as32;
304 x86_avx_state64_t as64;
bd504ef0
A
305 } ufs;
306};
307
5ba3f43e 308struct x86_avx512_state {
0a7de745 309 x86_state_hdr_t ash;
5ba3f43e 310 union {
0a7de745
A
311 x86_avx512_state32_t as32;
312 x86_avx512_state64_t as64;
5ba3f43e
A
313 } ufs;
314};
5ba3f43e 315
2d21ac55 316typedef struct x86_thread_state x86_thread_state_t;
0a7de745
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317#define x86_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
318 ( sizeof (x86_thread_state_t) / sizeof (int) ))
c0fea474 319
2d21ac55
A
320typedef struct x86_float_state x86_float_state_t;
321#define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 322 (sizeof(x86_float_state_t)/sizeof(unsigned int)))
2d21ac55
A
323
324typedef struct x86_exception_state x86_exception_state_t;
325#define x86_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 326 (sizeof(x86_exception_state_t)/sizeof(unsigned int)))
c0fea474
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327
328typedef struct x86_debug_state x86_debug_state_t;
329#define x86_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 330 (sizeof(x86_debug_state_t)/sizeof(unsigned int)))
c0fea474 331
bd504ef0
A
332typedef struct x86_avx_state x86_avx_state_t;
333#define x86_AVX_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 334 (sizeof(x86_avx_state_t)/sizeof(unsigned int)))
bd504ef0 335
5ba3f43e
A
336typedef struct x86_avx512_state x86_avx512_state_t;
337#define x86_AVX512_STATE_COUNT ((mach_msg_type_number_t) \
0a7de745 338 (sizeof(x86_avx512_state_t)/sizeof(unsigned int)))
5ba3f43e 339
0c530ab8
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340/*
341 * Machine-independent way for servers and Mach's exception mechanism to
342 * choose the most efficient state flavor for exception RPC's:
343 */
0a7de745
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344#define MACHINE_THREAD_STATE x86_THREAD_STATE
345#define MACHINE_THREAD_STATE_COUNT x86_THREAD_STATE_COUNT
0c530ab8 346
2d21ac55
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347#ifdef XNU_KERNEL_PRIVATE
348
0a7de745
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349#define x86_SAVED_STATE32 THREAD_STATE_NONE + 1
350#define x86_SAVED_STATE64 THREAD_STATE_NONE + 2
0c530ab8 351
0c530ab8
A
352/*
353 * The format in which thread state is saved by Mach on this machine. This
354 * state flavor is most efficient for exception RPC's to kernel-loaded
355 * servers, because copying can be avoided:
1c79356b 356 */
0c530ab8 357struct x86_saved_state32 {
0a7de745
A
358 uint32_t gs;
359 uint32_t fs;
360 uint32_t es;
361 uint32_t ds;
362 uint32_t edi;
363 uint32_t esi;
364 uint32_t ebp;
365 uint32_t cr2; /* kernel esp stored by pusha - we save cr2 here later */
366 uint32_t ebx;
367 uint32_t edx;
368 uint32_t ecx;
369 uint32_t eax;
370 uint16_t trapno;
371 uint16_t cpu;
372 uint32_t err;
373 uint32_t eip;
374 uint32_t cs;
375 uint32_t efl;
376 uint32_t uesp;
377 uint32_t ss;
0c530ab8
A
378};
379typedef struct x86_saved_state32 x86_saved_state32_t;
6601e61a 380
0a7de745 381#define x86_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \
0c530ab8
A
382 (sizeof (x86_saved_state32_t)/sizeof(unsigned int)))
383
b0d623f7 384#pragma pack(4)
0c530ab8 385
0c530ab8
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386/*
387 * This is the state pushed onto the 64-bit interrupt stack
388 * on any exception/trap/interrupt.
389 */
390struct x86_64_intr_stack_frame {
0a7de745
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391 uint16_t trapno;
392 uint16_t cpu;
393 uint32_t _pad;
394 uint64_t trapfn;
395 uint64_t err;
396 uint64_t rip;
397 uint64_t cs;
398 uint64_t rflags;
399 uint64_t rsp;
400 uint64_t ss;
0c530ab8
A
401};
402typedef struct x86_64_intr_stack_frame x86_64_intr_stack_frame_t;
39037602 403_Static_assert((sizeof(x86_64_intr_stack_frame_t) % 16) == 0,
0a7de745 404 "interrupt stack frame size must be a multiple of 16 bytes");
0c530ab8 405
0c530ab8
A
406/*
407 * thread state format for task running in 64bit long mode
408 * in long mode, the same hardware frame is always pushed regardless
39037602 409 * of whether there was a change in privilege level... therefore, there
0c530ab8
A
410 * is no need for an x86_saved_state64_from_kernel variant
411 */
0c530ab8 412struct x86_saved_state64 {
0a7de745
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413 uint64_t rdi; /* arg0 for system call */
414 uint64_t rsi;
415 uint64_t rdx;
416 uint64_t r10; /* R10 := RCX prior to syscall trap */
417 uint64_t r8;
418 uint64_t r9; /* arg5 for system call */
419
420 uint64_t cr2;
421 uint64_t r15;
422 uint64_t r14;
423 uint64_t r13;
424 uint64_t r12;
425 uint64_t r11;
426 uint64_t rbp;
427 uint64_t rbx;
428 uint64_t rcx;
429 uint64_t rax;
430
431 uint32_t gs;
432 uint32_t fs;
433
434 uint32_t ds;
435 uint32_t es;
436
437 struct x86_64_intr_stack_frame isf;
0c530ab8
A
438};
439typedef struct x86_saved_state64 x86_saved_state64_t;
0a7de745 440#define x86_SAVED_STATE64_COUNT ((mach_msg_type_number_t) \
0c530ab8
A
441 (sizeof (struct x86_saved_state64)/sizeof(unsigned int)))
442
0c530ab8 443extern uint32_t get_eflags_exportmask(void);
2d21ac55 444
0c530ab8
A
445/*
446 * Unified, tagged saved state:
447 */
448typedef struct {
0a7de745
A
449 uint32_t flavor;
450 uint32_t _pad_for_16byte_alignment[3];
0c530ab8 451 union {
0a7de745
A
452 x86_saved_state32_t ss_32;
453 x86_saved_state64_t ss_64;
0c530ab8
A
454 } uss;
455} x86_saved_state_t;
0a7de745
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456#define ss_32 uss.ss_32
457#define ss_64 uss.ss_64
b0d623f7 458#pragma pack()
0c530ab8
A
459
460static inline boolean_t
461is_saved_state64(x86_saved_state_t *iss)
462{
0a7de745 463 return iss->flavor == x86_SAVED_STATE64;
0c530ab8
A
464}
465
466static inline boolean_t
467is_saved_state32(x86_saved_state_t *iss)
468{
0a7de745 469 return iss->flavor == x86_SAVED_STATE32;
0c530ab8
A
470}
471
472static inline x86_saved_state32_t *
473saved_state32(x86_saved_state_t *iss)
474{
0a7de745 475 return &iss->ss_32;
0c530ab8
A
476}
477
478static inline x86_saved_state64_t *
479saved_state64(x86_saved_state_t *iss)
480{
0a7de745 481 return &iss->ss_64;
0c530ab8
A
482}
483
484#endif /* XNU_KERNEL_PRIVATE */
1c79356b 485
0a7de745 486#endif /* _MACH_I386_THREAD_STATUS_H_ */