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1c79356b | 1 | /* |
91447636 | 2 | * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved. |
1c79356b | 3 | * |
6601e61a | 4 | * @APPLE_LICENSE_HEADER_START@ |
1c79356b | 5 | * |
6601e61a A |
6 | * The contents of this file constitute Original Code as defined in and |
7 | * are subject to the Apple Public Source License Version 1.1 (the | |
8 | * "License"). You may not use this file except in compliance with the | |
9 | * License. Please obtain a copy of the License at | |
10 | * http://www.apple.com/publicsource and read it before using this file. | |
8f6c56a5 | 11 | * |
6601e61a A |
12 | * This Original Code and all software distributed under the License are |
13 | * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
8f6c56a5 A |
14 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, |
15 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
6601e61a A |
16 | * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the |
17 | * License for the specific language governing rights and limitations | |
18 | * under the License. | |
8f6c56a5 | 19 | * |
6601e61a | 20 | * @APPLE_LICENSE_HEADER_END@ |
1c79356b A |
21 | */ |
22 | /* | |
23 | * @OSF_COPYRIGHT@ | |
24 | */ | |
25 | /* | |
26 | * Mach Operating System | |
27 | * Copyright (c) 1991,1990,1989 Carnegie Mellon University | |
28 | * All Rights Reserved. | |
29 | * | |
30 | * Permission to use, copy, modify and distribute this software and its | |
31 | * documentation is hereby granted, provided that both the copyright | |
32 | * notice and this permission notice appear in all copies of the | |
33 | * software, derivative works or modified versions, and any portions | |
34 | * thereof, and that both notices appear in supporting documentation. | |
35 | * | |
36 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" | |
37 | * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR | |
38 | * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. | |
39 | * | |
40 | * Carnegie Mellon requests users of this software to return to | |
41 | * | |
42 | * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU | |
43 | * School of Computer Science | |
44 | * Carnegie Mellon University | |
45 | * Pittsburgh PA 15213-3890 | |
46 | * | |
47 | * any improvements or extensions that they make and grant Carnegie Mellon | |
48 | * the rights to redistribute these changes. | |
49 | */ | |
50 | /* | |
51 | */ | |
52 | /* | |
53 | * File: thread_status.h | |
54 | * Author: Avadis Tevanian, Jr. | |
55 | * Date: 1985 | |
56 | * | |
57 | * This file contains the structure definitions for the thread | |
58 | * state as applied to I386 processors. | |
59 | */ | |
60 | ||
61 | #ifndef _MACH_I386_THREAD_STATUS_H_ | |
62 | #define _MACH_I386_THREAD_STATUS_H_ | |
63 | ||
91447636 | 64 | #include <mach/message.h> |
1c79356b A |
65 | #include <mach/i386/fp_reg.h> |
66 | #include <mach/i386/thread_state.h> | |
0c530ab8 A |
67 | #include <i386/eflags.h> |
68 | ||
69 | ||
70 | ||
1c79356b | 71 | /* |
0c530ab8 A |
72 | * the i386_xxxx form is kept for legacy purposes since these types |
73 | * are externally known... eventually they should be deprecated. | |
74 | * our internal implementation has moved to the following naming convention | |
6601e61a | 75 | * |
0c530ab8 A |
76 | * x86_xxxx32 names are used to deal with 32 bit states |
77 | * x86_xxxx64 names are used to deal with 64 bit states | |
78 | * x86_xxxx names are used to deal with either 32 or 64 bit states | |
79 | * via a self-describing mechanism | |
c0fea474 A |
80 | */ |
81 | ||
82 | ||
83 | ||
84 | /* | |
0c530ab8 A |
85 | * these are the legacy names which should be deprecated in the future |
86 | * they are externally known which is the only reason we don't just get | |
87 | * rid of them | |
88 | */ | |
89 | #define i386_THREAD_STATE 1 | |
90 | #define i386_FLOAT_STATE 2 | |
91 | #define i386_EXCEPTION_STATE 3 | |
92 | ||
93 | ||
94 | /* | |
c0fea474 A |
95 | * THREAD_STATE_FLAVOR_LIST 0 |
96 | * these are the supported flavors | |
1c79356b | 97 | */ |
c0fea474 A |
98 | #define x86_THREAD_STATE32 1 |
99 | #define x86_FLOAT_STATE32 2 | |
100 | #define x86_EXCEPTION_STATE32 3 | |
101 | #define x86_THREAD_STATE64 4 | |
102 | #define x86_FLOAT_STATE64 5 | |
103 | #define x86_EXCEPTION_STATE64 6 | |
104 | #define x86_THREAD_STATE 7 | |
105 | #define x86_FLOAT_STATE 8 | |
106 | #define x86_EXCEPTION_STATE 9 | |
107 | #define x86_DEBUG_STATE32 10 | |
108 | #define x86_DEBUG_STATE64 11 | |
109 | #define x86_DEBUG_STATE 12 | |
0c530ab8 | 110 | #define THREAD_STATE_NONE 13 |
8ad349bb | 111 | |
8ad349bb | 112 | |
8f6c56a5 | 113 | |
6601e61a A |
114 | /* |
115 | * Largest state on this machine: | |
116 | * (be sure mach/machine/thread_state.h matches!) | |
117 | */ | |
118 | #define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX | |
119 | ||
6601e61a A |
120 | |
121 | /* | |
0c530ab8 A |
122 | * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed |
123 | * an exception flavor will return if that is a defined flavor for that | |
124 | * platform. The macro must be manually updated to include all of the valid | |
125 | * exception flavors as defined above. | |
6601e61a | 126 | */ |
0c530ab8 A |
127 | #define VALID_THREAD_STATE_FLAVOR(x) \ |
128 | ((x == x86_THREAD_STATE32) || \ | |
129 | (x == x86_FLOAT_STATE32) || \ | |
130 | (x == x86_EXCEPTION_STATE32) || \ | |
131 | (x == x86_DEBUG_STATE32) || \ | |
132 | (x == x86_THREAD_STATE64) || \ | |
133 | (x == x86_FLOAT_STATE64) || \ | |
134 | (x == x86_EXCEPTION_STATE64) || \ | |
135 | (x == x86_DEBUG_STATE64) || \ | |
136 | (x == x86_THREAD_STATE) || \ | |
137 | (x == x86_FLOAT_STATE) || \ | |
138 | (x == x86_EXCEPTION_STATE) || \ | |
139 | (x == x86_DEBUG_STATE) || \ | |
140 | (x == THREAD_STATE_NONE)) | |
6601e61a | 141 | |
6601e61a | 142 | |
6601e61a | 143 | |
0c530ab8 A |
144 | struct x86_state_hdr { |
145 | int flavor; | |
146 | int count; | |
6601e61a | 147 | }; |
0c530ab8 | 148 | typedef struct x86_state_hdr x86_state_hdr_t; |
6601e61a | 149 | |
6601e61a | 150 | |
1c79356b | 151 | /* |
c0fea474 A |
152 | * Main thread state consists of |
153 | * general registers, segment registers, | |
154 | * eip and eflags. | |
1c79356b | 155 | */ |
c0fea474 | 156 | |
0c530ab8 | 157 | struct i386_thread_state { |
c0fea474 A |
158 | unsigned int eax; |
159 | unsigned int ebx; | |
160 | unsigned int ecx; | |
161 | unsigned int edx; | |
162 | unsigned int edi; | |
163 | unsigned int esi; | |
164 | unsigned int ebp; | |
165 | unsigned int esp; | |
166 | unsigned int ss; | |
167 | unsigned int eflags; | |
168 | unsigned int eip; | |
169 | unsigned int cs; | |
170 | unsigned int ds; | |
171 | unsigned int es; | |
172 | unsigned int fs; | |
173 | unsigned int gs; | |
0c530ab8 | 174 | } ; |
c0fea474 | 175 | |
0c530ab8 A |
176 | /* |
177 | * to be depecrated in the future | |
178 | */ | |
179 | typedef struct i386_thread_state i386_thread_state_t; | |
c0fea474 A |
180 | #define i386_THREAD_STATE_COUNT ((mach_msg_type_number_t) \ |
181 | ( sizeof (i386_thread_state_t) / sizeof (int) )) | |
182 | ||
0c530ab8 A |
183 | |
184 | typedef struct i386_thread_state x86_thread_state32_t; | |
c0fea474 A |
185 | #define x86_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \ |
186 | ( sizeof (x86_thread_state32_t) / sizeof (int) )) | |
187 | ||
188 | ||
189 | ||
190 | ||
191 | struct x86_thread_state64 { | |
192 | uint64_t rax; | |
193 | uint64_t rbx; | |
194 | uint64_t rcx; | |
195 | uint64_t rdx; | |
196 | uint64_t rdi; | |
197 | uint64_t rsi; | |
198 | uint64_t rbp; | |
199 | uint64_t rsp; | |
200 | uint64_t r8; | |
201 | uint64_t r9; | |
202 | uint64_t r10; | |
203 | uint64_t r11; | |
204 | uint64_t r12; | |
205 | uint64_t r13; | |
206 | uint64_t r14; | |
207 | uint64_t r15; | |
208 | uint64_t rip; | |
209 | uint64_t rflags; | |
210 | uint64_t cs; | |
211 | uint64_t fs; | |
212 | uint64_t gs; | |
213 | } ; | |
214 | ||
215 | ||
216 | typedef struct x86_thread_state64 x86_thread_state64_t; | |
217 | #define x86_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \ | |
218 | ( sizeof (x86_thread_state64_t) / sizeof (int) )) | |
219 | ||
220 | ||
221 | ||
222 | ||
223 | struct x86_thread_state { | |
224 | x86_state_hdr_t tsh; | |
225 | union { | |
226 | x86_thread_state32_t ts32; | |
227 | x86_thread_state64_t ts64; | |
228 | } uts; | |
229 | } ; | |
230 | ||
231 | ||
232 | typedef struct x86_thread_state x86_thread_state_t; | |
233 | #define x86_THREAD_STATE_COUNT ((mach_msg_type_number_t) \ | |
234 | ( sizeof (x86_thread_state_t) / sizeof (int) )) | |
235 | ||
236 | ||
237 | ||
238 | /* | |
239 | * Default segment register values. | |
240 | */ | |
241 | ||
242 | #define USER_CODE_SELECTOR 0x0017 | |
243 | #define USER_DATA_SELECTOR 0x001f | |
244 | #define KERN_CODE_SELECTOR 0x0008 | |
245 | #define KERN_DATA_SELECTOR 0x0010 | |
246 | ||
0c530ab8 A |
247 | typedef struct fp_control { |
248 | unsigned short invalid :1, | |
249 | denorm :1, | |
250 | zdiv :1, | |
251 | ovrfl :1, | |
252 | undfl :1, | |
253 | precis :1, | |
254 | :2, | |
255 | pc :2, | |
256 | #define FP_PREC_24B 0 | |
257 | #define FP_PREC_53B 2 | |
258 | #define FP_PREC_64B 3 | |
259 | rc :2, | |
260 | #define FP_RND_NEAR 0 | |
261 | #define FP_RND_DOWN 1 | |
262 | #define FP_RND_UP 2 | |
263 | #define FP_CHOP 3 | |
264 | /*inf*/ :1, | |
265 | :3; | |
266 | } fp_control_t; | |
c0fea474 | 267 | /* |
0c530ab8 | 268 | * Status word. |
4452a7af | 269 | */ |
89b3af67 | 270 | |
0c530ab8 A |
271 | typedef struct fp_status { |
272 | unsigned short invalid :1, | |
273 | denorm :1, | |
274 | zdiv :1, | |
275 | ovrfl :1, | |
276 | undfl :1, | |
277 | precis :1, | |
278 | stkflt :1, | |
279 | errsumm :1, | |
280 | c0 :1, | |
281 | c1 :1, | |
282 | c2 :1, | |
283 | tos :3, | |
284 | c3 :1, | |
285 | busy :1; | |
286 | } fp_status_t; | |
287 | ||
288 | /* defn of 80bit x87 FPU or MMX register */ | |
289 | struct mmst_reg { | |
290 | char mmst_reg[10]; | |
291 | char mmst_rsrv[6]; | |
292 | }; | |
293 | ||
294 | ||
295 | /* defn of 128 bit XMM regs */ | |
296 | struct xmm_reg { | |
297 | char xmm_reg[16]; | |
298 | }; | |
299 | ||
300 | /* | |
301 | * Floating point state. | |
302 | */ | |
4452a7af | 303 | |
0c530ab8 A |
304 | #define FP_STATE_BYTES 512 /* number of chars worth of data from fpu_fcw */ |
305 | ||
306 | /* For legacy reasons we need to leave the hw_state as char bytes */ | |
307 | struct i386_float_state { | |
308 | int fpu_reserved[2]; | |
309 | fp_control_t fpu_fcw; /* x87 FPU control word */ | |
310 | fp_status_t fpu_fsw; /* x87 FPU status word */ | |
311 | uint8_t fpu_ftw; /* x87 FPU tag word */ | |
312 | uint8_t fpu_rsrv1; /* reserved */ | |
313 | uint16_t fpu_fop; /* x87 FPU Opcode */ | |
314 | uint32_t fpu_ip; /* x87 FPU Instruction Pointer offset */ | |
315 | uint16_t fpu_cs; /* x87 FPU Instruction Pointer Selector */ | |
316 | uint16_t fpu_rsrv2; /* reserved */ | |
317 | uint32_t fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */ | |
318 | uint16_t fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */ | |
319 | uint16_t fpu_rsrv3; /* reserved */ | |
320 | uint32_t fpu_mxcsr; /* MXCSR Register state */ | |
321 | uint32_t fpu_mxcsrmask; /* MXCSR mask */ | |
322 | struct mmst_reg fpu_stmm0; /* ST0/MM0 */ | |
323 | struct mmst_reg fpu_stmm1; /* ST1/MM1 */ | |
324 | struct mmst_reg fpu_stmm2; /* ST2/MM2 */ | |
325 | struct mmst_reg fpu_stmm3; /* ST3/MM3 */ | |
326 | struct mmst_reg fpu_stmm4; /* ST4/MM4 */ | |
327 | struct mmst_reg fpu_stmm5; /* ST5/MM5 */ | |
328 | struct mmst_reg fpu_stmm6; /* ST6/MM6 */ | |
329 | struct mmst_reg fpu_stmm7; /* ST7/MM7 */ | |
330 | struct xmm_reg fpu_xmm0; /* XMM 0 */ | |
331 | struct xmm_reg fpu_xmm1; /* XMM 1 */ | |
332 | struct xmm_reg fpu_xmm2; /* XMM 2 */ | |
333 | struct xmm_reg fpu_xmm3; /* XMM 3 */ | |
334 | struct xmm_reg fpu_xmm4; /* XMM 4 */ | |
335 | struct xmm_reg fpu_xmm5; /* XMM 5 */ | |
336 | struct xmm_reg fpu_xmm6; /* XMM 6 */ | |
337 | struct xmm_reg fpu_xmm7; /* XMM 7 */ | |
338 | char fpu_rsrv4[14*16]; /* reserved */ | |
339 | int fpu_reserved1; | |
340 | }; | |
c0fea474 A |
341 | |
342 | ||
343 | /* | |
0c530ab8 | 344 | * to be depecrated in the future |
c0fea474 | 345 | */ |
0c530ab8 A |
346 | typedef struct i386_float_state i386_float_state_t; |
347 | #define i386_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \ | |
348 | (sizeof(i386_float_state_t)/sizeof(unsigned int))) | |
349 | ||
350 | typedef struct i386_float_state x86_float_state32_t; | |
c0fea474 A |
351 | #define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \ |
352 | (sizeof(x86_float_state32_t)/sizeof(unsigned int))) | |
353 | ||
354 | ||
355 | struct x86_float_state64 { | |
356 | int fpu_reserved[2]; | |
357 | fp_control_t fpu_fcw; /* x87 FPU control word */ | |
358 | fp_status_t fpu_fsw; /* x87 FPU status word */ | |
359 | uint8_t fpu_ftw; /* x87 FPU tag word */ | |
360 | uint8_t fpu_rsrv1; /* reserved */ | |
361 | uint16_t fpu_fop; /* x87 FPU Opcode */ | |
362 | uint32_t fpu_ip; /* x87 FPU Instruction Pointer offset */ | |
363 | uint16_t fpu_cs; /* x87 FPU Instruction Pointer Selector */ | |
364 | uint16_t fpu_rsrv2; /* reserved */ | |
365 | uint32_t fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */ | |
366 | uint16_t fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */ | |
367 | uint16_t fpu_rsrv3; /* reserved */ | |
368 | uint32_t fpu_mxcsr; /* MXCSR Register state */ | |
369 | uint32_t fpu_mxcsrmask; /* MXCSR mask */ | |
370 | struct mmst_reg fpu_stmm0; /* ST0/MM0 */ | |
371 | struct mmst_reg fpu_stmm1; /* ST1/MM1 */ | |
372 | struct mmst_reg fpu_stmm2; /* ST2/MM2 */ | |
373 | struct mmst_reg fpu_stmm3; /* ST3/MM3 */ | |
374 | struct mmst_reg fpu_stmm4; /* ST4/MM4 */ | |
375 | struct mmst_reg fpu_stmm5; /* ST5/MM5 */ | |
376 | struct mmst_reg fpu_stmm6; /* ST6/MM6 */ | |
377 | struct mmst_reg fpu_stmm7; /* ST7/MM7 */ | |
378 | struct xmm_reg fpu_xmm0; /* XMM 0 */ | |
379 | struct xmm_reg fpu_xmm1; /* XMM 1 */ | |
380 | struct xmm_reg fpu_xmm2; /* XMM 2 */ | |
381 | struct xmm_reg fpu_xmm3; /* XMM 3 */ | |
382 | struct xmm_reg fpu_xmm4; /* XMM 4 */ | |
383 | struct xmm_reg fpu_xmm5; /* XMM 5 */ | |
384 | struct xmm_reg fpu_xmm6; /* XMM 6 */ | |
385 | struct xmm_reg fpu_xmm7; /* XMM 7 */ | |
386 | struct xmm_reg fpu_xmm8; /* XMM 8 */ | |
387 | struct xmm_reg fpu_xmm9; /* XMM 9 */ | |
388 | struct xmm_reg fpu_xmm10; /* XMM 10 */ | |
389 | struct xmm_reg fpu_xmm11; /* XMM 11 */ | |
390 | struct xmm_reg fpu_xmm12; /* XMM 12 */ | |
391 | struct xmm_reg fpu_xmm13; /* XMM 13 */ | |
392 | struct xmm_reg fpu_xmm14; /* XMM 14 */ | |
393 | struct xmm_reg fpu_xmm15; /* XMM 15 */ | |
394 | char fpu_rsrv4[6*16]; /* reserved */ | |
395 | int fpu_reserved1; | |
396 | }; | |
397 | ||
398 | typedef struct x86_float_state64 x86_float_state64_t; | |
399 | #define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \ | |
400 | (sizeof(x86_float_state64_t)/sizeof(unsigned int))) | |
401 | ||
402 | ||
403 | ||
404 | ||
405 | struct x86_float_state { | |
406 | x86_state_hdr_t fsh; | |
407 | union { | |
408 | x86_float_state32_t fs32; | |
409 | x86_float_state64_t fs64; | |
410 | } ufs; | |
411 | } ; | |
412 | ||
413 | ||
414 | typedef struct x86_float_state x86_float_state_t; | |
415 | #define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \ | |
416 | ( sizeof (x86_float_state_t) / sizeof (int) )) | |
417 | ||
418 | ||
419 | ||
420 | /* | |
421 | * Extra state that may be | |
422 | * useful to exception handlers. | |
423 | */ | |
424 | ||
425 | struct i386_exception_state { | |
426 | unsigned int trapno; | |
427 | unsigned int err; | |
428 | unsigned int faultvaddr; | |
429 | }; | |
430 | ||
0c530ab8 A |
431 | /* |
432 | * to be depecrated in the future | |
433 | */ | |
434 | typedef struct i386_exception_state i386_exception_state_t; | |
435 | #define i386_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \ | |
436 | ( sizeof (i386_exception_state_t) / sizeof (int) )) | |
437 | ||
438 | #define I386_EXCEPTION_STATE_COUNT i386_EXCEPTION_STATE_COUNT | |
439 | ||
c0fea474 A |
440 | typedef struct i386_exception_state x86_exception_state32_t; |
441 | #define x86_EXCEPTION_STATE32_COUNT ((mach_msg_type_number_t) \ | |
442 | ( sizeof (x86_exception_state32_t) / sizeof (int) )) | |
443 | ||
444 | struct x86_debug_state32 { | |
445 | unsigned int dr0; | |
446 | unsigned int dr1; | |
447 | unsigned int dr2; | |
448 | unsigned int dr3; | |
449 | unsigned int dr4; | |
450 | unsigned int dr5; | |
451 | unsigned int dr6; | |
452 | unsigned int dr7; | |
453 | }; | |
454 | ||
455 | typedef struct x86_debug_state32 x86_debug_state32_t; | |
456 | #define x86_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \ | |
457 | ( sizeof (x86_debug_state32_t) / sizeof (int) )) | |
458 | #define X86_DEBUG_STATE32_COUNT x86_DEBUG_STATE32_COUNT | |
459 | ||
460 | ||
461 | struct x86_exception_state64 { | |
462 | unsigned int trapno; | |
463 | unsigned int err; | |
464 | uint64_t faultvaddr; | |
465 | }; | |
466 | ||
467 | typedef struct x86_exception_state64 x86_exception_state64_t; | |
468 | #define x86_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \ | |
469 | ( sizeof (x86_exception_state64_t) / sizeof (int) )) | |
470 | ||
471 | ||
472 | struct x86_debug_state64 { | |
473 | uint64_t dr0; | |
474 | uint64_t dr1; | |
475 | uint64_t dr2; | |
476 | uint64_t dr3; | |
477 | uint64_t dr4; | |
478 | uint64_t dr5; | |
479 | uint64_t dr6; | |
480 | uint64_t dr7; | |
481 | }; | |
482 | ||
483 | ||
484 | typedef struct x86_debug_state64 x86_debug_state64_t; | |
485 | #define x86_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \ | |
486 | ( sizeof (x86_debug_state64_t) / sizeof (int) )) | |
487 | ||
488 | #define X86_DEBUG_STATE64_COUNT x86_DEBUG_STATE64_COUNT | |
489 | ||
490 | ||
491 | ||
492 | struct x86_exception_state { | |
493 | x86_state_hdr_t esh; | |
494 | union { | |
495 | x86_exception_state32_t es32; | |
496 | x86_exception_state64_t es64; | |
497 | } ues; | |
498 | } ; | |
499 | ||
500 | ||
501 | typedef struct x86_exception_state x86_exception_state_t; | |
502 | #define x86_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \ | |
503 | ( sizeof (x86_exception_state_t) / sizeof (int) )) | |
504 | ||
505 | struct x86_debug_state { | |
506 | x86_state_hdr_t dsh; | |
507 | union { | |
508 | x86_debug_state32_t ds32; | |
509 | x86_debug_state64_t ds64; | |
510 | } uds; | |
511 | }; | |
512 | ||
513 | ||
514 | ||
515 | typedef struct x86_debug_state x86_debug_state_t; | |
516 | #define x86_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \ | |
517 | (sizeof(x86_debug_state_t)/sizeof(unsigned int))) | |
518 | ||
0c530ab8 A |
519 | /* |
520 | * Machine-independent way for servers and Mach's exception mechanism to | |
521 | * choose the most efficient state flavor for exception RPC's: | |
522 | */ | |
523 | #define MACHINE_THREAD_STATE x86_THREAD_STATE | |
524 | #define MACHINE_THREAD_STATE_COUNT x86_THREAD_STATE_COUNT | |
525 | ||
526 | ||
527 | #ifdef XNU_KERNEL_PRIVATE | |
528 | ||
529 | #define x86_SAVED_STATE32 THREAD_STATE_NONE + 1 | |
530 | #define x86_SAVED_STATE64 THREAD_STATE_NONE + 2 | |
531 | ||
532 | #define OLD_i386_THREAD_STATE -1 | |
533 | ||
4452a7af A |
534 | |
535 | /* | |
0c530ab8 A |
536 | * when reloading the segment registers on |
537 | * a return out of the kernel, we may take | |
538 | * a GeneralProtection or SegmentNotPresent | |
539 | * fault if one or more of the segment | |
540 | * registers in the saved state was improperly | |
541 | * specified via an x86_THREAD_STATE32 call | |
542 | * the frame we push on top of the existing | |
543 | * save area looks like this... we need to | |
544 | * carry this as part of the save area | |
545 | * in case we get hit so that we have a big | |
546 | * enough stack | |
547 | */ | |
548 | struct x86_seg_load_fault32 { | |
549 | unsigned int trapno; | |
550 | unsigned int err; | |
551 | unsigned int eip; | |
552 | unsigned int cs; | |
553 | unsigned int efl; | |
554 | }; | |
555 | ||
556 | ||
557 | /* | |
558 | * Subset of saved state stored by processor on kernel-to-kernel | |
559 | * trap. (Used by ddb to examine state guaranteed to be present | |
560 | * on all traps into debugger.) | |
561 | */ | |
562 | struct x86_saved_state32_from_kernel { | |
563 | unsigned int gs; | |
564 | unsigned int fs; | |
565 | unsigned int es; | |
566 | unsigned int ds; | |
567 | unsigned int edi; | |
568 | unsigned int esi; | |
569 | unsigned int ebp; | |
570 | unsigned int cr2; /* kernel esp stored by pusha - we save cr2 here later */ | |
571 | unsigned int ebx; | |
572 | unsigned int edx; | |
573 | unsigned int ecx; | |
574 | unsigned int eax; | |
575 | unsigned int trapno; | |
576 | unsigned int err; | |
577 | unsigned int eip; | |
578 | unsigned int cs; | |
579 | unsigned int efl; | |
580 | }; | |
581 | ||
582 | /* | |
583 | * The format in which thread state is saved by Mach on this machine. This | |
584 | * state flavor is most efficient for exception RPC's to kernel-loaded | |
585 | * servers, because copying can be avoided: | |
1c79356b | 586 | */ |
c0fea474 | 587 | |
0c530ab8 A |
588 | struct x86_saved_state32 { |
589 | unsigned int gs; | |
590 | unsigned int fs; | |
591 | unsigned int es; | |
592 | unsigned int ds; | |
593 | unsigned int edi; | |
594 | unsigned int esi; | |
595 | unsigned int ebp; | |
596 | unsigned int cr2; /* kernel esp stored by pusha - we save cr2 here later */ | |
597 | unsigned int ebx; | |
598 | unsigned int edx; | |
599 | unsigned int ecx; | |
600 | unsigned int eax; | |
601 | unsigned int trapno; | |
602 | unsigned int err; | |
603 | unsigned int eip; | |
604 | unsigned int cs; | |
605 | unsigned int efl; | |
606 | unsigned int uesp; | |
607 | unsigned int ss; | |
608 | }; | |
609 | typedef struct x86_saved_state32 x86_saved_state32_t; | |
6601e61a | 610 | |
0c530ab8 A |
611 | #define x86_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \ |
612 | (sizeof (x86_saved_state32_t)/sizeof(unsigned int))) | |
613 | ||
614 | struct x86_saved_state32_tagged { | |
615 | uint32_t tag; | |
616 | struct x86_saved_state32 state; | |
617 | }; | |
618 | typedef struct x86_saved_state32_tagged x86_saved_state32_tagged_t; | |
619 | ||
620 | struct x86_sframe32 { | |
621 | /* | |
622 | * in case we throw a fault reloading | |
623 | * segment registers on a return out of | |
624 | * the kernel... the 'slf' state is only kept | |
625 | * long enough to rejigger (i.e. restore | |
626 | * the save area to its original state) | |
627 | * the save area and throw the appropriate | |
628 | * kernel trap pointing to the 'ssf' state | |
629 | */ | |
630 | struct x86_seg_load_fault32 slf; | |
631 | struct x86_saved_state32_tagged ssf; | |
632 | }; | |
633 | typedef struct x86_sframe32 x86_sframe32_t; | |
634 | ||
635 | ||
636 | ||
637 | /* | |
638 | * This is the state pushed onto the 64-bit interrupt stack | |
639 | * on any exception/trap/interrupt. | |
640 | */ | |
641 | struct x86_64_intr_stack_frame { | |
642 | uint32_t trapno; | |
643 | uint32_t trapfn; | |
644 | uint64_t err; | |
645 | uint64_t rip; | |
646 | uint64_t cs; | |
647 | uint64_t rflags; | |
648 | uint64_t rsp; | |
649 | uint64_t ss; | |
650 | }; | |
651 | typedef struct x86_64_intr_stack_frame x86_64_intr_stack_frame_t; | |
652 | ||
653 | /* | |
654 | * This defines the state saved before entry into compatibility mode. | |
655 | * The machine state is pushed automatically and the compat state is | |
656 | * synthethized in the exception handling code. | |
657 | */ | |
658 | struct x86_saved_state_compat32 { | |
659 | struct x86_saved_state32_tagged iss32; | |
660 | uint32_t pad_for_16byte_alignment[2]; | |
661 | struct x86_64_intr_stack_frame isf64; | |
662 | }; | |
663 | typedef struct x86_saved_state_compat32 x86_saved_state_compat32_t; | |
664 | ||
665 | ||
666 | struct x86_sframe_compat32 { | |
667 | struct x86_64_intr_stack_frame slf; | |
668 | uint32_t pad_for_16byte_alignment[2]; | |
669 | struct x86_saved_state_compat32 ssf; | |
670 | uint32_t empty[4]; | |
671 | }; | |
672 | typedef struct x86_sframe_compat32 x86_sframe_compat32_t; | |
673 | ||
674 | ||
675 | ||
676 | /* | |
677 | * thread state format for task running in 64bit long mode | |
678 | * in long mode, the same hardware frame is always pushed regardless | |
679 | * of whether there was a change in privlege level... therefore, there | |
680 | * is no need for an x86_saved_state64_from_kernel variant | |
681 | */ | |
682 | ||
683 | struct x86_saved_state64 { | |
684 | /* | |
685 | * saved state organized to reflect the | |
686 | * system call ABI register convention | |
687 | * so that we can just pass a pointer | |
688 | * to the saved state when calling through | |
689 | * to the actual system call functions | |
690 | * the ABI limits us to 6 args passed in | |
691 | * registers... I've add v_arg6 - v_arg8 | |
692 | * to accomodate our most 'greedy' system | |
693 | * calls (both BSD and MACH)... the individual | |
694 | * system call handlers will fill these in | |
695 | * via copyin if needed... | |
696 | */ | |
697 | uint64_t rdi; /* arg0 for system call */ | |
698 | uint64_t rsi; | |
699 | uint64_t rdx; | |
700 | uint64_t r10; | |
701 | uint64_t r8; | |
702 | uint64_t r9; /* arg5 for system call */ | |
703 | uint64_t v_arg6; | |
704 | uint64_t v_arg7; | |
705 | uint64_t v_arg8; | |
706 | ||
707 | uint64_t cr2; | |
708 | uint64_t r15; | |
709 | uint64_t r14; | |
710 | uint64_t r13; | |
711 | uint64_t r12; | |
712 | uint64_t r11; | |
713 | uint64_t rbp; | |
714 | uint64_t rbx; | |
715 | uint64_t rcx; | |
716 | uint64_t rax; | |
717 | ||
718 | uint32_t gs; | |
719 | uint32_t fs; | |
720 | struct x86_64_intr_stack_frame isf; | |
721 | }; | |
722 | typedef struct x86_saved_state64 x86_saved_state64_t; | |
723 | #define x86_SAVED_STATE64_COUNT ((mach_msg_type_number_t) \ | |
724 | (sizeof (struct x86_saved_state64)/sizeof(unsigned int))) | |
725 | ||
726 | struct x86_saved_state64_tagged { | |
727 | uint32_t tag; | |
728 | x86_saved_state64_t state; | |
729 | }; | |
730 | typedef struct x86_saved_state64_tagged x86_saved_state64_tagged_t; | |
731 | ||
732 | struct x86_sframe64 { | |
733 | struct x86_64_intr_stack_frame slf; | |
734 | uint32_t pad_for_16byte_alignment[3]; | |
735 | struct x86_saved_state64_tagged ssf; | |
736 | }; | |
737 | typedef struct x86_sframe64 x86_sframe64_t; | |
738 | ||
739 | extern uint32_t get_eflags_exportmask(void); | |
740 | /* | |
741 | * Unified, tagged saved state: | |
742 | */ | |
743 | typedef struct { | |
744 | uint32_t flavor; | |
745 | union { | |
746 | x86_saved_state32_t ss_32; | |
747 | x86_saved_state64_t ss_64; | |
748 | } uss; | |
749 | } x86_saved_state_t; | |
750 | #define ss_32 uss.ss_32 | |
751 | #define ss_64 uss.ss_64 | |
752 | ||
753 | static inline boolean_t | |
754 | is_saved_state64(x86_saved_state_t *iss) | |
755 | { | |
756 | return (iss->flavor == x86_SAVED_STATE64); | |
757 | } | |
758 | ||
759 | static inline boolean_t | |
760 | is_saved_state32(x86_saved_state_t *iss) | |
761 | { | |
762 | return (iss->flavor == x86_SAVED_STATE32); | |
763 | } | |
764 | ||
765 | static inline x86_saved_state32_t * | |
766 | saved_state32(x86_saved_state_t *iss) | |
767 | { | |
768 | return &iss->ss_32; | |
769 | } | |
770 | ||
771 | static inline x86_saved_state64_t * | |
772 | saved_state64(x86_saved_state_t *iss) | |
773 | { | |
774 | return &iss->ss_64; | |
775 | } | |
776 | ||
777 | #endif /* XNU_KERNEL_PRIVATE */ | |
1c79356b A |
778 | |
779 | #endif /* _MACH_I386_THREAD_STATUS_H_ */ |