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1c79356b 1/*
2d21ac55 2 * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
1c79356b 3 *
2d21ac55 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b 5 *
2d21ac55
A
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
8f6c56a5 14 *
2d21ac55
A
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5
A
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55
A
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
8f6c56a5 25 *
2d21ac55 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b
A
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58/*
59 * File: thread_status.h
60 * Author: Avadis Tevanian, Jr.
61 * Date: 1985
62 *
63 * This file contains the structure definitions for the thread
64 * state as applied to I386 processors.
65 */
66
67#ifndef _MACH_I386_THREAD_STATUS_H_
68#define _MACH_I386_THREAD_STATUS_H_
69
2d21ac55 70#include <mach/i386/_structs.h>
91447636 71#include <mach/message.h>
1c79356b
A
72#include <mach/i386/fp_reg.h>
73#include <mach/i386/thread_state.h>
0c530ab8
A
74#include <i386/eflags.h>
75
1c79356b 76/*
0c530ab8
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77 * the i386_xxxx form is kept for legacy purposes since these types
78 * are externally known... eventually they should be deprecated.
79 * our internal implementation has moved to the following naming convention
6601e61a 80 *
0c530ab8
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81 * x86_xxxx32 names are used to deal with 32 bit states
82 * x86_xxxx64 names are used to deal with 64 bit states
83 * x86_xxxx names are used to deal with either 32 or 64 bit states
84 * via a self-describing mechanism
c0fea474
A
85 */
86
c0fea474 87/*
0c530ab8
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88 * these are the legacy names which should be deprecated in the future
89 * they are externally known which is the only reason we don't just get
90 * rid of them
91 */
92#define i386_THREAD_STATE 1
93#define i386_FLOAT_STATE 2
94#define i386_EXCEPTION_STATE 3
95
0c530ab8 96/*
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97 * THREAD_STATE_FLAVOR_LIST 0
98 * these are the supported flavors
1c79356b 99 */
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100#define x86_THREAD_STATE32 1
101#define x86_FLOAT_STATE32 2
102#define x86_EXCEPTION_STATE32 3
103#define x86_THREAD_STATE64 4
104#define x86_FLOAT_STATE64 5
105#define x86_EXCEPTION_STATE64 6
106#define x86_THREAD_STATE 7
107#define x86_FLOAT_STATE 8
108#define x86_EXCEPTION_STATE 9
109#define x86_DEBUG_STATE32 10
110#define x86_DEBUG_STATE64 11
111#define x86_DEBUG_STATE 12
0c530ab8 112#define THREAD_STATE_NONE 13
060df5ea
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113/* 15 and 16 are used for the internal x86_SAVED_STATE flavours */
114#define x86_AVX_STATE32 16
115#define x86_AVX_STATE64 17
116
8ad349bb 117
6601e61a
A
118/*
119 * Largest state on this machine:
120 * (be sure mach/machine/thread_state.h matches!)
121 */
122#define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX
123
6601e61a 124/*
0c530ab8
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125 * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed
126 * an exception flavor will return if that is a defined flavor for that
127 * platform. The macro must be manually updated to include all of the valid
128 * exception flavors as defined above.
6601e61a 129 */
0c530ab8 130#define VALID_THREAD_STATE_FLAVOR(x) \
2d21ac55
A
131 ((x == x86_THREAD_STATE32) || \
132 (x == x86_FLOAT_STATE32) || \
133 (x == x86_EXCEPTION_STATE32) || \
134 (x == x86_DEBUG_STATE32) || \
135 (x == x86_THREAD_STATE64) || \
136 (x == x86_FLOAT_STATE64) || \
137 (x == x86_EXCEPTION_STATE64) || \
138 (x == x86_DEBUG_STATE64) || \
139 (x == x86_THREAD_STATE) || \
140 (x == x86_FLOAT_STATE) || \
141 (x == x86_EXCEPTION_STATE) || \
142 (x == x86_DEBUG_STATE) || \
060df5ea
A
143 (x == x86_AVX_STATE32) || \
144 (x == x86_AVX_STATE64) || \
2d21ac55 145 (x == THREAD_STATE_NONE))
6601e61a 146
0c530ab8 147struct x86_state_hdr {
2d21ac55
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148 int flavor;
149 int count;
6601e61a 150};
0c530ab8 151typedef struct x86_state_hdr x86_state_hdr_t;
6601e61a 152
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153/*
154 * Default segment register values.
155 */
156
157#define USER_CODE_SELECTOR 0x0017
158#define USER_DATA_SELECTOR 0x001f
159#define KERN_CODE_SELECTOR 0x0008
160#define KERN_DATA_SELECTOR 0x0010
161
c0fea474 162/*
2d21ac55 163 * to be deprecated in the future
4452a7af 164 */
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165typedef _STRUCT_X86_THREAD_STATE32 i386_thread_state_t;
166#define i386_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
167 ( sizeof (i386_thread_state_t) / sizeof (int) ))
89b3af67 168
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169typedef _STRUCT_X86_THREAD_STATE32 x86_thread_state32_t;
170#define x86_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \
171 ( sizeof (x86_thread_state32_t) / sizeof (int) ))
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172
173/*
2d21ac55 174 * to be deprecated in the future
c0fea474 175 */
2d21ac55 176typedef _STRUCT_X86_FLOAT_STATE32 i386_float_state_t;
0c530ab8
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177#define i386_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
178 (sizeof(i386_float_state_t)/sizeof(unsigned int)))
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179
180typedef _STRUCT_X86_FLOAT_STATE32 x86_float_state32_t;
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181#define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \
182 (sizeof(x86_float_state32_t)/sizeof(unsigned int)))
c0fea474 183
060df5ea
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184typedef _STRUCT_X86_AVX_STATE32 x86_avx_state32_t;
185#define x86_AVX_STATE32_COUNT ((mach_msg_type_number_t) \
186 (sizeof(x86_avx_state32_t)/sizeof(unsigned int)))
187
c0fea474 188/*
2d21ac55 189 * to be deprecated in the future
c0fea474 190 */
2d21ac55 191typedef _STRUCT_X86_EXCEPTION_STATE32 i386_exception_state_t;
0c530ab8
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192#define i386_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
193 ( sizeof (i386_exception_state_t) / sizeof (int) ))
194
2d21ac55 195typedef _STRUCT_X86_EXCEPTION_STATE32 x86_exception_state32_t;
c0fea474
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196#define x86_EXCEPTION_STATE32_COUNT ((mach_msg_type_number_t) \
197 ( sizeof (x86_exception_state32_t) / sizeof (int) ))
198
2d21ac55 199#define I386_EXCEPTION_STATE_COUNT i386_EXCEPTION_STATE_COUNT
c0fea474 200
2d21ac55 201typedef _STRUCT_X86_DEBUG_STATE32 x86_debug_state32_t;
c0fea474
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202#define x86_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \
203 ( sizeof (x86_debug_state32_t) / sizeof (int) ))
c0fea474 204
2d21ac55 205#define X86_DEBUG_STATE32_COUNT x86_DEBUG_STATE32_COUNT
c0fea474 206
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207typedef _STRUCT_X86_THREAD_STATE64 x86_thread_state64_t;
208#define x86_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \
209 ( sizeof (x86_thread_state64_t) / sizeof (int) ))
c0fea474 210
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211typedef _STRUCT_X86_FLOAT_STATE64 x86_float_state64_t;
212#define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \
213 (sizeof(x86_float_state64_t)/sizeof(unsigned int)))
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214
215typedef _STRUCT_X86_AVX_STATE64 x86_avx_state64_t;
216#define x86_AVX_STATE64_COUNT ((mach_msg_type_number_t) \
217 (sizeof(x86_avx_state64_t)/sizeof(unsigned int)))
218
2d21ac55 219typedef _STRUCT_X86_EXCEPTION_STATE64 x86_exception_state64_t;
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220#define x86_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \
221 ( sizeof (x86_exception_state64_t) / sizeof (int) ))
222
2d21ac55 223#define X86_EXCEPTION_STATE64_COUNT x86_EXCEPTION_STATE64_COUNT
c0fea474 224
2d21ac55 225typedef _STRUCT_X86_DEBUG_STATE64 x86_debug_state64_t;
c0fea474
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226#define x86_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \
227 ( sizeof (x86_debug_state64_t) / sizeof (int) ))
228
229#define X86_DEBUG_STATE64_COUNT x86_DEBUG_STATE64_COUNT
230
2d21ac55
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231/*
232 * Combined thread, float and exception states
233 */
234struct x86_thread_state {
235 x86_state_hdr_t tsh;
236 union {
237 x86_thread_state32_t ts32;
238 x86_thread_state64_t ts64;
239 } uts;
240};
c0fea474 241
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242struct x86_float_state {
243 x86_state_hdr_t fsh;
244 union {
245 x86_float_state32_t fs32;
246 x86_float_state64_t fs64;
247 } ufs;
248};
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249
250struct x86_exception_state {
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251 x86_state_hdr_t esh;
252 union {
253 x86_exception_state32_t es32;
254 x86_exception_state64_t es64;
255 } ues;
256};
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257
258struct x86_debug_state {
259 x86_state_hdr_t dsh;
260 union {
261 x86_debug_state32_t ds32;
262 x86_debug_state64_t ds64;
263 } uds;
264};
265
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266typedef struct x86_thread_state x86_thread_state_t;
267#define x86_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
268 ( sizeof (x86_thread_state_t) / sizeof (int) ))
c0fea474 269
2d21ac55
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270typedef struct x86_float_state x86_float_state_t;
271#define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
272 (sizeof(x86_float_state_t)/sizeof(unsigned int)))
273
274typedef struct x86_exception_state x86_exception_state_t;
275#define x86_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
276 (sizeof(x86_exception_state_t)/sizeof(unsigned int)))
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277
278typedef struct x86_debug_state x86_debug_state_t;
279#define x86_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \
280 (sizeof(x86_debug_state_t)/sizeof(unsigned int)))
281
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282/*
283 * Machine-independent way for servers and Mach's exception mechanism to
284 * choose the most efficient state flavor for exception RPC's:
285 */
286#define MACHINE_THREAD_STATE x86_THREAD_STATE
287#define MACHINE_THREAD_STATE_COUNT x86_THREAD_STATE_COUNT
288
4452a7af 289/*
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290 * when reloading the segment registers on
291 * a return out of the kernel, we may take
292 * a GeneralProtection or SegmentNotPresent
293 * fault if one or more of the segment
294 * registers in the saved state was improperly
295 * specified via an x86_THREAD_STATE32 call
296 * the frame we push on top of the existing
297 * save area looks like this... we need to
298 * carry this as part of the save area
299 * in case we get hit so that we have a big
300 * enough stack
301 */
302struct x86_seg_load_fault32 {
2d21ac55
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303 unsigned int trapno;
304 unsigned int err;
305 unsigned int eip;
306 unsigned int cs;
307 unsigned int efl;
0c530ab8
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308};
309
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310#ifdef XNU_KERNEL_PRIVATE
311
312#define x86_SAVED_STATE32 THREAD_STATE_NONE + 1
313#define x86_SAVED_STATE64 THREAD_STATE_NONE + 2
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314
315/*
316 * Subset of saved state stored by processor on kernel-to-kernel
317 * trap. (Used by ddb to examine state guaranteed to be present
318 * on all traps into debugger.)
319 */
320struct x86_saved_state32_from_kernel {
321 unsigned int gs;
322 unsigned int fs;
323 unsigned int es;
324 unsigned int ds;
325 unsigned int edi;
326 unsigned int esi;
327 unsigned int ebp;
328 unsigned int cr2; /* kernel esp stored by pusha - we save cr2 here later */
329 unsigned int ebx;
330 unsigned int edx;
331 unsigned int ecx;
332 unsigned int eax;
333 unsigned int trapno;
334 unsigned int err;
335 unsigned int eip;
336 unsigned int cs;
337 unsigned int efl;
338};
339
340/*
341 * The format in which thread state is saved by Mach on this machine. This
342 * state flavor is most efficient for exception RPC's to kernel-loaded
343 * servers, because copying can be avoided:
1c79356b 344 */
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345struct x86_saved_state32 {
346 unsigned int gs;
347 unsigned int fs;
348 unsigned int es;
349 unsigned int ds;
350 unsigned int edi;
351 unsigned int esi;
352 unsigned int ebp;
353 unsigned int cr2; /* kernel esp stored by pusha - we save cr2 here later */
354 unsigned int ebx;
355 unsigned int edx;
356 unsigned int ecx;
357 unsigned int eax;
358 unsigned int trapno;
359 unsigned int err;
360 unsigned int eip;
361 unsigned int cs;
362 unsigned int efl;
363 unsigned int uesp;
364 unsigned int ss;
365};
366typedef struct x86_saved_state32 x86_saved_state32_t;
6601e61a 367
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368#define x86_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \
369 (sizeof (x86_saved_state32_t)/sizeof(unsigned int)))
370
b0d623f7 371#pragma pack(4)
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372struct x86_saved_state32_tagged {
373 uint32_t tag;
374 struct x86_saved_state32 state;
375};
376typedef struct x86_saved_state32_tagged x86_saved_state32_tagged_t;
377
378struct x86_sframe32 {
4a3eedf9 379 /*
0c530ab8
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380 * in case we throw a fault reloading
381 * segment registers on a return out of
382 * the kernel... the 'slf' state is only kept
383 * long enough to rejigger (i.e. restore
384 * the save area to its original state)
385 * the save area and throw the appropriate
386 * kernel trap pointing to the 'ssf' state
387 */
388 struct x86_seg_load_fault32 slf;
389 struct x86_saved_state32_tagged ssf;
390};
391typedef struct x86_sframe32 x86_sframe32_t;
392
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393/*
394 * This is the state pushed onto the 64-bit interrupt stack
395 * on any exception/trap/interrupt.
396 */
397struct x86_64_intr_stack_frame {
398 uint32_t trapno;
b0d623f7
A
399#if defined(__LP64__) && defined(KERNEL)
400 uint32_t _pad;
401 uint64_t trapfn;
402#else
0c530ab8 403 uint32_t trapfn;
b0d623f7 404#endif
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A
405 uint64_t err;
406 uint64_t rip;
407 uint64_t cs;
408 uint64_t rflags;
409 uint64_t rsp;
410 uint64_t ss;
411};
412typedef struct x86_64_intr_stack_frame x86_64_intr_stack_frame_t;
413
414/*
415 * This defines the state saved before entry into compatibility mode.
416 * The machine state is pushed automatically and the compat state is
417 * synthethized in the exception handling code.
418 */
419struct x86_saved_state_compat32 {
420 struct x86_saved_state32_tagged iss32;
b0d623f7
A
421#if defined(__LP64__) && defined(KERNEL)
422#else
0c530ab8 423 uint32_t pad_for_16byte_alignment[2];
b0d623f7 424#endif
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A
425 struct x86_64_intr_stack_frame isf64;
426};
427typedef struct x86_saved_state_compat32 x86_saved_state_compat32_t;
428
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429struct x86_sframe_compat32 {
430 struct x86_64_intr_stack_frame slf;
b0d623f7
A
431#if defined(__LP64__) && defined(KERNEL)
432#else
433 uint32_t pad_for_16byte_alignment[2];
434#endif
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435 struct x86_saved_state_compat32 ssf;
436 uint32_t empty[4];
437};
438typedef struct x86_sframe_compat32 x86_sframe_compat32_t;
439
0c530ab8
A
440/*
441 * thread state format for task running in 64bit long mode
442 * in long mode, the same hardware frame is always pushed regardless
443 * of whether there was a change in privlege level... therefore, there
444 * is no need for an x86_saved_state64_from_kernel variant
445 */
0c530ab8
A
446struct x86_saved_state64 {
447 /*
448 * saved state organized to reflect the
449 * system call ABI register convention
450 * so that we can just pass a pointer
451 * to the saved state when calling through
452 * to the actual system call functions
453 * the ABI limits us to 6 args passed in
454 * registers... I've add v_arg6 - v_arg8
455 * to accomodate our most 'greedy' system
456 * calls (both BSD and MACH)... the individual
457 * system call handlers will fill these in
458 * via copyin if needed...
459 */
460 uint64_t rdi; /* arg0 for system call */
461 uint64_t rsi;
462 uint64_t rdx;
463 uint64_t r10;
464 uint64_t r8;
465 uint64_t r9; /* arg5 for system call */
466 uint64_t v_arg6;
467 uint64_t v_arg7;
468 uint64_t v_arg8;
469
470 uint64_t cr2;
471 uint64_t r15;
472 uint64_t r14;
473 uint64_t r13;
474 uint64_t r12;
475 uint64_t r11;
476 uint64_t rbp;
477 uint64_t rbx;
478 uint64_t rcx;
479 uint64_t rax;
480
481 uint32_t gs;
482 uint32_t fs;
b0d623f7
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483#ifdef __x86_64__
484 uint32_t _pad_for_alignment[3];
485#endif
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486 struct x86_64_intr_stack_frame isf;
487};
488typedef struct x86_saved_state64 x86_saved_state64_t;
489#define x86_SAVED_STATE64_COUNT ((mach_msg_type_number_t) \
490 (sizeof (struct x86_saved_state64)/sizeof(unsigned int)))
491
492struct x86_saved_state64_tagged {
493 uint32_t tag;
494 x86_saved_state64_t state;
495};
496typedef struct x86_saved_state64_tagged x86_saved_state64_tagged_t;
497
498struct x86_sframe64 {
499 struct x86_64_intr_stack_frame slf;
b0d623f7
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500#ifdef __i386__
501 uint32_t _pad_for_alignment[3];
502#endif
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503 struct x86_saved_state64_tagged ssf;
504};
505typedef struct x86_sframe64 x86_sframe64_t;
506
507extern uint32_t get_eflags_exportmask(void);
2d21ac55 508
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509/*
510 * Unified, tagged saved state:
511 */
512typedef struct {
513 uint32_t flavor;
514 union {
515 x86_saved_state32_t ss_32;
516 x86_saved_state64_t ss_64;
517 } uss;
518} x86_saved_state_t;
519#define ss_32 uss.ss_32
520#define ss_64 uss.ss_64
b0d623f7 521#pragma pack()
0c530ab8
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522
523static inline boolean_t
524is_saved_state64(x86_saved_state_t *iss)
525{
526 return (iss->flavor == x86_SAVED_STATE64);
527}
528
529static inline boolean_t
530is_saved_state32(x86_saved_state_t *iss)
531{
532 return (iss->flavor == x86_SAVED_STATE32);
533}
534
535static inline x86_saved_state32_t *
536saved_state32(x86_saved_state_t *iss)
537{
538 return &iss->ss_32;
539}
540
541static inline x86_saved_state64_t *
542saved_state64(x86_saved_state_t *iss)
543{
544 return &iss->ss_64;
545}
546
547#endif /* XNU_KERNEL_PRIVATE */
1c79356b
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548
549#endif /* _MACH_I386_THREAD_STATUS_H_ */