+ string AccessSchema = U.Access + ':';
+ string FullQueueName;
+
+ if (U.Host.empty())
+ {
+ long existing = 0;
+ // check how many queues exist already and reuse empty ones
+ for (Queue const *I = Queues; I != 0; I = I->Next)
+ if (I->Name.compare(0, AccessSchema.length(), AccessSchema) == 0)
+ {
+ if (I->Items == nullptr)
+ return I->Name;
+ ++existing;
+ }
+
+#ifdef _SC_NPROCESSORS_ONLN
+ long cpuCount = sysconf(_SC_NPROCESSORS_ONLN) * 2;
+#else
+ long cpuCount = 10;
+#endif
+ cpuCount = _config->FindI("Acquire::QueueHost::Limit", cpuCount);
+
+ if (cpuCount <= 0 || existing < cpuCount)
+ strprintf(FullQueueName, "%s%ld", AccessSchema.c_str(), existing);
+ else
+ {
+ long const randomQueue = random() % cpuCount;
+ strprintf(FullQueueName, "%s%ld", AccessSchema.c_str(), randomQueue);
+ }
+
+ if (Debug)
+ clog << "Chose random queue " << FullQueueName << " for " << Uri << endl;
+ } else
+ {
+ FullQueueName = AccessSchema + U.Host;
+
+ int parallel(_config->FindI("Acquire::"+U.Access+"::MaxParallel",8));
+ if (parallel > 0) {
+ typedef map<string, int> indexmap;
+ static indexmap indices;
+
+ pair<indexmap::iterator, bool> cache(indices.insert(indexmap::value_type(FullQueueName, -1)));
+ if (cache.second || cache.first->second == -1) {
+ int &index(indices[U.Access]);
+ if (index >= parallel)
+ index = 0;
+ cache.first->second = index++;
+ }
+
+ ostringstream value;
+ value << U.Access << "::" << cache.first->second;
+ FullQueueName = value.str();
+ }
+ }