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2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
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26 * Mach Operating System
27 * Copyright (c) 1991 Carnegie Mellon University
28 * All Rights Reserved.
30 * Permission to use, copy, modify and distribute this software and its
31 * documentation is hereby granted, provided that both the copyright
32 * notice and this permission notice appear in all copies of the
33 * software, derivative works or modified versions, and any portions
34 * thereof, and that both notices appear in supporting documentation.
36 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
37 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
38 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
40 * Carnegie Mellon requests users of this software to return to
42 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
43 * School of Computer Science
44 * Carnegie Mellon University
45 * Pittsburgh PA 15213-3890
47 * any improvements or extensions that they make and grant Carnegie Mellon
48 * the rights to redistribute these changes.
58 * Macro definitions for routines to manipulate the
59 * floating-point processor.
63 #include <i386/proc_reg.h>
64 #include <i386/thread.h>
65 #include <kern/kern_types.h>
66 #include <mach/i386/kern_return.h>
67 #include <mach/i386/thread_status.h>
73 __asm__ volatile("fninit")
75 #define fnstcw(control) \
76 __asm__("fnstcw %0" : "=m" (*(unsigned short *)(control)))
78 #define fldcw(control) \
79 __asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
81 extern unsigned short fnstsw(void);
83 extern __inline__
unsigned short fnstsw(void)
85 unsigned short status
;
86 __asm__
volatile("fnstsw %0" : "=ma" (status
));
91 __asm__ volatile("fnclex")
93 #define fnsave(state) \
94 __asm__ volatile("fnsave %0" : "=m" (*state))
96 #define frstor(state) \
97 __asm__ volatile("frstor %0" : : "m" (state))
102 #define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr)))
103 #define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
105 #define FXSAFE() (fp_kind == FP_FXSR)
107 #define fpu_load_context(pcb)
110 * Save thread`s FPU context.
111 * If only one CPU, we just set the task-switched bit,
112 * to keep the new thread from using the coprocessor.
113 * If multiple CPUs, we save the entire state.
114 * NOTE: in order to provide backwards compatible support in the kernel. When saving SSE2 state, we also save the
115 * FP state in it's old location. Otherwise fpu_get_state() and fpu_set_state() will stop working
118 #define fpu_save_context(thread) \
120 register struct i386_fpsave_state *ifps; \
121 ifps = (thread)->top_act->mact.pcb->ims.ifps; \
122 if (ifps != 0 && !ifps->fp_valid) { \
123 /* registers are in FPU - save to memory */ \
124 ifps->fp_valid = TRUE; \
125 ifps->fp_save_flavor = FP_387; \
127 fxsave(&ifps->fx_save_state); \
128 ifps->fp_save_flavor = FP_FXSR; \
130 fnsave(&ifps->fp_save_state); \
135 #else /* NCPUS == 1 */
136 #define fpu_save_context(thread) \
141 #endif /* NCPUS == 1 */
146 extern void init_fpu(void);
147 extern void fpu_module_init(void);
149 struct i386_fpsave_state
* fps
);
150 extern kern_return_t
fpu_set_state(
151 thread_act_t thr_act
,
152 struct i386_float_state
* st
);
153 extern kern_return_t
fpu_get_state(
154 thread_act_t thr_act
,
155 struct i386_float_state
* st
);
156 /* extern kern_return_t fpu_set_fxstate(
157 thread_act_t thr_act,
158 struct i386_float_state * st);
159 extern kern_return_t fpu_get_fxstate(
160 thread_act_t thr_act,
161 struct i386_float_state * st); */
162 extern void fpnoextflt(void);
163 extern void fpextovrflt(void);
164 extern void fpexterrflt(void);
165 extern void fp_state_alloc(void);
166 extern void fpintr(void);
167 extern void fpflush(thread_act_t
);
169 #endif /* _I386_FPU_H_ */