[apple/xnu.git] / osfmk / i386 / machine_routines.h

/*
 * Copyright (c) 2000-2009 Apple Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#ifndef	_I386_MACHINE_ROUTINES_H_
#define	_I386_MACHINE_ROUTINES_H_

#include <mach/mach_types.h>
#include <mach/boolean.h>
#include <kern/kern_types.h>
#include <pexpert/pexpert.h>

#include <sys/cdefs.h>
#include <sys/appleapiopts.h>

#include <stdarg.h>

__BEGIN_DECLS

#ifdef XNU_KERNEL_PRIVATE

/* are we a 64 bit platform ? */

boolean_t ml_is64bit(void);

/* is this a 64bit thread? */

boolean_t ml_thread_is64bit(thread_t);

/* is this a 64bit thread? */

boolean_t ml_state_is64bit(void *);

/* set state of fpu save area for signal handling */

void	ml_fp_setvalid(boolean_t);

void	ml_cpu_set_ldt(int);

/* Interrupt handling */

/* Initialize Interrupts */
void    ml_init_interrupt(void);

/* Generate a fake interrupt */
void ml_cause_interrupt(void);

/* Initialize Interrupts */
void ml_install_interrupt_handler(
    void *nub,
    int source,
    void *target,
    IOInterruptHandler handler,
    void *refCon);

void ml_entropy_collect(void);

uint64_t ml_get_timebase(void);
void ml_init_lock_timeout(void); 
void ml_init_delay_spin_threshold(int);

boolean_t ml_delay_should_spin(uint64_t interval);

extern void ml_delay_on_yield(void);

vm_offset_t
ml_static_ptovirt(
	vm_offset_t);

void ml_static_mfree(
	vm_offset_t,
	vm_size_t);

/* boot memory allocation */
vm_offset_t ml_static_malloc(
	vm_size_t size);

vm_offset_t ml_static_slide(
	vm_offset_t vaddr);

vm_offset_t ml_static_unslide(
	vm_offset_t vaddr);

/* virtual to physical on wired pages */
vm_offset_t ml_vtophys(
	vm_offset_t vaddr);

vm_size_t ml_nofault_copy(
	vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);

boolean_t ml_validate_nofault(
	vm_offset_t virtsrc, vm_size_t size);

/* Machine topology info */
uint64_t ml_cpu_cache_size(unsigned int level);	
uint64_t ml_cpu_cache_sharing(unsigned int level);	

/* Initialize the maximum number of CPUs */
void ml_init_max_cpus(
	unsigned long max_cpus);

extern void	ml_cpu_up(void);
extern void	ml_cpu_down(void);

void bzero_phys_nc(
				   addr64_t phys_address,
				   uint32_t length);
extern uint32_t interrupt_timer_coalescing_enabled;
extern uint32_t idle_entry_timer_processing_hdeadline_threshold;

#if TCOAL_INSTRUMENT
#define TCOAL_DEBUG KERNEL_DEBUG_CONSTANT
#else
#define TCOAL_DEBUG(x, a, b, c, d, e) do { } while(0)
#endif /* TCOAL_INSTRUMENT */

#if	defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)
/* IO memory map services */

/* Map memory map IO space */
vm_offset_t ml_io_map(
	vm_offset_t phys_addr, 
	vm_size_t size);


void	ml_get_bouncepool_info(
			       vm_offset_t *phys_addr,
			       vm_size_t   *size);
/* Indicates if spinlock, IPI and other timeouts should be suspended */
boolean_t machine_timeout_suspended(void);
void plctrace_disable(void);
#endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE  */

/* Warm up a CPU to receive an interrupt */
kern_return_t ml_interrupt_prewarm(uint64_t deadline);

/* Check if the machine layer wants to intercept a panic call */
boolean_t ml_wants_panic_trap_to_debugger(void);

/* Machine layer routine for intercepting panics */
void ml_panic_trap_to_debugger(const char *panic_format_str,
                               va_list *panic_args,
                               unsigned int reason,
                               void *ctx,
                               uint64_t panic_options_mask,
                               unsigned long panic_caller);
#endif /* XNU_KERNEL_PRIVATE */

#ifdef KERNEL_PRIVATE

/* Type for the Time Base Enable function */
typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);

/* Type for the IPI Hander */
typedef void (*ipi_handler_t)(void);

/* Struct for ml_processor_register */
struct ml_processor_info {
	cpu_id_t			cpu_id;
	boolean_t			boot_cpu;
	vm_offset_t			start_paddr;
	boolean_t			supports_nap;
	unsigned long		l2cr_value;
	time_base_enable_t	time_base_enable;
};

typedef struct ml_processor_info ml_processor_info_t;


/* Register a processor */
kern_return_t
ml_processor_register(
        cpu_id_t        cpu_id,
        uint32_t        lapic_id,
        processor_t     *processor_out,
        boolean_t       boot_cpu,
	boolean_t       start );

/* PCI config cycle probing */
boolean_t ml_probe_read(
	vm_offset_t paddr,
	unsigned int *val);
boolean_t ml_probe_read_64(
	addr64_t paddr,
	unsigned int *val);

/* Read physical address byte */
unsigned int ml_phys_read_byte(
	vm_offset_t paddr);
unsigned int ml_phys_read_byte_64(
	addr64_t paddr);

/* Read physical address half word */
unsigned int ml_phys_read_half(
	vm_offset_t paddr);
unsigned int ml_phys_read_half_64(
	addr64_t paddr);

/* Read physical address word*/
unsigned int ml_phys_read(
	vm_offset_t paddr);
unsigned int ml_phys_read_64(
	addr64_t paddr);
unsigned int ml_phys_read_word(
	vm_offset_t paddr);
unsigned int ml_phys_read_word_64(
	addr64_t paddr);

/* Read physical address double word */
unsigned long long ml_phys_read_double(
	vm_offset_t paddr);
unsigned long long ml_phys_read_double_64(
	addr64_t paddr);

unsigned long long ml_io_read(uintptr_t iovaddr, int iovsz);
unsigned int ml_io_read8(uintptr_t iovaddr);
unsigned int ml_io_read16(uintptr_t iovaddr);
unsigned int ml_io_read32(uintptr_t iovaddr);
unsigned long long ml_io_read64(uintptr_t iovaddr);

/* Write physical address byte */
void ml_phys_write_byte(
	vm_offset_t paddr, unsigned int data);
void ml_phys_write_byte_64(
	addr64_t paddr, unsigned int data);

/* Write physical address half word */
void ml_phys_write_half(
	vm_offset_t paddr, unsigned int data);
void ml_phys_write_half_64(
	addr64_t paddr, unsigned int data);

/* Write physical address word */
void ml_phys_write(
	vm_offset_t paddr, unsigned int data);
void ml_phys_write_64(
	addr64_t paddr, unsigned int data);
void ml_phys_write_word(
	vm_offset_t paddr, unsigned int data);
void ml_phys_write_word_64(
	addr64_t paddr, unsigned int data);

/* Write physical address double word */
void ml_phys_write_double(
	vm_offset_t paddr, unsigned long long data);
void ml_phys_write_double_64(
	addr64_t paddr, unsigned long long data);

/* Struct for ml_cpu_get_info */
struct ml_cpu_info {
	uint32_t	vector_unit;
	uint32_t	cache_line_size;
	uint32_t	l1_icache_size;
	uint32_t	l1_dcache_size;
	uint32_t	l2_settings;
	uint32_t	l2_cache_size;
	uint32_t	l3_settings;
	uint32_t	l3_cache_size;
};

typedef struct ml_cpu_info ml_cpu_info_t;

/* Get processor info */
void ml_cpu_get_info(ml_cpu_info_t *ml_cpu_info);

void ml_thread_policy(
	thread_t thread,
	unsigned policy_id,
	unsigned policy_info);

#define MACHINE_GROUP					0x00000001
#define MACHINE_NETWORK_GROUP			0x10000000
#define MACHINE_NETWORK_WORKLOOP		0x00000001
#define MACHINE_NETWORK_NETISR			0x00000002

/* Return the maximum number of CPUs set by ml_init_max_cpus() */
int ml_get_max_cpus(
	void);

/*
 * The following are in pmCPU.c not machine_routines.c.
 */
extern void ml_set_maxsnoop(uint32_t maxdelay);
extern unsigned ml_get_maxsnoop(void);
extern void ml_set_maxbusdelay(uint32_t mdelay);
extern uint32_t ml_get_maxbusdelay(void);
extern void ml_set_maxintdelay(uint64_t mdelay);
extern uint64_t ml_get_maxintdelay(void);
extern boolean_t ml_get_interrupt_prewake_applicable(void);


extern uint64_t tmrCvt(uint64_t time, uint64_t conversion);

extern uint64_t ml_cpu_int_event_time(void);

#endif /* KERNEL_PRIVATE */

/* Get Interrupts Enabled */
boolean_t ml_get_interrupts_enabled(void);

/* Set Interrupts Enabled */
boolean_t ml_set_interrupts_enabled(boolean_t enable);

/* Check if running at interrupt context */
boolean_t ml_at_interrupt_context(void);

#ifdef XNU_KERNEL_PRIVATE
extern boolean_t ml_is_quiescing(void);
extern void ml_set_is_quiescing(boolean_t);
extern uint64_t ml_get_booter_memory_size(void);
#endif

/* Zero bytes starting at a physical address */
void bzero_phys(
	addr64_t phys_address,
	uint32_t length);

/* Bytes available on current stack */
vm_offset_t ml_stack_remaining(void);

__END_DECLS
#if defined(MACH_KERNEL_PRIVATE)
__private_extern__ uint64_t
ml_phys_read_data(uint64_t paddr, int psz);
__private_extern__ void
pmap_verify_noncacheable(uintptr_t vaddr);
#endif /* MACH_KERNEL_PRIVATE */
#ifdef	XNU_KERNEL_PRIVATE

boolean_t ml_fpu_avx_enabled(void);
#if !defined(RC_HIDE_XNU_J137)
boolean_t ml_fpu_avx512_enabled(void);
#endif

void interrupt_latency_tracker_setup(void);
void interrupt_reset_latency_stats(void);
void interrupt_populate_latency_stats(char *, unsigned);
void ml_get_power_state(boolean_t *, boolean_t *);

void timer_queue_expire_local(void*);
void timer_queue_expire_rescan(void*);
void ml_timer_evaluate(void);
boolean_t ml_timer_forced_evaluation(void);

uint64_t ml_energy_stat(thread_t);
void ml_gpu_stat_update(uint64_t);
uint64_t ml_gpu_stat(thread_t);
boolean_t ml_recent_wake(void);

extern uint64_t reportphyreaddelayabs;
extern uint32_t reportphyreadosbt;
extern uint32_t phyreadpanic;

#endif /* XNU_KERNEL_PRIVATE */
#endif /* _I386_MACHINE_ROUTINES_H_ */
Commit	Line	Data
1c79356b	1	/*
b0d623f7	2	* Copyright (c) 2000-2009 Apple Inc. All rights reserved.
1c79356b	3	*
2d21ac55	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
2d21ac55 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
8f6c56a5	14	*
2d21ac55 A	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
8f6c56a5	25	*
2d21ac55	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
	31
	32	#ifndef _I386_MACHINE_ROUTINES_H_
	33	#define _I386_MACHINE_ROUTINES_H_
	34
	35	#include <mach/mach_types.h>
	36	#include <mach/boolean.h>
	37	#include <kern/kern_types.h>
	38	#include <pexpert/pexpert.h>
	39
91447636	40	#include <sys/cdefs.h>
9bccf70c	41	#include <sys/appleapiopts.h>
1c79356b	42
5ba3f43e A	43	#include <stdarg.h>
5ba3f43e A	44
91447636 A	45	__BEGIN_DECLS
91447636 A	46
b0d623f7 A	47	#ifdef XNU_KERNEL_PRIVATE
b0d623f7 A	48
0c530ab8 A	49	/* are we a 64 bit platform ? */
	50
	51	boolean_t ml_is64bit(void);
	52
	53	/* is this a 64bit thread? */
	54
	55	boolean_t ml_thread_is64bit(thread_t);
	56
	57	/* is this a 64bit thread? */
	58
	59	boolean_t ml_state_is64bit(void *);
	60
	61	/* set state of fpu save area for signal handling */
	62
	63	void ml_fp_setvalid(boolean_t);
	64
	65	void ml_cpu_set_ldt(int);
	66
1c79356b A	67	/* Interrupt handling */
1c79356b A	68
55e303ae A	69	/* Initialize Interrupts */
	70	void ml_init_interrupt(void);
	71
1c79356b A	72	/* Generate a fake interrupt */
	73	void ml_cause_interrupt(void);
	74
b0d623f7 A	75	/* Initialize Interrupts */
	76	void ml_install_interrupt_handler(
	77	void *nub,
	78	int source,
	79	void *target,
	80	IOInterruptHandler handler,
	81	void *refCon);
	82
fe8ab488 A	83	void ml_entropy_collect(void);
fe8ab488 A	84
5ba3f43e	85	uint64_t ml_get_timebase(void);
0c530ab8	86	void ml_init_lock_timeout(void);
bd504ef0	87	void ml_init_delay_spin_threshold(int);
316670eb A	88
316670eb A	89	boolean_t ml_delay_should_spin(uint64_t interval);
d52fe63f	90
e8c3f781 A	91	extern void ml_delay_on_yield(void);
e8c3f781 A	92
b0d623f7 A	93	vm_offset_t
	94	ml_static_ptovirt(
	95	vm_offset_t);
	96
	97	void ml_static_mfree(
	98	vm_offset_t,
	99	vm_size_t);
	100
	101	/* boot memory allocation */
	102	vm_offset_t ml_static_malloc(
	103	vm_size_t size);
	104
d9a64523 A	105	vm_offset_t ml_static_slide(
	106	vm_offset_t vaddr);
	107
	108	vm_offset_t ml_static_unslide(
	109	vm_offset_t vaddr);
	110
b0d623f7 A	111	/* virtual to physical on wired pages */
	112	vm_offset_t ml_vtophys(
	113	vm_offset_t vaddr);
	114
	115	vm_size_t ml_nofault_copy(
	116	vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);
	117
39236c6e A	118	boolean_t ml_validate_nofault(
	119	vm_offset_t virtsrc, vm_size_t size);
	120
b0d623f7 A	121	/* Machine topology info */
	122	uint64_t ml_cpu_cache_size(unsigned int level);
	123	uint64_t ml_cpu_cache_sharing(unsigned int level);
	124
	125	/* Initialize the maximum number of CPUs */
	126	void ml_init_max_cpus(
	127	unsigned long max_cpus);
	128
	129	extern void ml_cpu_up(void);
	130	extern void ml_cpu_down(void);
	131
	132	void bzero_phys_nc(
	133	addr64_t phys_address,
	134	uint32_t length);
39236c6e A	135	extern uint32_t interrupt_timer_coalescing_enabled;
	136	extern uint32_t idle_entry_timer_processing_hdeadline_threshold;
	137
	138	#if TCOAL_INSTRUMENT
	139	#define TCOAL_DEBUG KERNEL_DEBUG_CONSTANT
	140	#else
	141	#define TCOAL_DEBUG(x, a, b, c, d, e) do { } while(0)
	142	#endif /* TCOAL_INSTRUMENT */
b0d623f7 A	143
	144	#if defined(PEXPERT_KERNEL_PRIVATE) \|\| defined(MACH_KERNEL_PRIVATE)
	145	/* IO memory map services */
	146
	147	/* Map memory map IO space */
	148	vm_offset_t ml_io_map(
	149	vm_offset_t phys_addr,
	150	vm_size_t size);
	151
b0d623f7 A	152
	153	void ml_get_bouncepool_info(
	154	vm_offset_t *phys_addr,
	155	vm_size_t *size);
060df5ea A	156	/* Indicates if spinlock, IPI and other timeouts should be suspended */
060df5ea A	157	boolean_t machine_timeout_suspended(void);
39037602	158	void plctrace_disable(void);
b0d623f7 A	159	#endif /* PEXPERT_KERNEL_PRIVATE \|\| MACH_KERNEL_PRIVATE */
b0d623f7 A	160
6d2010ae A	161	/* Warm up a CPU to receive an interrupt */
6d2010ae A	162	kern_return_t ml_interrupt_prewarm(uint64_t deadline);
060df5ea	163
5ba3f43e A	164	/* Check if the machine layer wants to intercept a panic call */
	165	boolean_t ml_wants_panic_trap_to_debugger(void);
	166
	167	/* Machine layer routine for intercepting panics */
	168	void ml_panic_trap_to_debugger(const char *panic_format_str,
	169	va_list *panic_args,
	170	unsigned int reason,
	171	void *ctx,
	172	uint64_t panic_options_mask,
	173	unsigned long panic_caller);
b0d623f7 A	174	#endif /* XNU_KERNEL_PRIVATE */
	175
	176	#ifdef KERNEL_PRIVATE
	177
55e303ae A	178	/* Type for the Time Base Enable function */
	179	typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
	180
9bccf70c A	181	/* Type for the IPI Hander */
	182	typedef void (*ipi_handler_t)(void);
	183
55e303ae A	184	/* Struct for ml_processor_register */
	185	struct ml_processor_info {
	186	cpu_id_t cpu_id;
	187	boolean_t boot_cpu;
	188	vm_offset_t start_paddr;
	189	boolean_t supports_nap;
	190	unsigned long l2cr_value;
	191	time_base_enable_t time_base_enable;
	192	};
	193
	194	typedef struct ml_processor_info ml_processor_info_t;
	195
91447636	196
9bccf70c	197	/* Register a processor */
b0d623f7 A	198	kern_return_t
	199	ml_processor_register(
	200	cpu_id_t cpu_id,
	201	uint32_t lapic_id,
	202	processor_t *processor_out,
	203	boolean_t boot_cpu,
	204	boolean_t start );
0c530ab8	205
43866e37 A	206	/* PCI config cycle probing */
	207	boolean_t ml_probe_read(
	208	vm_offset_t paddr,
	209	unsigned int *val);
55e303ae A	210	boolean_t ml_probe_read_64(
	211	addr64_t paddr,
	212	unsigned int *val);
43866e37 A	213
	214	/* Read physical address byte */
	215	unsigned int ml_phys_read_byte(
	216	vm_offset_t paddr);
55e303ae A	217	unsigned int ml_phys_read_byte_64(
55e303ae A	218	addr64_t paddr);
43866e37 A	219
	220	/* Read physical address half word */
	221	unsigned int ml_phys_read_half(
	222	vm_offset_t paddr);
55e303ae A	223	unsigned int ml_phys_read_half_64(
55e303ae A	224	addr64_t paddr);
43866e37 A	225
	226	/* Read physical address word*/
	227	unsigned int ml_phys_read(
	228	vm_offset_t paddr);
55e303ae A	229	unsigned int ml_phys_read_64(
55e303ae A	230	addr64_t paddr);
43866e37 A	231	unsigned int ml_phys_read_word(
43866e37 A	232	vm_offset_t paddr);
55e303ae A	233	unsigned int ml_phys_read_word_64(
55e303ae A	234	addr64_t paddr);
43866e37 A	235
	236	/* Read physical address double word */
	237	unsigned long long ml_phys_read_double(
	238	vm_offset_t paddr);
55e303ae A	239	unsigned long long ml_phys_read_double_64(
55e303ae A	240	addr64_t paddr);
43866e37	241
813fb2f6 A	242	unsigned long long ml_io_read(uintptr_t iovaddr, int iovsz);
	243	unsigned int ml_io_read8(uintptr_t iovaddr);
	244	unsigned int ml_io_read16(uintptr_t iovaddr);
	245	unsigned int ml_io_read32(uintptr_t iovaddr);
	246	unsigned long long ml_io_read64(uintptr_t iovaddr);
	247
43866e37 A	248	/* Write physical address byte */
	249	void ml_phys_write_byte(
	250	vm_offset_t paddr, unsigned int data);
55e303ae A	251	void ml_phys_write_byte_64(
55e303ae A	252	addr64_t paddr, unsigned int data);
43866e37 A	253
	254	/* Write physical address half word */
	255	void ml_phys_write_half(
	256	vm_offset_t paddr, unsigned int data);
55e303ae A	257	void ml_phys_write_half_64(
55e303ae A	258	addr64_t paddr, unsigned int data);
43866e37 A	259
	260	/* Write physical address word */
	261	void ml_phys_write(
	262	vm_offset_t paddr, unsigned int data);
55e303ae A	263	void ml_phys_write_64(
55e303ae A	264	addr64_t paddr, unsigned int data);
43866e37 A	265	void ml_phys_write_word(
43866e37 A	266	vm_offset_t paddr, unsigned int data);
55e303ae A	267	void ml_phys_write_word_64(
55e303ae A	268	addr64_t paddr, unsigned int data);
43866e37 A	269
	270	/* Write physical address double word */
	271	void ml_phys_write_double(
	272	vm_offset_t paddr, unsigned long long data);
55e303ae A	273	void ml_phys_write_double_64(
55e303ae A	274	addr64_t paddr, unsigned long long data);
43866e37	275
43866e37 A	276	/* Struct for ml_cpu_get_info */
43866e37 A	277	struct ml_cpu_info {
6d2010ae A	278	uint32_t vector_unit;
	279	uint32_t cache_line_size;
	280	uint32_t l1_icache_size;
	281	uint32_t l1_dcache_size;
	282	uint32_t l2_settings;
	283	uint32_t l2_cache_size;
	284	uint32_t l3_settings;
	285	uint32_t l3_cache_size;
43866e37 A	286	};
	287
	288	typedef struct ml_cpu_info ml_cpu_info_t;
	289
	290	/* Get processor info */
91447636	291	void ml_cpu_get_info(ml_cpu_info_t *ml_cpu_info);
43866e37	292
9bccf70c A	293	void ml_thread_policy(
	294	thread_t thread,
	295	unsigned policy_id,
	296	unsigned policy_info);
1c79356b	297
9bccf70c A	298	#define MACHINE_GROUP 0x00000001
	299	#define MACHINE_NETWORK_GROUP 0x10000000
	300	#define MACHINE_NETWORK_WORKLOOP 0x00000001
	301	#define MACHINE_NETWORK_NETISR 0x00000002
1c79356b	302
43866e37 A	303	/* Return the maximum number of CPUs set by ml_init_max_cpus() */
	304	int ml_get_max_cpus(
	305	void);
	306
2d21ac55 A	307	/*
	308	* The following are in pmCPU.c not machine_routines.c.
	309	*/
0c530ab8 A	310	extern void ml_set_maxsnoop(uint32_t maxdelay);
	311	extern unsigned ml_get_maxsnoop(void);
	312	extern void ml_set_maxbusdelay(uint32_t mdelay);
	313	extern uint32_t ml_get_maxbusdelay(void);
593a1d5f A	314	extern void ml_set_maxintdelay(uint64_t mdelay);
593a1d5f A	315	extern uint64_t ml_get_maxintdelay(void);
6d2010ae	316	extern boolean_t ml_get_interrupt_prewake_applicable(void);
2d21ac55 A	317
2d21ac55 A	318
0c530ab8 A	319	extern uint64_t tmrCvt(uint64_t time, uint64_t conversion);
0c530ab8 A	320
2d21ac55 A	321	extern uint64_t ml_cpu_int_event_time(void);
2d21ac55 A	322
b0d623f7 A	323	#endif /* KERNEL_PRIVATE */
	324
	325	/* Get Interrupts Enabled */
	326	boolean_t ml_get_interrupts_enabled(void);
	327
	328	/* Set Interrupts Enabled */
	329	boolean_t ml_set_interrupts_enabled(boolean_t enable);
	330
	331	/* Check if running at interrupt context */
	332	boolean_t ml_at_interrupt_context(void);
	333
5ba3f43e A	334	#ifdef XNU_KERNEL_PRIVATE
	335	extern boolean_t ml_is_quiescing(void);
	336	extern void ml_set_is_quiescing(boolean_t);
	337	extern uint64_t ml_get_booter_memory_size(void);
	338	#endif
	339
b0d623f7 A	340	/* Zero bytes starting at a physical address */
	341	void bzero_phys(
	342	addr64_t phys_address,
	343	uint32_t length);
	344
	345	/* Bytes available on current stack */
	346	vm_offset_t ml_stack_remaining(void);
	347
91447636	348	__END_DECLS
813fb2f6 A	349	#if defined(MACH_KERNEL_PRIVATE)
	350	__private_extern__ uint64_t
	351	ml_phys_read_data(uint64_t paddr, int psz);
	352	__private_extern__ void
	353	pmap_verify_noncacheable(uintptr_t vaddr);
	354	#endif /* MACH_KERNEL_PRIVATE */
6d2010ae	355	#ifdef XNU_KERNEL_PRIVATE
316670eb	356
6d2010ae	357	boolean_t ml_fpu_avx_enabled(void);
5ba3f43e A	358	#if !defined(RC_HIDE_XNU_J137)
	359	boolean_t ml_fpu_avx512_enabled(void);
	360	#endif
316670eb	361
6d2010ae A	362	void interrupt_latency_tracker_setup(void);
	363	void interrupt_reset_latency_stats(void);
	364	void interrupt_populate_latency_stats(char *, unsigned);
4b17d6b6	365	void ml_get_power_state(boolean_t , boolean_t );
060df5ea	366
39236c6e A	367	void timer_queue_expire_local(void*);
	368	void timer_queue_expire_rescan(void*);
	369	void ml_timer_evaluate(void);
	370	boolean_t ml_timer_forced_evaluation(void);
39236c6e	371
39037602	372	uint64_t ml_energy_stat(thread_t);
fe8ab488 A	373	void ml_gpu_stat_update(uint64_t);
fe8ab488 A	374	uint64_t ml_gpu_stat(thread_t);
143464d5	375	boolean_t ml_recent_wake(void);
3e170ce0 A	376
	377	extern uint64_t reportphyreaddelayabs;
	378	extern uint32_t reportphyreadosbt;
813fb2f6	379	extern uint32_t phyreadpanic;
3e170ce0	380
6d2010ae	381	#endif /* XNU_KERNEL_PRIVATE */
1c79356b	382	#endif /* _I386_MACHINE_ROUTINES_H_ */