[apple/xnu.git] / osfmk / i386 / machine_routines.h

/*
 * Copyright (c) 2000-2009 Apple Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#ifndef	_I386_MACHINE_ROUTINES_H_
#define	_I386_MACHINE_ROUTINES_H_

#include <mach/mach_types.h>
#include <mach/boolean.h>
#include <kern/kern_types.h>
#include <pexpert/pexpert.h>

#include <sys/cdefs.h>
#include <sys/appleapiopts.h>

__BEGIN_DECLS

#ifdef XNU_KERNEL_PRIVATE

/* are we a 64 bit platform ? */

boolean_t ml_is64bit(void);

/* is this a 64bit thread? */

boolean_t ml_thread_is64bit(thread_t);

/* is this a 64bit thread? */

boolean_t ml_state_is64bit(void *);

/* set state of fpu save area for signal handling */

void	ml_fp_setvalid(boolean_t);

void	ml_cpu_set_ldt(int);

/* Interrupt handling */

/* Initialize Interrupts */
void    ml_init_interrupt(void);

/* Generate a fake interrupt */
void ml_cause_interrupt(void);

/* Initialize Interrupts */
void ml_install_interrupt_handler(
    void *nub,
    int source,
    void *target,
    IOInterruptHandler handler,
    void *refCon);

void ml_entropy_collect(void);

uint64_t ml_get_timebase();
void ml_init_lock_timeout(void); 
void ml_init_delay_spin_threshold(int);

boolean_t ml_delay_should_spin(uint64_t interval);

vm_offset_t
ml_static_ptovirt(
	vm_offset_t);

void ml_static_mfree(
	vm_offset_t,
	vm_size_t);

/* boot memory allocation */
vm_offset_t ml_static_malloc(
	vm_size_t size);

/* virtual to physical on wired pages */
vm_offset_t ml_vtophys(
	vm_offset_t vaddr);

vm_size_t ml_nofault_copy(
	vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);

boolean_t ml_validate_nofault(
	vm_offset_t virtsrc, vm_size_t size);

/* Machine topology info */
uint64_t ml_cpu_cache_size(unsigned int level);	
uint64_t ml_cpu_cache_sharing(unsigned int level);	

/* Initialize the maximum number of CPUs */
void ml_init_max_cpus(
	unsigned long max_cpus);

extern void	ml_cpu_up(void);
extern void	ml_cpu_down(void);

void bzero_phys_nc(
				   addr64_t phys_address,
				   uint32_t length);
extern uint32_t interrupt_timer_coalescing_enabled;
extern uint32_t idle_entry_timer_processing_hdeadline_threshold;

#if TCOAL_INSTRUMENT
#define TCOAL_DEBUG KERNEL_DEBUG_CONSTANT
#else
#define TCOAL_DEBUG(x, a, b, c, d, e) do { } while(0)
#endif /* TCOAL_INSTRUMENT */

#if	defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)
/* IO memory map services */

/* Map memory map IO space */
vm_offset_t ml_io_map(
	vm_offset_t phys_addr, 
	vm_size_t size);


void	ml_get_bouncepool_info(
			       vm_offset_t *phys_addr,
			       vm_size_t   *size);
/* Indicates if spinlock, IPI and other timeouts should be suspended */
boolean_t machine_timeout_suspended(void);
#endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE  */

/* Warm up a CPU to receive an interrupt */
kern_return_t ml_interrupt_prewarm(uint64_t deadline);

#endif /* XNU_KERNEL_PRIVATE */

#ifdef KERNEL_PRIVATE

/* Type for the Time Base Enable function */
typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);

/* Type for the IPI Hander */
typedef void (*ipi_handler_t)(void);

/* Struct for ml_processor_register */
struct ml_processor_info {
	cpu_id_t			cpu_id;
	boolean_t			boot_cpu;
	vm_offset_t			start_paddr;
	boolean_t			supports_nap;
	unsigned long		l2cr_value;
	time_base_enable_t	time_base_enable;
};

typedef struct ml_processor_info ml_processor_info_t;


/* Register a processor */
kern_return_t
ml_processor_register(
        cpu_id_t        cpu_id,
        uint32_t        lapic_id,
        processor_t     *processor_out,
        boolean_t       boot_cpu,
	boolean_t       start );

/* PCI config cycle probing */
boolean_t ml_probe_read(
	vm_offset_t paddr,
	unsigned int *val);
boolean_t ml_probe_read_64(
	addr64_t paddr,
	unsigned int *val);

/* Read physical address byte */
unsigned int ml_phys_read_byte(
	vm_offset_t paddr);
unsigned int ml_phys_read_byte_64(
	addr64_t paddr);

/* Read physical address half word */
unsigned int ml_phys_read_half(
	vm_offset_t paddr);
unsigned int ml_phys_read_half_64(
	addr64_t paddr);

/* Read physical address word*/
unsigned int ml_phys_read(
	vm_offset_t paddr);
unsigned int ml_phys_read_64(
	addr64_t paddr);
unsigned int ml_phys_read_word(
	vm_offset_t paddr);
unsigned int ml_phys_read_word_64(
	addr64_t paddr);

/* Read physical address double word */
unsigned long long ml_phys_read_double(
	vm_offset_t paddr);
unsigned long long ml_phys_read_double_64(
	addr64_t paddr);

/* Write physical address byte */
void ml_phys_write_byte(
	vm_offset_t paddr, unsigned int data);
void ml_phys_write_byte_64(
	addr64_t paddr, unsigned int data);

/* Write physical address half word */
void ml_phys_write_half(
	vm_offset_t paddr, unsigned int data);
void ml_phys_write_half_64(
	addr64_t paddr, unsigned int data);

/* Write physical address word */
void ml_phys_write(
	vm_offset_t paddr, unsigned int data);
void ml_phys_write_64(
	addr64_t paddr, unsigned int data);
void ml_phys_write_word(
	vm_offset_t paddr, unsigned int data);
void ml_phys_write_word_64(
	addr64_t paddr, unsigned int data);

/* Write physical address double word */
void ml_phys_write_double(
	vm_offset_t paddr, unsigned long long data);
void ml_phys_write_double_64(
	addr64_t paddr, unsigned long long data);

/* Struct for ml_cpu_get_info */
struct ml_cpu_info {
	uint32_t	vector_unit;
	uint32_t	cache_line_size;
	uint32_t	l1_icache_size;
	uint32_t	l1_dcache_size;
	uint32_t	l2_settings;
	uint32_t	l2_cache_size;
	uint32_t	l3_settings;
	uint32_t	l3_cache_size;
};

typedef struct ml_cpu_info ml_cpu_info_t;

/* Get processor info */
void ml_cpu_get_info(ml_cpu_info_t *ml_cpu_info);

void ml_thread_policy(
	thread_t thread,
	unsigned policy_id,
	unsigned policy_info);

#define MACHINE_GROUP					0x00000001
#define MACHINE_NETWORK_GROUP			0x10000000
#define MACHINE_NETWORK_WORKLOOP		0x00000001
#define MACHINE_NETWORK_NETISR			0x00000002

/* Return the maximum number of CPUs set by ml_init_max_cpus() */
int ml_get_max_cpus(
	void);

/*
 * The following are in pmCPU.c not machine_routines.c.
 */
extern void ml_set_maxsnoop(uint32_t maxdelay);
extern unsigned ml_get_maxsnoop(void);
extern void ml_set_maxbusdelay(uint32_t mdelay);
extern uint32_t ml_get_maxbusdelay(void);
extern void ml_set_maxintdelay(uint64_t mdelay);
extern uint64_t ml_get_maxintdelay(void);
extern boolean_t ml_get_interrupt_prewake_applicable(void);


extern uint64_t tmrCvt(uint64_t time, uint64_t conversion);

extern uint64_t ml_cpu_int_event_time(void);

#endif /* KERNEL_PRIVATE */

/* Get Interrupts Enabled */
boolean_t ml_get_interrupts_enabled(void);

/* Set Interrupts Enabled */
boolean_t ml_set_interrupts_enabled(boolean_t enable);

/* Check if running at interrupt context */
boolean_t ml_at_interrupt_context(void);

/* Zero bytes starting at a physical address */
void bzero_phys(
	addr64_t phys_address,
	uint32_t length);

/* Bytes available on current stack */
vm_offset_t ml_stack_remaining(void);

__END_DECLS

#ifdef	XNU_KERNEL_PRIVATE

boolean_t ml_fpu_avx_enabled(void);

void interrupt_latency_tracker_setup(void);
void interrupt_reset_latency_stats(void);
void interrupt_populate_latency_stats(char *, unsigned);
void ml_get_power_state(boolean_t *, boolean_t *);

void timer_queue_expire_local(void*);
void timer_queue_expire_rescan(void*);
void ml_timer_evaluate(void);
boolean_t ml_timer_forced_evaluation(void);

void ml_gpu_stat_update(uint64_t);
uint64_t ml_gpu_stat(thread_t);
boolean_t ml_recent_wake(void);

extern uint64_t reportphyreaddelayabs;
extern uint32_t reportphyreadosbt;

#endif /* XNU_KERNEL_PRIVATE */
#endif /* _I386_MACHINE_ROUTINES_H_ */
Commit	Line	Data
1c79356b	1	/*
b0d623f7	2	* Copyright (c) 2000-2009 Apple Inc. All rights reserved.
1c79356b	3	*
2d21ac55	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
2d21ac55 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
8f6c56a5	14	*
2d21ac55 A	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
8f6c56a5	25	*
2d21ac55	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
	31
	32	#ifndef _I386_MACHINE_ROUTINES_H_
	33	#define _I386_MACHINE_ROUTINES_H_
	34
	35	#include <mach/mach_types.h>
	36	#include <mach/boolean.h>
	37	#include <kern/kern_types.h>
	38	#include <pexpert/pexpert.h>
	39
91447636	40	#include <sys/cdefs.h>
9bccf70c	41	#include <sys/appleapiopts.h>
1c79356b	42
91447636 A	43	__BEGIN_DECLS
91447636 A	44
b0d623f7 A	45	#ifdef XNU_KERNEL_PRIVATE
b0d623f7 A	46
0c530ab8 A	47	/* are we a 64 bit platform ? */
	48
	49	boolean_t ml_is64bit(void);
	50
	51	/* is this a 64bit thread? */
	52
	53	boolean_t ml_thread_is64bit(thread_t);
	54
	55	/* is this a 64bit thread? */
	56
	57	boolean_t ml_state_is64bit(void *);
	58
	59	/* set state of fpu save area for signal handling */
	60
	61	void ml_fp_setvalid(boolean_t);
	62
	63	void ml_cpu_set_ldt(int);
	64
1c79356b A	65	/* Interrupt handling */
1c79356b A	66
55e303ae A	67	/* Initialize Interrupts */
	68	void ml_init_interrupt(void);
	69
1c79356b A	70	/* Generate a fake interrupt */
	71	void ml_cause_interrupt(void);
	72
b0d623f7 A	73	/* Initialize Interrupts */
	74	void ml_install_interrupt_handler(
	75	void *nub,
	76	int source,
	77	void *target,
	78	IOInterruptHandler handler,
	79	void *refCon);
	80
fe8ab488 A	81	void ml_entropy_collect(void);
	82
	83	uint64_t ml_get_timebase();
0c530ab8	84	void ml_init_lock_timeout(void);
bd504ef0	85	void ml_init_delay_spin_threshold(int);
316670eb A	86
316670eb A	87	boolean_t ml_delay_should_spin(uint64_t interval);
d52fe63f	88
b0d623f7 A	89	vm_offset_t
	90	ml_static_ptovirt(
	91	vm_offset_t);
	92
	93	void ml_static_mfree(
	94	vm_offset_t,
	95	vm_size_t);
	96
	97	/* boot memory allocation */
	98	vm_offset_t ml_static_malloc(
	99	vm_size_t size);
	100
	101	/* virtual to physical on wired pages */
	102	vm_offset_t ml_vtophys(
	103	vm_offset_t vaddr);
	104
	105	vm_size_t ml_nofault_copy(
	106	vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);
	107
39236c6e A	108	boolean_t ml_validate_nofault(
	109	vm_offset_t virtsrc, vm_size_t size);
	110
b0d623f7 A	111	/* Machine topology info */
	112	uint64_t ml_cpu_cache_size(unsigned int level);
	113	uint64_t ml_cpu_cache_sharing(unsigned int level);
	114
	115	/* Initialize the maximum number of CPUs */
	116	void ml_init_max_cpus(
	117	unsigned long max_cpus);
	118
	119	extern void ml_cpu_up(void);
	120	extern void ml_cpu_down(void);
	121
	122	void bzero_phys_nc(
	123	addr64_t phys_address,
	124	uint32_t length);
39236c6e A	125	extern uint32_t interrupt_timer_coalescing_enabled;
	126	extern uint32_t idle_entry_timer_processing_hdeadline_threshold;
	127
	128	#if TCOAL_INSTRUMENT
	129	#define TCOAL_DEBUG KERNEL_DEBUG_CONSTANT
	130	#else
	131	#define TCOAL_DEBUG(x, a, b, c, d, e) do { } while(0)
	132	#endif /* TCOAL_INSTRUMENT */
b0d623f7 A	133
	134	#if defined(PEXPERT_KERNEL_PRIVATE) \|\| defined(MACH_KERNEL_PRIVATE)
	135	/* IO memory map services */
	136
	137	/* Map memory map IO space */
	138	vm_offset_t ml_io_map(
	139	vm_offset_t phys_addr,
	140	vm_size_t size);
	141
b0d623f7 A	142
	143	void ml_get_bouncepool_info(
	144	vm_offset_t *phys_addr,
	145	vm_size_t *size);
060df5ea A	146	/* Indicates if spinlock, IPI and other timeouts should be suspended */
060df5ea A	147	boolean_t machine_timeout_suspended(void);
b0d623f7 A	148	#endif /* PEXPERT_KERNEL_PRIVATE \|\| MACH_KERNEL_PRIVATE */
b0d623f7 A	149
6d2010ae A	150	/* Warm up a CPU to receive an interrupt */
6d2010ae A	151	kern_return_t ml_interrupt_prewarm(uint64_t deadline);
060df5ea	152
b0d623f7 A	153	#endif /* XNU_KERNEL_PRIVATE */
	154
	155	#ifdef KERNEL_PRIVATE
	156
55e303ae A	157	/* Type for the Time Base Enable function */
	158	typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
	159
9bccf70c A	160	/* Type for the IPI Hander */
	161	typedef void (*ipi_handler_t)(void);
	162
55e303ae A	163	/* Struct for ml_processor_register */
	164	struct ml_processor_info {
	165	cpu_id_t cpu_id;
	166	boolean_t boot_cpu;
	167	vm_offset_t start_paddr;
	168	boolean_t supports_nap;
	169	unsigned long l2cr_value;
	170	time_base_enable_t time_base_enable;
	171	};
	172
	173	typedef struct ml_processor_info ml_processor_info_t;
	174
91447636	175
9bccf70c	176	/* Register a processor */
b0d623f7 A	177	kern_return_t
	178	ml_processor_register(
	179	cpu_id_t cpu_id,
	180	uint32_t lapic_id,
	181	processor_t *processor_out,
	182	boolean_t boot_cpu,
	183	boolean_t start );
0c530ab8	184
43866e37 A	185	/* PCI config cycle probing */
	186	boolean_t ml_probe_read(
	187	vm_offset_t paddr,
	188	unsigned int *val);
55e303ae A	189	boolean_t ml_probe_read_64(
	190	addr64_t paddr,
	191	unsigned int *val);
43866e37 A	192
	193	/* Read physical address byte */
	194	unsigned int ml_phys_read_byte(
	195	vm_offset_t paddr);
55e303ae A	196	unsigned int ml_phys_read_byte_64(
55e303ae A	197	addr64_t paddr);
43866e37 A	198
	199	/* Read physical address half word */
	200	unsigned int ml_phys_read_half(
	201	vm_offset_t paddr);
55e303ae A	202	unsigned int ml_phys_read_half_64(
55e303ae A	203	addr64_t paddr);
43866e37 A	204
	205	/* Read physical address word*/
	206	unsigned int ml_phys_read(
	207	vm_offset_t paddr);
55e303ae A	208	unsigned int ml_phys_read_64(
55e303ae A	209	addr64_t paddr);
43866e37 A	210	unsigned int ml_phys_read_word(
43866e37 A	211	vm_offset_t paddr);
55e303ae A	212	unsigned int ml_phys_read_word_64(
55e303ae A	213	addr64_t paddr);
43866e37 A	214
	215	/* Read physical address double word */
	216	unsigned long long ml_phys_read_double(
	217	vm_offset_t paddr);
55e303ae A	218	unsigned long long ml_phys_read_double_64(
55e303ae A	219	addr64_t paddr);
43866e37 A	220
	221	/* Write physical address byte */
	222	void ml_phys_write_byte(
	223	vm_offset_t paddr, unsigned int data);
55e303ae A	224	void ml_phys_write_byte_64(
55e303ae A	225	addr64_t paddr, unsigned int data);
43866e37 A	226
	227	/* Write physical address half word */
	228	void ml_phys_write_half(
	229	vm_offset_t paddr, unsigned int data);
55e303ae A	230	void ml_phys_write_half_64(
55e303ae A	231	addr64_t paddr, unsigned int data);
43866e37 A	232
	233	/* Write physical address word */
	234	void ml_phys_write(
	235	vm_offset_t paddr, unsigned int data);
55e303ae A	236	void ml_phys_write_64(
55e303ae A	237	addr64_t paddr, unsigned int data);
43866e37 A	238	void ml_phys_write_word(
43866e37 A	239	vm_offset_t paddr, unsigned int data);
55e303ae A	240	void ml_phys_write_word_64(
55e303ae A	241	addr64_t paddr, unsigned int data);
43866e37 A	242
	243	/* Write physical address double word */
	244	void ml_phys_write_double(
	245	vm_offset_t paddr, unsigned long long data);
55e303ae A	246	void ml_phys_write_double_64(
55e303ae A	247	addr64_t paddr, unsigned long long data);
43866e37	248
43866e37 A	249	/* Struct for ml_cpu_get_info */
43866e37 A	250	struct ml_cpu_info {
6d2010ae A	251	uint32_t vector_unit;
	252	uint32_t cache_line_size;
	253	uint32_t l1_icache_size;
	254	uint32_t l1_dcache_size;
	255	uint32_t l2_settings;
	256	uint32_t l2_cache_size;
	257	uint32_t l3_settings;
	258	uint32_t l3_cache_size;
43866e37 A	259	};
	260
	261	typedef struct ml_cpu_info ml_cpu_info_t;
	262
	263	/* Get processor info */
91447636	264	void ml_cpu_get_info(ml_cpu_info_t *ml_cpu_info);
43866e37	265
9bccf70c A	266	void ml_thread_policy(
	267	thread_t thread,
	268	unsigned policy_id,
	269	unsigned policy_info);
1c79356b	270
9bccf70c A	271	#define MACHINE_GROUP 0x00000001
	272	#define MACHINE_NETWORK_GROUP 0x10000000
	273	#define MACHINE_NETWORK_WORKLOOP 0x00000001
	274	#define MACHINE_NETWORK_NETISR 0x00000002
1c79356b	275
43866e37 A	276	/* Return the maximum number of CPUs set by ml_init_max_cpus() */
	277	int ml_get_max_cpus(
	278	void);
	279
2d21ac55 A	280	/*
	281	* The following are in pmCPU.c not machine_routines.c.
	282	*/
0c530ab8 A	283	extern void ml_set_maxsnoop(uint32_t maxdelay);
	284	extern unsigned ml_get_maxsnoop(void);
	285	extern void ml_set_maxbusdelay(uint32_t mdelay);
	286	extern uint32_t ml_get_maxbusdelay(void);
593a1d5f A	287	extern void ml_set_maxintdelay(uint64_t mdelay);
593a1d5f A	288	extern uint64_t ml_get_maxintdelay(void);
6d2010ae	289	extern boolean_t ml_get_interrupt_prewake_applicable(void);
2d21ac55 A	290
2d21ac55 A	291
0c530ab8 A	292	extern uint64_t tmrCvt(uint64_t time, uint64_t conversion);
0c530ab8 A	293
2d21ac55 A	294	extern uint64_t ml_cpu_int_event_time(void);
2d21ac55 A	295
b0d623f7 A	296	#endif /* KERNEL_PRIVATE */
	297
	298	/* Get Interrupts Enabled */
	299	boolean_t ml_get_interrupts_enabled(void);
	300
	301	/* Set Interrupts Enabled */
	302	boolean_t ml_set_interrupts_enabled(boolean_t enable);
	303
	304	/* Check if running at interrupt context */
	305	boolean_t ml_at_interrupt_context(void);
	306
	307	/* Zero bytes starting at a physical address */
	308	void bzero_phys(
	309	addr64_t phys_address,
	310	uint32_t length);
	311
	312	/* Bytes available on current stack */
	313	vm_offset_t ml_stack_remaining(void);
	314
91447636 A	315	__END_DECLS
91447636 A	316
6d2010ae	317	#ifdef XNU_KERNEL_PRIVATE
316670eb	318
6d2010ae	319	boolean_t ml_fpu_avx_enabled(void);
316670eb	320
6d2010ae A	321	void interrupt_latency_tracker_setup(void);
	322	void interrupt_reset_latency_stats(void);
	323	void interrupt_populate_latency_stats(char *, unsigned);
4b17d6b6	324	void ml_get_power_state(boolean_t , boolean_t );
060df5ea	325
39236c6e A	326	void timer_queue_expire_local(void*);
	327	void timer_queue_expire_rescan(void*);
	328	void ml_timer_evaluate(void);
	329	boolean_t ml_timer_forced_evaluation(void);
39236c6e	330
fe8ab488 A	331	void ml_gpu_stat_update(uint64_t);
fe8ab488 A	332	uint64_t ml_gpu_stat(thread_t);
143464d5	333	boolean_t ml_recent_wake(void);
3e170ce0 A	334
	335	extern uint64_t reportphyreaddelayabs;
	336	extern uint32_t reportphyreadosbt;
	337
6d2010ae	338	#endif /* XNU_KERNEL_PRIVATE */
1c79356b	339	#endif /* _I386_MACHINE_ROUTINES_H_ */