[apple/xnu.git] / osfmk / ppc / misc_asm.s

/*
 * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#include <mach_kdb.h>
#include <mach_kgdb.h>
#include <mach_debug.h>
#include <assym.s>
#include <ppc/asm.h>
#include <ppc/proc_reg.h>
#include <mach/ppc/vm_param.h>

/*
 * vm_offset_t getrpc(void) - Return address of the function
 *	                      that called the current function
 */

/* By using this function, we force the caller to save its LR in a known
 * location, which we can pick up and return. See PowerPC ELF specs.
 */
ENTRY(getrpc, TAG_NO_FRAME_USED)
	lwz	ARG0,	FM_BACKPTR(r1)		/* Load our backchain ptr */
	lwz	ARG0,	FM_LR_SAVE(ARG0)	/* Load previously saved LR */
	blr					/* And return */


/*
 *	General entry for all debuggers.  This gets us onto the debug stack and
 *	then back off at exit. We need to pass back R3 to caller.
 */
 
ENTRY(Call_Debugger, TAG_NO_FRAME_USED)


			lis		r8,hi16(MASK(MSR_VEC))			; Get the vector flag
			mfmsr	r7				; Get the current MSR
			ori		r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP))	; Add the FP flag
			mflr	r0				; Save the return
			andc	r7,r7,r8						; Clear VEC and FP
			mtmsr	r7				; Do it 
			isync
			mfsprg	r8,1					; Get the current activation
			lwz		r8,ACT_PER_PROC(r8)		; Get the per_proc block
			stw		r0,FM_LR_SAVE(r1)	; Save return on current stack
			
			lwz		r9,PP_DEBSTACKPTR(r8)	; Get the debug stack
			cmpwi	r9,0			; Are we already on it?
			bne		cdNewDeb		; No...
		
			mr		r9,r1 			; We are already on the stack, so use the current value
			subi	r9,r9,FM_REDZONE+FM_SIZE	; Carve some extra space here
		
cdNewDeb:	li		r0,0			; Clear this out
			stw		r1,FM_ARG0(r9)	; Save the old stack pointer as if it were the first arg

			stw		r0,PP_DEBSTACKPTR(r8)	; Mark debug stack as busy
			
			subi	r1,r9,FM_SIZE	; Carve a new frame
			stw		r0,FM_BACKPTR(r1)	; Chain back
			
			bl		EXT(Call_DebuggerC)	; Call the "C" phase of this
		
			lis		r8,hi16(MASK(MSR_VEC))			; Get the vector flag
			mfmsr	r0				; Get the current MSR
			ori		r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP))	; Add the FP flag
			addi	r1,r1,FM_SIZE	; Pop off first stack frame
			andc	r0,r0,r8		; Turn off all the interesting stuff
			mtmsr	r0
		
			mfsprg	r8,1					; Get the current activation
			lwz		r8,ACT_PER_PROC(r8)		; Get the per_proc block
			
			lwz		r9,PP_DEBSTACK_TOP_SS(r8)	; Get the top of the stack
			cmplw	r1,r9			; Have we hit the bottom of the debug stack?
			lwz		r1,FM_ARG0(r1)	; Get previous stack frame
			lwz		r0,FM_LR_SAVE(r1)	; Get return address
			mtlr	r0				; Set the return point
			bnelr					; Return if still on debug stack

			stw		r9,PP_DEBSTACKPTR(r8)	; Mark debug stack as free		
			blr
 

/* The following routines are for C-support. They are usually
 * inlined into the C using the specifications in proc_reg.h,
 * but if optimisation is switched off, the inlining doesn't work
 */

ENTRY(get_got, TAG_NO_FRAME_USED)
	mr	ARG0,	r2
	blr
	
ENTRY(mflr, TAG_NO_FRAME_USED)
	mflr	ARG0
	blr

ENTRY(mfpvr, TAG_NO_FRAME_USED)
	mfpvr	ARG0
	blr

ENTRY(mtmsr, TAG_NO_FRAME_USED)
	mtmsr	ARG0
	isync
	blr

ENTRY(mfmsr, TAG_NO_FRAME_USED)
	mfmsr	ARG0
	blr

ENTRY(mtsrin, TAG_NO_FRAME_USED)
	isync
	mtsrin	ARG0,	ARG1
	isync
	blr

ENTRY(mfsrin, TAG_NO_FRAME_USED)
	mfsrin	ARG0,	ARG0
	blr

ENTRY(mtsdr1, TAG_NO_FRAME_USED)
	mtsdr1	ARG0
	blr

ENTRY(mtdar, TAG_NO_FRAME_USED)
	mtdar	ARG0
	blr

ENTRY(mfdar, TAG_NO_FRAME_USED)
	mfdar	ARG0
	blr

ENTRY(mtdec, TAG_NO_FRAME_USED)
	mtdec	ARG0
	blr

ENTRY(cntlzw, TAG_NO_FRAME_USED)
	cntlzw	r3,r3
	blr

/* Decrementer frequency and realtime|timebase processor registers
 * are different between ppc601 and ppc603/4, we define them all.
 */

ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
	isync
	mfdec	ARG0
	blr


ENTRY(mftb, TAG_NO_FRAME_USED)
	mftb	ARG0
	blr

ENTRY(mftbu, TAG_NO_FRAME_USED)
	mftbu	ARG0
	blr

ENTRY(mfrtcl, TAG_NO_FRAME_USED)
	mfspr	ARG0,	5
	blr

ENTRY(mfrtcu, TAG_NO_FRAME_USED)
	mfspr	ARG0,	4
	blr

ENTRY(tlbie, TAG_NO_FRAME_USED)
	tlbie	ARG0
	blr


/*
 * Performance Monitor Register Support
 */	

ENTRY(mfmmcr0, TAG_NO_FRAME_USED)	
	mfspr	r3,mmcr0
	blr

ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
	mtspr	mmcr0,r3
	blr								

ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
	mfspr	r3,mmcr1
	blr								

ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
	mtspr	mmcr1,r3
	blr

ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
	mfspr	r3,mmcr2
	blr								

ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
	mtspr	mmcr2,r3
	blr

ENTRY(mfpmc1, TAG_NO_FRAME_USED)
	mfspr	r3,pmc1
	blr

ENTRY(mtpmc1, TAG_NO_FRAME_USED)
	mtspr	pmc1,r3
	blr								

ENTRY(mfpmc2, TAG_NO_FRAME_USED)
	mfspr	r3,pmc2
	blr

ENTRY(mtpmc2, TAG_NO_FRAME_USED)
	mtspr	pmc2,r3
	blr								

ENTRY(mfpmc3, TAG_NO_FRAME_USED)
	mfspr	r3,pmc3
	blr

ENTRY(mtpmc3, TAG_NO_FRAME_USED)
	mtspr	pmc3,r3
	blr								

ENTRY(mfpmc4, TAG_NO_FRAME_USED)
	mfspr	r3,pmc4
	blr

ENTRY(mtpmc4, TAG_NO_FRAME_USED)
	mtspr	pmc4,r3
	blr			
						
ENTRY(mfsia, TAG_NO_FRAME_USED)
	mfspr	r3,sia
	blr

ENTRY(mfsda, TAG_NO_FRAME_USED)
	mfspr	r3,sda
	blr

	.globl	EXT(hid1get)
LEXT(hid1get)

	mfspr	r3,hid1					; Get the HID1
	blr

	.globl	EXT(hid0get64)
LEXT(hid0get64)

	mfspr	r4,hid0					; Get the HID0
	srdi	r3,r4,32				; Move top down
	rlwinm	r4,r4,0,0,31			; Clean top
	blr

	.globl	EXT(hid5set64)
LEXT(hid5set64)

	rlwinm	r3,r3,0,1,0				; Copy low 32 int high 32
	rlwimi	r3,r4,0,0,31			; Inser the low part behind top
	mtspr	hid5,r3					; Set it
	isync							; Wait for it
	blr
Commit	Line	Data
1c79356b	1	/*
3a60a9f5	2	* Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
1c79356b	3	*
2d21ac55	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
2d21ac55 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
8f6c56a5	14	*
2d21ac55 A	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
8f6c56a5	25	*
2d21ac55	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
	31
	32	#include <mach_kdb.h>
	33	#include <mach_kgdb.h>
	34	#include <mach_debug.h>
	35	#include <assym.s>
	36	#include <ppc/asm.h>
	37	#include <ppc/proc_reg.h>
	38	#include <mach/ppc/vm_param.h>
	39
	40	/*
	41	* vm_offset_t getrpc(void) - Return address of the function
	42	* that called the current function
	43	*/
	44
	45	/* By using this function, we force the caller to save its LR in a known
	46	* location, which we can pick up and return. See PowerPC ELF specs.
	47	*/
	48	ENTRY(getrpc, TAG_NO_FRAME_USED)
	49	lwz ARG0, FM_BACKPTR(r1) /* Load our backchain ptr */
	50	lwz ARG0, FM_LR_SAVE(ARG0) /* Load previously saved LR */
	51	blr /* And return */
	52
	53
1c79356b A	54	/*
	55	* General entry for all debuggers. This gets us onto the debug stack and
	56	* then back off at exit. We need to pass back R3 to caller.
	57	*/
	58
	59	ENTRY(Call_Debugger, TAG_NO_FRAME_USED)
	60
55e303ae A	61
55e303ae A	62	lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag
1c79356b	63	mfmsr r7 ; Get the current MSR
55e303ae	64	ori r8,r8,lo16(MASK(MSR_EE)\|MASK(MSR_FP)) ; Add the FP flag
1c79356b	65	mflr r0 ; Save the return
55e303ae	66	andc r7,r7,r8 ; Clear VEC and FP
1c79356b	67	mtmsr r7 ; Do it
9bccf70c	68	isync
91447636 A	69	mfsprg r8,1 ; Get the current activation
91447636 A	70	lwz r8,ACT_PER_PROC(r8) ; Get the per_proc block
1c79356b A	71	stw r0,FM_LR_SAVE(r1) ; Save return on current stack
	72
	73	lwz r9,PP_DEBSTACKPTR(r8) ; Get the debug stack
	74	cmpwi r9,0 ; Are we already on it?
	75	bne cdNewDeb ; No...
	76
	77	mr r9,r1 ; We are already on the stack, so use the current value
	78	subi r9,r9,FM_REDZONE+FM_SIZE ; Carve some extra space here
	79
	80	cdNewDeb: li r0,0 ; Clear this out
	81	stw r1,FM_ARG0(r9) ; Save the old stack pointer as if it were the first arg
	82
	83	stw r0,PP_DEBSTACKPTR(r8) ; Mark debug stack as busy
	84
	85	subi r1,r9,FM_SIZE ; Carve a new frame
	86	stw r0,FM_BACKPTR(r1) ; Chain back
	87
	88	bl EXT(Call_DebuggerC) ; Call the "C" phase of this
	89
55e303ae A	90	lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag
	91	mfmsr r0 ; Get the current MSR
	92	ori r8,r8,lo16(MASK(MSR_EE)\|MASK(MSR_FP)) ; Add the FP flag
1c79356b	93	addi r1,r1,FM_SIZE ; Pop off first stack frame
55e303ae	94	andc r0,r0,r8 ; Turn off all the interesting stuff
1c79356b A	95	mtmsr r0
1c79356b A	96
91447636 A	97	mfsprg r8,1 ; Get the current activation
91447636 A	98	lwz r8,ACT_PER_PROC(r8) ; Get the per_proc block
1c79356b A	99
	100	lwz r9,PP_DEBSTACK_TOP_SS(r8) ; Get the top of the stack
	101	cmplw r1,r9 ; Have we hit the bottom of the debug stack?
	102	lwz r1,FM_ARG0(r1) ; Get previous stack frame
	103	lwz r0,FM_LR_SAVE(r1) ; Get return address
	104	mtlr r0 ; Set the return point
	105	bnelr ; Return if still on debug stack
	106
	107	stw r9,PP_DEBSTACKPTR(r8) ; Mark debug stack as free
	108	blr
	109
	110
	111	/* The following routines are for C-support. They are usually
	112	* inlined into the C using the specifications in proc_reg.h,
	113	* but if optimisation is switched off, the inlining doesn't work
	114	*/
	115
	116	ENTRY(get_got, TAG_NO_FRAME_USED)
	117	mr ARG0, r2
	118	blr
	119
	120	ENTRY(mflr, TAG_NO_FRAME_USED)
	121	mflr ARG0
	122	blr
	123
	124	ENTRY(mfpvr, TAG_NO_FRAME_USED)
	125	mfpvr ARG0
	126	blr
	127
	128	ENTRY(mtmsr, TAG_NO_FRAME_USED)
	129	mtmsr ARG0
	130	isync
	131	blr
	132
	133	ENTRY(mfmsr, TAG_NO_FRAME_USED)
	134	mfmsr ARG0
	135	blr
	136
	137	ENTRY(mtsrin, TAG_NO_FRAME_USED)
	138	isync
	139	mtsrin ARG0, ARG1
	140	isync
	141	blr
	142
	143	ENTRY(mfsrin, TAG_NO_FRAME_USED)
	144	mfsrin ARG0, ARG0
	145	blr
	146
	147	ENTRY(mtsdr1, TAG_NO_FRAME_USED)
	148	mtsdr1 ARG0
	149	blr
	150
	151	ENTRY(mtdar, TAG_NO_FRAME_USED)
	152	mtdar ARG0
	153	blr
	154
	155	ENTRY(mfdar, TAG_NO_FRAME_USED)
	156	mfdar ARG0
	157	blr
	158
	159	ENTRY(mtdec, TAG_NO_FRAME_USED)
	160	mtdec ARG0
	161	blr
	162
55e303ae A	163	ENTRY(cntlzw, TAG_NO_FRAME_USED)
	164	cntlzw r3,r3
	165	blr
	166
1c79356b A	167	/* Decrementer frequency and realtime\|timebase processor registers
	168	* are different between ppc601 and ppc603/4, we define them all.
	169	*/
	170
	171	ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
	172	isync
	173	mfdec ARG0
	174	blr
	175
	176
	177	ENTRY(mftb, TAG_NO_FRAME_USED)
	178	mftb ARG0
	179	blr
	180
	181	ENTRY(mftbu, TAG_NO_FRAME_USED)
	182	mftbu ARG0
	183	blr
	184
	185	ENTRY(mfrtcl, TAG_NO_FRAME_USED)
	186	mfspr ARG0, 5
	187	blr
	188
	189	ENTRY(mfrtcu, TAG_NO_FRAME_USED)
	190	mfspr ARG0, 4
	191	blr
	192
	193	ENTRY(tlbie, TAG_NO_FRAME_USED)
	194	tlbie ARG0
	195	blr
	196
	197
	198	/*
	199	* Performance Monitor Register Support
	200	*/
	201
	202	ENTRY(mfmmcr0, TAG_NO_FRAME_USED)
	203	mfspr r3,mmcr0
	204	blr
	205
	206	ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
	207	mtspr mmcr0,r3
	208	blr
	209
	210	ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
	211	mfspr r3,mmcr1
	212	blr
	213
	214	ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
	215	mtspr mmcr1,r3
	216	blr
	217
	218	ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
	219	mfspr r3,mmcr2
	220	blr
	221
	222	ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
	223	mtspr mmcr2,r3
	224	blr
	225
	226	ENTRY(mfpmc1, TAG_NO_FRAME_USED)
	227	mfspr r3,pmc1
	228	blr
	229
	230	ENTRY(mtpmc1, TAG_NO_FRAME_USED)
231	mtspr pmc1,r3
232	blr
233
234	ENTRY(mfpmc2, TAG_NO_FRAME_USED)
235	mfspr r3,pmc2
236	blr
237
238	ENTRY(mtpmc2, TAG_NO_FRAME_USED)
239	mtspr pmc2,r3
240	blr
241
242	ENTRY(mfpmc3, TAG_NO_FRAME_USED)
243	mfspr r3,pmc3
244	blr
245
246	ENTRY(mtpmc3, TAG_NO_FRAME_USED)
247	mtspr pmc3,r3
248	blr
249
250	ENTRY(mfpmc4, TAG_NO_FRAME_USED)
251	mfspr r3,pmc4
252	blr
253
254	ENTRY(mtpmc4, TAG_NO_FRAME_USED)
255	mtspr pmc4,r3
256	blr
257
258	ENTRY(mfsia, TAG_NO_FRAME_USED)
259	mfspr r3,sia
260	blr
261
262	ENTRY(mfsda, TAG_NO_FRAME_USED)
263	mfspr r3,sda
264	blr
265
3a60a9f5 A	266	.globl EXT(hid1get)
	267	LEXT(hid1get)
	268
	269	mfspr r3,hid1 ; Get the HID1
	270	blr
	271
55e303ae	272	.globl EXT(hid0get64)
55e303ae A	273	LEXT(hid0get64)
	274
	275	mfspr r4,hid0 ; Get the HID0
	276	srdi r3,r4,32 ; Move top down
	277	rlwinm r4,r4,0,0,31 ; Clean top
	278	blr
e5568f75 A	279
	280	.globl EXT(hid5set64)
	281	LEXT(hid5set64)
	282
	283	rlwinm r3,r3,0,1,0 ; Copy low 32 int high 32
	284	rlwimi r3,r4,0,0,31 ; Inser the low part behind top
	285	mtspr hid5,r3 ; Set it
	286	isync ; Wait for it
	287	blr