[apple/xnu.git] / osfmk / ppc / misc_asm.s

/*
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * The contents of this file constitute Original Code as defined in and
 * are subject to the Apple Public Source License Version 1.1 (the
 * "License").  You may not use this file except in compliance with the
 * License.  Please obtain a copy of the License at
 * http://www.apple.com/publicsource and read it before using this file.
 * 
 * This Original Code and all software distributed under the License are
 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
 * License for the specific language governing rights and limitations
 * under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#include <mach_kdb.h>
#include <mach_kgdb.h>
#include <mach_debug.h>
#include <assym.s>
#include <ppc/asm.h>
#include <ppc/proc_reg.h>
#include <mach/ppc/vm_param.h>

/*
 * vm_offset_t getrpc(void) - Return address of the function
 *	                      that called the current function
 */

/* By using this function, we force the caller to save its LR in a known
 * location, which we can pick up and return. See PowerPC ELF specs.
 */
ENTRY(getrpc, TAG_NO_FRAME_USED)
	lwz	ARG0,	FM_BACKPTR(r1)		/* Load our backchain ptr */
	lwz	ARG0,	FM_LR_SAVE(ARG0)	/* Load previously saved LR */
	blr					/* And return */


/* Mask and unmask interrupts at the processor level */	
ENTRY(interrupt_disable, TAG_NO_FRAME_USED)
			lis		r8,hi16(MASK(MSR_VEC))			; Get the vector flag
			mfmsr	r0								; Save the MSR 
			ori		r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP))	; Add the FP flag
			andc	r0,r0,r8						; Clear VEC, FP, DR, and EE
			mtmsr	r0
			isync
			blr

ENTRY(interrupt_enable, TAG_NO_FRAME_USED)

	mfmsr	r0
	ori		r0,	r0,	MASK(MSR_EE)
	mtmsr	r0
	blr

#if	MACH_KDB
/*
 * Kernel debugger versions of the spl*() functions.  This allows breakpoints
 * in the spl*() functions.
 */

/* Mask and unmask interrupts at the processor level */	
ENTRY(db_interrupt_disable, TAG_NO_FRAME_USED)
			lis		r8,hi16(MASK(MSR_VEC))			; Get the vector flag
			mfmsr	r0								; Save the MSR 
			ori		r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP))	; Add the FP flag
			andc	r0,r0,r8						; Clear VEC, FP, DR, and EE
			mtmsr	r0
			isync
			blr

ENTRY(db_interrupt_enable, TAG_NO_FRAME_USED)
	mfmsr	r0
	ori	r0,	r0,	MASK(MSR_EE)
	mtmsr	r0
	blr
#endif	/* MACH_KDB */

/*
 *	General entry for all debuggers.  This gets us onto the debug stack and
 *	then back off at exit. We need to pass back R3 to caller.
 */
 
ENTRY(Call_Debugger, TAG_NO_FRAME_USED)


			lis		r8,hi16(MASK(MSR_VEC))			; Get the vector flag
			mfmsr	r7				; Get the current MSR
			ori		r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP))	; Add the FP flag
			mflr	r0				; Save the return
			andc	r7,r7,r8						; Clear VEC and FP
			mtmsr	r7				; Do it 
			isync
			mfsprg	r8,0			; Get the per_proc block
			stw		r0,FM_LR_SAVE(r1)	; Save return on current stack
			
			lwz		r9,PP_DEBSTACKPTR(r8)	; Get the debug stack
			cmpwi	r9,0			; Are we already on it?
			bne		cdNewDeb		; No...
		
			mr		r9,r1 			; We are already on the stack, so use the current value
			subi	r9,r9,FM_REDZONE+FM_SIZE	; Carve some extra space here
		
cdNewDeb:	li		r0,0			; Clear this out
			stw		r1,FM_ARG0(r9)	; Save the old stack pointer as if it were the first arg

			stw		r0,PP_DEBSTACKPTR(r8)	; Mark debug stack as busy
			
			subi	r1,r9,FM_SIZE	; Carve a new frame
			stw		r0,FM_BACKPTR(r1)	; Chain back
			
			bl		EXT(Call_DebuggerC)	; Call the "C" phase of this
		
			lis		r8,hi16(MASK(MSR_VEC))			; Get the vector flag
			mfmsr	r0				; Get the current MSR
			ori		r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP))	; Add the FP flag
			addi	r1,r1,FM_SIZE	; Pop off first stack frame
			andc	r0,r0,r8		; Turn off all the interesting stuff
			mtmsr	r0
		
			mfsprg	r8,0			; Get the per_proc block address
			
			lwz		r9,PP_DEBSTACK_TOP_SS(r8)	; Get the top of the stack
			cmplw	r1,r9			; Have we hit the bottom of the debug stack?
			lwz		r1,FM_ARG0(r1)	; Get previous stack frame
			lwz		r0,FM_LR_SAVE(r1)	; Get return address
			mtlr	r0				; Set the return point
			bnelr					; Return if still on debug stack

			stw		r9,PP_DEBSTACKPTR(r8)	; Mark debug stack as free		
			blr
 

/* The following routines are for C-support. They are usually
 * inlined into the C using the specifications in proc_reg.h,
 * but if optimisation is switched off, the inlining doesn't work
 */

ENTRY(get_got, TAG_NO_FRAME_USED)
	mr	ARG0,	r2
	blr
	
ENTRY(mflr, TAG_NO_FRAME_USED)
	mflr	ARG0
	blr

ENTRY(mfpvr, TAG_NO_FRAME_USED)
	mfpvr	ARG0
	blr

ENTRY(mtmsr, TAG_NO_FRAME_USED)
	mtmsr	ARG0
	isync
	blr

ENTRY(mfmsr, TAG_NO_FRAME_USED)
	mfmsr	ARG0
	blr

ENTRY(mtsrin, TAG_NO_FRAME_USED)
	isync
	mtsrin	ARG0,	ARG1
	isync
	blr

ENTRY(mfsrin, TAG_NO_FRAME_USED)
	mfsrin	ARG0,	ARG0
	blr

ENTRY(mtsdr1, TAG_NO_FRAME_USED)
	mtsdr1	ARG0
	blr

ENTRY(mtdar, TAG_NO_FRAME_USED)
	mtdar	ARG0
	blr

ENTRY(mfdar, TAG_NO_FRAME_USED)
	mfdar	ARG0
	blr

ENTRY(mtdec, TAG_NO_FRAME_USED)
	mtdec	ARG0
	blr

ENTRY(cntlzw, TAG_NO_FRAME_USED)
	cntlzw	r3,r3
	blr

/* Decrementer frequency and realtime|timebase processor registers
 * are different between ppc601 and ppc603/4, we define them all.
 */

ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
	isync
	mfdec	ARG0
	blr


ENTRY(mftb, TAG_NO_FRAME_USED)
	mftb	ARG0
	blr

ENTRY(mftbu, TAG_NO_FRAME_USED)
	mftbu	ARG0
	blr

ENTRY(mfrtcl, TAG_NO_FRAME_USED)
	mfspr	ARG0,	5
	blr

ENTRY(mfrtcu, TAG_NO_FRAME_USED)
	mfspr	ARG0,	4
	blr

ENTRY(tlbie, TAG_NO_FRAME_USED)
	tlbie	ARG0
	blr


/*
 * Performance Monitor Register Support
 */	

ENTRY(mfmmcr0, TAG_NO_FRAME_USED)	
	mfspr	r3,mmcr0
	blr

ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
	mtspr	mmcr0,r3
	blr								

ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
	mfspr	r3,mmcr1
	blr								

ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
	mtspr	mmcr1,r3
	blr

ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
	mfspr	r3,mmcr2
	blr								

ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
	mtspr	mmcr2,r3
	blr

ENTRY(mfpmc1, TAG_NO_FRAME_USED)
	mfspr	r3,pmc1
	blr

ENTRY(mtpmc1, TAG_NO_FRAME_USED)
	mtspr	pmc1,r3
	blr								

ENTRY(mfpmc2, TAG_NO_FRAME_USED)
	mfspr	r3,pmc2
	blr

ENTRY(mtpmc2, TAG_NO_FRAME_USED)
	mtspr	pmc2,r3
	blr								

ENTRY(mfpmc3, TAG_NO_FRAME_USED)
	mfspr	r3,pmc3
	blr

ENTRY(mtpmc3, TAG_NO_FRAME_USED)
	mtspr	pmc3,r3
	blr								

ENTRY(mfpmc4, TAG_NO_FRAME_USED)
	mfspr	r3,pmc4
	blr

ENTRY(mtpmc4, TAG_NO_FRAME_USED)
	mtspr	pmc4,r3
	blr			
						
ENTRY(mfsia, TAG_NO_FRAME_USED)
	mfspr	r3,sia
	blr

ENTRY(mfsda, TAG_NO_FRAME_USED)
	mfspr	r3,sda
	blr

	.globl	EXT(hid0get64)
LEXT(hid0get64)

	mfspr	r4,hid0					; Get the HID0
	srdi	r3,r4,32				; Move top down
	rlwinm	r4,r4,0,0,31			; Clean top
	blr

	.globl	EXT(hid5set64)
LEXT(hid5set64)

	rlwinm	r3,r3,0,1,0				; Copy low 32 int high 32
	rlwimi	r3,r4,0,0,31			; Inser the low part behind top
	mtspr	hid5,r3					; Set it
	isync							; Wait for it
	blr
Commit	Line	Data
1c79356b A	1	/*
	2	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_LICENSE_HEADER_START@
	5	*
e5568f75 A	6	* The contents of this file constitute Original Code as defined in and
	7	* are subject to the Apple Public Source License Version 1.1 (the
	8	* "License"). You may not use this file except in compliance with the
	9	* License. Please obtain a copy of the License at
	10	* http://www.apple.com/publicsource and read it before using this file.
1c79356b	11	*
e5568f75 A	12	* This Original Code and all software distributed under the License are
e5568f75 A	13	* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
1c79356b A	14	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
1c79356b A	15	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
e5568f75 A	16	* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
	17	* License for the specific language governing rights and limitations
	18	* under the License.
1c79356b A	19	*
	20	* @APPLE_LICENSE_HEADER_END@
	21	*/
	22	/*
	23	* @OSF_COPYRIGHT@
	24	*/
	25
	26	#include <mach_kdb.h>
	27	#include <mach_kgdb.h>
	28	#include <mach_debug.h>
	29	#include <assym.s>
	30	#include <ppc/asm.h>
	31	#include <ppc/proc_reg.h>
	32	#include <mach/ppc/vm_param.h>
	33
	34	/*
	35	* vm_offset_t getrpc(void) - Return address of the function
	36	* that called the current function
	37	*/
	38
	39	/* By using this function, we force the caller to save its LR in a known
	40	* location, which we can pick up and return. See PowerPC ELF specs.
	41	*/
	42	ENTRY(getrpc, TAG_NO_FRAME_USED)
	43	lwz ARG0, FM_BACKPTR(r1) /* Load our backchain ptr */
	44	lwz ARG0, FM_LR_SAVE(ARG0) /* Load previously saved LR */
	45	blr /* And return */
	46
	47
	48	/* Mask and unmask interrupts at the processor level */
	49	ENTRY(interrupt_disable, TAG_NO_FRAME_USED)
55e303ae A	50	lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag
	51	mfmsr r0 ; Save the MSR
	52	ori r8,r8,lo16(MASK(MSR_EE)\|MASK(MSR_FP)) ; Add the FP flag
	53	andc r0,r0,r8 ; Clear VEC, FP, DR, and EE
	54	mtmsr r0
	55	isync
	56	blr
1c79356b A	57
	58	ENTRY(interrupt_enable, TAG_NO_FRAME_USED)
	59
	60	mfmsr r0
	61	ori r0, r0, MASK(MSR_EE)
	62	mtmsr r0
	63	blr
	64
	65	#if MACH_KDB
	66	/*
	67	* Kernel debugger versions of the spl*() functions. This allows breakpoints
	68	* in the spl*() functions.
	69	*/
	70
	71	/* Mask and unmask interrupts at the processor level */
	72	ENTRY(db_interrupt_disable, TAG_NO_FRAME_USED)
55e303ae A	73	lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag
	74	mfmsr r0 ; Save the MSR
	75	ori r8,r8,lo16(MASK(MSR_EE)\|MASK(MSR_FP)) ; Add the FP flag
	76	andc r0,r0,r8 ; Clear VEC, FP, DR, and EE
	77	mtmsr r0
	78	isync
	79	blr
1c79356b A	80
	81	ENTRY(db_interrupt_enable, TAG_NO_FRAME_USED)
	82	mfmsr r0
	83	ori r0, r0, MASK(MSR_EE)
	84	mtmsr r0
	85	blr
	86	#endif /* MACH_KDB */
	87
	88	/*
	89	* General entry for all debuggers. This gets us onto the debug stack and
	90	* then back off at exit. We need to pass back R3 to caller.
	91	*/
	92
	93	ENTRY(Call_Debugger, TAG_NO_FRAME_USED)
	94
55e303ae A	95
55e303ae A	96	lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag
1c79356b	97	mfmsr r7 ; Get the current MSR
55e303ae	98	ori r8,r8,lo16(MASK(MSR_EE)\|MASK(MSR_FP)) ; Add the FP flag
1c79356b	99	mflr r0 ; Save the return
55e303ae	100	andc r7,r7,r8 ; Clear VEC and FP
1c79356b	101	mtmsr r7 ; Do it
9bccf70c	102	isync
1c79356b A	103	mfsprg r8,0 ; Get the per_proc block
	104	stw r0,FM_LR_SAVE(r1) ; Save return on current stack
	105
	106	lwz r9,PP_DEBSTACKPTR(r8) ; Get the debug stack
	107	cmpwi r9,0 ; Are we already on it?
	108	bne cdNewDeb ; No...
	109
	110	mr r9,r1 ; We are already on the stack, so use the current value
	111	subi r9,r9,FM_REDZONE+FM_SIZE ; Carve some extra space here
	112
	113	cdNewDeb: li r0,0 ; Clear this out
	114	stw r1,FM_ARG0(r9) ; Save the old stack pointer as if it were the first arg
	115
	116	stw r0,PP_DEBSTACKPTR(r8) ; Mark debug stack as busy
	117
	118	subi r1,r9,FM_SIZE ; Carve a new frame
	119	stw r0,FM_BACKPTR(r1) ; Chain back
	120
	121	bl EXT(Call_DebuggerC) ; Call the "C" phase of this
	122
55e303ae A	123	lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag
	124	mfmsr r0 ; Get the current MSR
	125	ori r8,r8,lo16(MASK(MSR_EE)\|MASK(MSR_FP)) ; Add the FP flag
1c79356b	126	addi r1,r1,FM_SIZE ; Pop off first stack frame
55e303ae	127	andc r0,r0,r8 ; Turn off all the interesting stuff
1c79356b A	128	mtmsr r0
	129
	130	mfsprg r8,0 ; Get the per_proc block address
	131
	132	lwz r9,PP_DEBSTACK_TOP_SS(r8) ; Get the top of the stack
	133	cmplw r1,r9 ; Have we hit the bottom of the debug stack?
	134	lwz r1,FM_ARG0(r1) ; Get previous stack frame
	135	lwz r0,FM_LR_SAVE(r1) ; Get return address
	136	mtlr r0 ; Set the return point
	137	bnelr ; Return if still on debug stack
	138
	139	stw r9,PP_DEBSTACKPTR(r8) ; Mark debug stack as free
	140	blr
	141
	142
	143	/* The following routines are for C-support. They are usually
	144	* inlined into the C using the specifications in proc_reg.h,
	145	* but if optimisation is switched off, the inlining doesn't work
	146	*/
	147
	148	ENTRY(get_got, TAG_NO_FRAME_USED)
	149	mr ARG0, r2
	150	blr
	151
	152	ENTRY(mflr, TAG_NO_FRAME_USED)
	153	mflr ARG0
	154	blr
	155
	156	ENTRY(mfpvr, TAG_NO_FRAME_USED)
	157	mfpvr ARG0
	158	blr
	159
	160	ENTRY(mtmsr, TAG_NO_FRAME_USED)
	161	mtmsr ARG0
	162	isync
	163	blr
	164
	165	ENTRY(mfmsr, TAG_NO_FRAME_USED)
	166	mfmsr ARG0
	167	blr
	168
	169	ENTRY(mtsrin, TAG_NO_FRAME_USED)
	170	isync
	171	mtsrin ARG0, ARG1
	172	isync
	173	blr
	174
	175	ENTRY(mfsrin, TAG_NO_FRAME_USED)
	176	mfsrin ARG0, ARG0
	177	blr
	178
	179	ENTRY(mtsdr1, TAG_NO_FRAME_USED)
	180	mtsdr1 ARG0
	181	blr
	182
	183	ENTRY(mtdar, TAG_NO_FRAME_USED)
	184	mtdar ARG0
	185	blr
	186
	187	ENTRY(mfdar, TAG_NO_FRAME_USED)
	188	mfdar ARG0
	189	blr
	190
	191	ENTRY(mtdec, TAG_NO_FRAME_USED)
192	mtdec ARG0
193	blr
194
55e303ae A	195	ENTRY(cntlzw, TAG_NO_FRAME_USED)
	196	cntlzw r3,r3
	197	blr
	198
1c79356b A	199	/* Decrementer frequency and realtime\|timebase processor registers
	200	* are different between ppc601 and ppc603/4, we define them all.
	201	*/
	202
	203	ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
	204	isync
	205	mfdec ARG0
	206	blr
	207
	208
	209	ENTRY(mftb, TAG_NO_FRAME_USED)
	210	mftb ARG0
	211	blr
	212
	213	ENTRY(mftbu, TAG_NO_FRAME_USED)
	214	mftbu ARG0
	215	blr
	216
	217	ENTRY(mfrtcl, TAG_NO_FRAME_USED)
	218	mfspr ARG0, 5
	219	blr
	220
	221	ENTRY(mfrtcu, TAG_NO_FRAME_USED)
	222	mfspr ARG0, 4
	223	blr
	224
	225	ENTRY(tlbie, TAG_NO_FRAME_USED)
	226	tlbie ARG0
	227	blr
	228
	229
	230	/*
	231	* Performance Monitor Register Support
	232	*/
	233
	234	ENTRY(mfmmcr0, TAG_NO_FRAME_USED)
	235	mfspr r3,mmcr0
	236	blr
	237
	238	ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
	239	mtspr mmcr0,r3
	240	blr
	241
	242	ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
	243	mfspr r3,mmcr1
	244	blr
	245
	246	ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
	247	mtspr mmcr1,r3
	248	blr
	249
	250	ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
	251	mfspr r3,mmcr2
	252	blr
	253
	254	ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
	255	mtspr mmcr2,r3
	256	blr
	257
	258	ENTRY(mfpmc1, TAG_NO_FRAME_USED)
	259	mfspr r3,pmc1
	260	blr
	261
	262	ENTRY(mtpmc1, TAG_NO_FRAME_USED)
263	mtspr pmc1,r3
264	blr
265
266	ENTRY(mfpmc2, TAG_NO_FRAME_USED)
267	mfspr r3,pmc2
268	blr
269
270	ENTRY(mtpmc2, TAG_NO_FRAME_USED)
271	mtspr pmc2,r3
272	blr
273
274	ENTRY(mfpmc3, TAG_NO_FRAME_USED)
275	mfspr r3,pmc3
276	blr
277
278	ENTRY(mtpmc3, TAG_NO_FRAME_USED)
279	mtspr pmc3,r3
280	blr
281
282	ENTRY(mfpmc4, TAG_NO_FRAME_USED)
283	mfspr r3,pmc4
284	blr
285
286	ENTRY(mtpmc4, TAG_NO_FRAME_USED)
287	mtspr pmc4,r3
288	blr
289
290	ENTRY(mfsia, TAG_NO_FRAME_USED)
291	mfspr r3,sia
292	blr
293
294	ENTRY(mfsda, TAG_NO_FRAME_USED)
295	mfspr r3,sda
296	blr
297
55e303ae	298	.globl EXT(hid0get64)
55e303ae A	299	LEXT(hid0get64)
	300
	301	mfspr r4,hid0 ; Get the HID0
	302	srdi r3,r4,32 ; Move top down
	303	rlwinm r4,r4,0,0,31 ; Clean top
	304	blr
e5568f75 A	305
	306	.globl EXT(hid5set64)
	307	LEXT(hid5set64)
	308
	309	rlwinm r3,r3,0,1,0 ; Copy low 32 int high 32
	310	rlwimi r3,r4,0,0,31 ; Inser the low part behind top
	311	mtspr hid5,r3 ; Set it
	312	isync ; Wait for it
	313	blr