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1 /*
2 * Copyright (c) 2000-2020 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
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25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 /*
29 * @OSF_COPYRIGHT@
30 *
31 */
32
33 #ifndef I386_CPU_DATA
34 #define I386_CPU_DATA
35
36 #include <mach_assert.h>
37 #include <machine/atomic.h>
38
39 #include <kern/assert.h>
40 #include <kern/kern_types.h>
41 #include <kern/mpqueue.h>
42 #include <kern/queue.h>
43 #include <kern/processor.h>
44 #include <kern/pms.h>
45 #include <pexpert/pexpert.h>
46 #include <mach/i386/thread_status.h>
47 #include <mach/i386/vm_param.h>
48 #include <i386/locks.h>
49 #include <i386/rtclock_protos.h>
50 #include <i386/pmCPU.h>
51 #include <i386/cpu_topology.h>
52 #include <i386/seg.h>
53 #include <i386/mp.h>
54
55 #if CONFIG_VMX
56 #include <i386/vmx/vmx_cpu.h>
57 #endif
58
59 #if MONOTONIC
60 #include <machine/monotonic.h>
61 #endif /* MONOTONIC */
62
63 #include <machine/pal_routines.h>
64
65 /*
66 * Data structures referenced (anonymously) from per-cpu data:
67 */
68 struct cpu_cons_buffer;
69 struct cpu_desc_table;
70 struct mca_state;
71 struct prngContext;
72
73 /*
74 * Data structures embedded in per-cpu data:
75 */
76 typedef struct rtclock_timer {
77 mpqueue_head_t queue;
78 uint64_t deadline;
79 uint64_t when_set;
80 boolean_t has_expired;
81 } rtclock_timer_t;
82
83 typedef struct {
84 /* The 'u' suffixed fields store the double-mapped descriptor addresses */
85 struct x86_64_tss *cdi_ktssu;
86 struct x86_64_tss *cdi_ktssb;
87 x86_64_desc_register_t cdi_gdtu;
88 x86_64_desc_register_t cdi_gdtb;
89 x86_64_desc_register_t cdi_idtu;
90 x86_64_desc_register_t cdi_idtb;
91 struct real_descriptor *cdi_ldtu;
92 struct real_descriptor *cdi_ldtb;
93 vm_offset_t cdi_sstku;
94 vm_offset_t cdi_sstkb;
95 } cpu_desc_index_t;
96
97 typedef enum {
98 TASK_MAP_32BIT, /* 32-bit user, compatibility mode */
99 TASK_MAP_64BIT, /* 64-bit user thread, shared space */
100 } task_map_t;
101
102
103 /*
104 * This structure is used on entry into the (uber-)kernel on syscall from
105 * a 64-bit user. It contains the address of the machine state save area
106 * for the current thread and a temporary place to save the user's rsp
107 * before loading this address into rsp.
108 */
109 typedef struct {
110 addr64_t cu_isf; /* thread->pcb->iss.isf */
111 uint64_t cu_tmp; /* temporary scratch */
112 addr64_t cu_user_gs_base;
113 } cpu_uber_t;
114
115 typedef uint16_t pcid_t;
116 typedef uint8_t pcid_ref_t;
117
118 #define CPU_RTIME_BINS (12)
119 #define CPU_ITIME_BINS (CPU_RTIME_BINS)
120
121 #define MAX_TRACE_BTFRAMES (16)
122 typedef struct {
123 boolean_t pltype;
124 int plevel;
125 uint64_t plbt[MAX_TRACE_BTFRAMES];
126 } plrecord_t;
127
128 #if DEVELOPMENT || DEBUG
129 typedef enum {
130 IOTRACE_PHYS_READ = 1,
131 IOTRACE_PHYS_WRITE,
132 IOTRACE_IO_READ,
133 IOTRACE_IO_WRITE,
134 IOTRACE_PORTIO_READ,
135 IOTRACE_PORTIO_WRITE
136 } iotrace_type_e;
137
138 typedef struct {
139 iotrace_type_e iotype;
140 int size;
141 uint64_t vaddr;
142 uint64_t paddr;
143 uint64_t val;
144 uint64_t start_time_abs;
145 uint64_t duration;
146 uint64_t backtrace[MAX_TRACE_BTFRAMES];
147 } iotrace_entry_t;
148
149 typedef struct {
150 int vector; /* Vector number of interrupt */
151 thread_t curthread; /* Current thread at the time of the interrupt */
152 uint64_t interrupted_pc;
153 int curpl; /* Current preemption level */
154 int curil; /* Current interrupt level */
155 uint64_t start_time_abs;
156 uint64_t duration;
157 uint64_t backtrace[MAX_TRACE_BTFRAMES];
158 } traptrace_entry_t;
159
160 #define DEFAULT_IOTRACE_ENTRIES_PER_CPU (64)
161 #define IOTRACE_MAX_ENTRIES_PER_CPU (256)
162 extern volatile int mmiotrace_enabled;
163 extern int iotrace_generators;
164 extern int iotrace_entries_per_cpu;
165 extern int *iotrace_next;
166 extern iotrace_entry_t **iotrace_ring;
167
168 #define TRAPTRACE_INVALID_INDEX (~0U)
169 #define DEFAULT_TRAPTRACE_ENTRIES_PER_CPU (16)
170 #define TRAPTRACE_MAX_ENTRIES_PER_CPU (256)
171 extern volatile int traptrace_enabled;
172 extern int traptrace_generators;
173 extern int traptrace_entries_per_cpu;
174 extern int *traptrace_next;
175 extern traptrace_entry_t **traptrace_ring;
176 #endif /* DEVELOPMENT || DEBUG */
177
178 /*
179 * Per-cpu data.
180 *
181 * Each processor has a per-cpu data area which is dereferenced through the
182 * current_cpu_datap() macro. For speed, the %gs segment is based here, and
183 * using this, inlines provides single-instruction access to frequently used
184 * members - such as get_cpu_number()/cpu_number(), and get_active_thread()/
185 * current_thread().
186 *
187 * Cpu data owned by another processor can be accessed using the
188 * cpu_datap(cpu_number) macro which uses the cpu_data_ptr[] array of per-cpu
189 * pointers.
190 */
191 typedef struct {
192 pcid_t cpu_pcid_free_hint;
193 #define PMAP_PCID_MAX_PCID (0x800)
194 pcid_ref_t cpu_pcid_refcounts[PMAP_PCID_MAX_PCID];
195 pmap_t cpu_pcid_last_pmap_dispatched[PMAP_PCID_MAX_PCID];
196 } pcid_cdata_t;
197
198 typedef struct cpu_data {
199 struct pal_cpu_data cpu_pal_data; /* PAL-specific data */
200 #define cpu_pd cpu_pal_data /* convenience alias */
201 struct cpu_data *cpu_this; /* pointer to myself */
202 vm_offset_t cpu_pcpu_base;
203 thread_t cpu_active_thread;
204 thread_t cpu_nthread;
205 int cpu_number; /* Logical CPU */
206 void *cpu_int_state; /* interrupt state */
207 vm_offset_t cpu_active_stack; /* kernel stack base */
208 vm_offset_t cpu_kernel_stack; /* kernel stack top */
209 vm_offset_t cpu_int_stack_top;
210 volatile int cpu_signals; /* IPI events */
211 volatile int cpu_prior_signals; /* Last set of events,
212 * debugging
213 */
214 ast_t cpu_pending_ast;
215 /*
216 * Note if rearranging fields:
217 * We want cpu_preemption_level on a different
218 * cache line than cpu_active_thread
219 * for optimizing mtx_spin phase.
220 */
221 int cpu_interrupt_level;
222 volatile int cpu_preemption_level;
223 volatile int cpu_running;
224 #if !MONOTONIC
225 boolean_t cpu_fixed_pmcs_enabled;
226 #endif /* !MONOTONIC */
227 rtclock_timer_t rtclock_timer;
228 volatile addr64_t cpu_active_cr3 __attribute((aligned(64)));
229 union {
230 volatile uint32_t cpu_tlb_invalid;
231 struct {
232 volatile uint16_t cpu_tlb_invalid_local;
233 volatile uint16_t cpu_tlb_invalid_global;
234 };
235 };
236 uint64_t cpu_ip_desc[2];
237 volatile task_map_t cpu_task_map;
238 volatile addr64_t cpu_task_cr3;
239 addr64_t cpu_kernel_cr3;
240 volatile addr64_t cpu_ucr3;
241 volatile addr64_t cpu_shadowtask_cr3;
242 boolean_t cpu_pagezero_mapped;
243 cpu_uber_t cpu_uber;
244 /* Double-mapped per-CPU exception stack address */
245 uintptr_t cd_estack;
246 int cpu_xstate;
247 int cpu_curtask_has_ldt;
248 int cpu_curthread_do_segchk;
249 /* Address of shadowed, partially mirrored CPU data structures located
250 * in the double mapped PML4
251 */
252 void *cd_shadow;
253 union {
254 volatile uint32_t cpu_tlb_invalid_count;
255 struct {
256 volatile uint16_t cpu_tlb_invalid_local_count;
257 volatile uint16_t cpu_tlb_invalid_global_count;
258 };
259 };
260
261 uint16_t cpu_tlb_gen_counts_local[MAX_CPUS];
262 uint16_t cpu_tlb_gen_counts_global[MAX_CPUS];
263
264 struct processor *cpu_processor;
265 struct real_descriptor *cpu_ldtp;
266 struct cpu_desc_table *cpu_desc_tablep;
267 cpu_desc_index_t cpu_desc_index;
268 int cpu_ldt;
269
270 #define HWINTCNT_SIZE 256
271 uint32_t cpu_hwIntCnt[HWINTCNT_SIZE]; /* Interrupt counts */
272 uint64_t cpu_hwIntpexits[HWINTCNT_SIZE];
273 uint64_t cpu_dr7; /* debug control register */
274 uint64_t cpu_int_event_time; /* intr entry/exit time */
275 pal_rtc_nanotime_t *cpu_nanotime; /* Nanotime info */
276 #if KPC
277 /* double-buffered performance counter data */
278 uint64_t *cpu_kpc_buf[2];
279 /* PMC shadow and reload value buffers */
280 uint64_t *cpu_kpc_shadow;
281 uint64_t *cpu_kpc_reload;
282 #endif
283 #if MONOTONIC
284 struct mt_cpu cpu_monotonic;
285 #endif /* MONOTONIC */
286 uint32_t cpu_pmap_pcid_enabled;
287 pcid_t cpu_active_pcid;
288 pcid_t cpu_last_pcid;
289 pcid_t cpu_kernel_pcid;
290 volatile pcid_ref_t *cpu_pmap_pcid_coherentp;
291 volatile pcid_ref_t *cpu_pmap_pcid_coherentp_kernel;
292 pcid_cdata_t *cpu_pcid_data;
293 #ifdef PCID_STATS
294 uint64_t cpu_pmap_pcid_flushes;
295 uint64_t cpu_pmap_pcid_preserves;
296 #endif
297 uint64_t cpu_aperf;
298 uint64_t cpu_mperf;
299 uint64_t cpu_c3res;
300 uint64_t cpu_c6res;
301 uint64_t cpu_c7res;
302 uint64_t cpu_itime_total;
303 uint64_t cpu_rtime_total;
304 uint64_t cpu_ixtime;
305 uint64_t cpu_idle_exits;
306 /*
307 * Note that the cacheline-copy mechanism uses the cpu_rtimes field in the shadow CPU
308 * structures to temporarily stash the code cacheline that includes the instruction
309 * pointer at the time of the fault (this field is otherwise unused in the shadow
310 * CPU structures).
311 */
312 uint64_t cpu_rtimes[CPU_RTIME_BINS];
313 uint64_t cpu_itimes[CPU_ITIME_BINS];
314 #if !MONOTONIC
315 uint64_t cpu_cur_insns;
316 uint64_t cpu_cur_ucc;
317 uint64_t cpu_cur_urc;
318 #endif /* !MONOTONIC */
319 uint64_t cpu_gpmcs[4];
320 uint64_t cpu_max_observed_int_latency;
321 int cpu_max_observed_int_latency_vector;
322 volatile boolean_t cpu_NMI_acknowledged;
323 uint64_t debugger_entry_time;
324 uint64_t debugger_ipi_time;
325 /* A separate nested interrupt stack flag, to account
326 * for non-nested interrupts arriving while on the interrupt stack
327 * Currently only occurs when AICPM enables interrupts on the
328 * interrupt stack during processor offlining.
329 */
330 uint32_t cpu_nested_istack;
331 uint32_t cpu_nested_istack_events;
332 x86_saved_state64_t *cpu_fatal_trap_state;
333 x86_saved_state64_t *cpu_post_fatal_trap_state;
334 #if CONFIG_VMX
335 vmx_cpu_t cpu_vmx; /* wonderful world of virtualization */
336 #endif
337 #if CONFIG_MCA
338 struct mca_state *cpu_mca_state; /* State at MC fault */
339 #endif
340 int cpu_type;
341 int cpu_subtype;
342 int cpu_threadtype;
343 boolean_t cpu_iflag;
344 boolean_t cpu_boot_complete;
345 int cpu_hibernate;
346 #define MAX_PREEMPTION_RECORDS (8)
347 #if DEVELOPMENT || DEBUG
348 int cpu_plri;
349 plrecord_t plrecords[MAX_PREEMPTION_RECORDS];
350 #endif
351 void *cpu_console_buf;
352 struct x86_lcpu lcpu;
353 int cpu_phys_number; /* Physical CPU */
354 cpu_id_t cpu_id; /* Platform Expert */
355 #if DEBUG
356 uint64_t cpu_entry_cr3;
357 uint64_t cpu_exit_cr3;
358 uint64_t cpu_pcid_last_cr3;
359 #endif
360 boolean_t cpu_rendezvous_in_progress;
361 #if CST_DEMOTION_DEBUG
362 /* Count of thread wakeups issued by this processor */
363 uint64_t cpu_wakeups_issued_total;
364 #endif
365 #if DEBUG || DEVELOPMENT
366 uint64_t tsc_sync_delta;
367 #endif
368 } cpu_data_t;
369
370 extern cpu_data_t *cpu_data_ptr[];
371
372 /*
373 * __SEG_GS marks %gs-relative operations:
374 * https://clang.llvm.org/docs/LanguageExtensions.html#memory-references-to-specified-segments
375 * https://gcc.gnu.org/onlinedocs/gcc/Named-Address-Spaces.html#x86-Named-Address-Spaces
376 */
377 #if defined(__SEG_GS)
378 // __seg_gs exists
379 #elif defined(__clang__)
380 #define __seg_gs __attribute__((address_space(256)))
381 #else
382 #error use a compiler that supports address spaces or __seg_gs
383 #endif
384
385 #define CPU_DATA() ((cpu_data_t __seg_gs *)0UL)
386
387 /*
388 * Everyone within the osfmk part of the kernel can use the fast
389 * inline versions of these routines. Everyone outside, must call
390 * the real thing,
391 */
392
393
394 /*
395 * The "volatile" flavor of current_thread() is intended for use by
396 * scheduler code which may need to update the thread pointer in the
397 * course of a context switch. Any call to current_thread() made
398 * prior to the thread pointer update should be safe to optimize away
399 * as it should be consistent with that thread's state to the extent
400 * the compiler can reason about it. Likewise, the context switch
401 * path will eventually result in an arbitrary branch to the new
402 * thread's pc, about which the compiler won't be able to reason.
403 * Thus any compile-time optimization of current_thread() calls made
404 * within the new thread should be safely encapsulated in its
405 * register/stack state. The volatile form therefore exists to cover
406 * the window between the thread pointer update and the branch to
407 * the new pc.
408 */
409 static inline thread_t
410 get_active_thread_volatile(void)
411 {
412 return CPU_DATA()->cpu_active_thread;
413 }
414
415 static inline __attribute__((const)) thread_t
416 get_active_thread(void)
417 {
418 return CPU_DATA()->cpu_active_thread;
419 }
420
421 #define current_thread_fast() get_active_thread()
422 #define current_thread_volatile() get_active_thread_volatile()
423 #define current_thread() current_thread_fast()
424
425 #define cpu_mode_is64bit() TRUE
426
427 static inline int
428 get_preemption_level(void)
429 {
430 return CPU_DATA()->cpu_preemption_level;
431 }
432 static inline int
433 get_interrupt_level(void)
434 {
435 return CPU_DATA()->cpu_interrupt_level;
436 }
437 static inline int
438 get_cpu_number(void)
439 {
440 return CPU_DATA()->cpu_number;
441 }
442 static inline vm_offset_t
443 get_current_percpu_base(void)
444 {
445 return CPU_DATA()->cpu_pcpu_base;
446 }
447 static inline int
448 get_cpu_phys_number(void)
449 {
450 return CPU_DATA()->cpu_phys_number;
451 }
452
453 static inline cpu_data_t *
454 current_cpu_datap(void)
455 {
456 return CPU_DATA()->cpu_this;
457 }
458
459 /*
460 * Facility to diagnose preemption-level imbalances, which are otherwise
461 * challenging to debug. On each operation that enables or disables preemption,
462 * we record a backtrace into a per-CPU ring buffer, along with the current
463 * preemption level and operation type. Thus, if an imbalance is observed,
464 * one can examine these per-CPU records to determine which codepath failed
465 * to re-enable preemption, enabled premption without a corresponding
466 * disablement etc. The backtracer determines which stack is currently active,
467 * and uses that to perform bounds checks on unterminated stacks.
468 * To enable, sysctl -w machdep.pltrace=1 on DEVELOPMENT or DEBUG kernels (DRK '15)
469 * The bounds check currently doesn't account for non-default thread stack sizes.
470 */
471 #if DEVELOPMENT || DEBUG
472 static inline void
473 rbtrace_bt(uint64_t *rets, int maxframes, cpu_data_t *cdata, uint64_t frameptr, bool use_cursp)
474 {
475 extern uint32_t low_intstack[]; /* bottom */
476 extern uint32_t low_eintstack[]; /* top */
477 extern char mp_slave_stack[];
478 int btidx = 0;
479
480 uint64_t kstackb, kstackt;
481
482 /* Obtain the 'current' program counter, initial backtrace
483 * element. This will also indicate if we were unable to
484 * trace further up the stack for some reason
485 */
486 if (use_cursp) {
487 __asm__ volatile ("leaq 1f(%%rip), %%rax; mov %%rax, %0\n1:"
488 : "=m" (rets[btidx++])
489 :
490 : "rax");
491 }
492
493 thread_t cplthread = cdata->cpu_active_thread;
494 if (cplthread) {
495 uintptr_t csp;
496 if (use_cursp == true) {
497 __asm__ __volatile__ ("movq %%rsp, %0": "=r" (csp):);
498 } else {
499 csp = frameptr;
500 }
501 /* Determine which stack we're on to populate stack bounds.
502 * We don't need to trace across stack boundaries for this
503 * routine.
504 */
505 kstackb = cdata->cpu_active_stack;
506 kstackt = kstackb + KERNEL_STACK_SIZE;
507 if (csp < kstackb || csp > kstackt) {
508 kstackt = cdata->cpu_kernel_stack;
509 kstackb = kstackt - KERNEL_STACK_SIZE;
510 if (csp < kstackb || csp > kstackt) {
511 kstackt = cdata->cpu_int_stack_top;
512 kstackb = kstackt - INTSTACK_SIZE;
513 if (csp < kstackb || csp > kstackt) {
514 kstackt = (uintptr_t)low_eintstack;
515 kstackb = kstackt - INTSTACK_SIZE;
516 if (csp < kstackb || csp > kstackt) {
517 kstackb = (uintptr_t) mp_slave_stack;
518 kstackt = kstackb + PAGE_SIZE;
519 } else {
520 kstackb = 0;
521 kstackt = 0;
522 }
523 }
524 }
525 }
526
527 if (__probable(kstackb && kstackt)) {
528 uint64_t *cfp = (uint64_t *) frameptr;
529 int rbbtf;
530
531 for (rbbtf = btidx; rbbtf < maxframes; rbbtf++) {
532 if (((uint64_t)cfp == 0) || (((uint64_t)cfp < kstackb) || ((uint64_t)cfp > kstackt))) {
533 rets[rbbtf] = 0;
534 continue;
535 }
536 rets[rbbtf] = *(cfp + 1);
537 cfp = (uint64_t *) (*cfp);
538 }
539 }
540 }
541 }
542
543 __attribute__((noinline))
544 static inline void
545 pltrace_internal(boolean_t enable)
546 {
547 cpu_data_t *cdata = current_cpu_datap();
548 int cpli = cdata->cpu_preemption_level;
549 int cplrecord = cdata->cpu_plri;
550 uint64_t *plbts;
551
552 assert(cpli >= 0);
553
554 cdata->plrecords[cplrecord].pltype = enable;
555 cdata->plrecords[cplrecord].plevel = cpli;
556
557 plbts = &cdata->plrecords[cplrecord].plbt[0];
558
559 cplrecord++;
560
561 if (cplrecord >= MAX_PREEMPTION_RECORDS) {
562 cplrecord = 0;
563 }
564
565 cdata->cpu_plri = cplrecord;
566
567 rbtrace_bt(plbts, MAX_TRACE_BTFRAMES - 1, cdata, (uint64_t)__builtin_frame_address(0), false);
568 }
569
570 extern int plctrace_enabled;
571
572 static inline void
573 iotrace(iotrace_type_e type, uint64_t vaddr, uint64_t paddr, int size, uint64_t val,
574 uint64_t sabs, uint64_t duration)
575 {
576 cpu_data_t *cdata;
577 int cpu_num, nextidx;
578 iotrace_entry_t *cur_iotrace_ring;
579
580 if (__improbable(mmiotrace_enabled == 0 || iotrace_generators == 0)) {
581 return;
582 }
583
584 cdata = current_cpu_datap();
585 cpu_num = cdata->cpu_number;
586 nextidx = iotrace_next[cpu_num];
587 cur_iotrace_ring = iotrace_ring[cpu_num];
588
589 cur_iotrace_ring[nextidx].iotype = type;
590 cur_iotrace_ring[nextidx].vaddr = vaddr;
591 cur_iotrace_ring[nextidx].paddr = paddr;
592 cur_iotrace_ring[nextidx].size = size;
593 cur_iotrace_ring[nextidx].val = val;
594 cur_iotrace_ring[nextidx].start_time_abs = sabs;
595 cur_iotrace_ring[nextidx].duration = duration;
596
597 iotrace_next[cpu_num] = ((nextidx + 1) >= iotrace_entries_per_cpu) ? 0 : (nextidx + 1);
598
599 rbtrace_bt(&cur_iotrace_ring[nextidx].backtrace[0],
600 MAX_TRACE_BTFRAMES - 1, cdata, (uint64_t)__builtin_frame_address(0), true);
601 }
602
603 static inline uint32_t
604 traptrace_start(int vecnum, uint64_t ipc, uint64_t sabs, uint64_t frameptr)
605 {
606 cpu_data_t *cdata;
607 unsigned int cpu_num, nextidx;
608 traptrace_entry_t *cur_traptrace_ring;
609
610 if (__improbable(traptrace_enabled == 0 || traptrace_generators == 0)) {
611 return TRAPTRACE_INVALID_INDEX;
612 }
613
614 assert(ml_get_interrupts_enabled() == FALSE);
615 cdata = current_cpu_datap();
616 cpu_num = (unsigned int)cdata->cpu_number;
617 nextidx = (unsigned int)traptrace_next[cpu_num];
618 /* prevent nested interrupts from clobbering this record */
619 traptrace_next[cpu_num] = (int)(((nextidx + 1) >= (unsigned int)traptrace_entries_per_cpu) ? 0 : (nextidx + 1));
620
621 cur_traptrace_ring = traptrace_ring[cpu_num];
622
623 cur_traptrace_ring[nextidx].vector = vecnum;
624 cur_traptrace_ring[nextidx].curthread = current_thread();
625 cur_traptrace_ring[nextidx].interrupted_pc = ipc;
626 cur_traptrace_ring[nextidx].curpl = cdata->cpu_preemption_level;
627 cur_traptrace_ring[nextidx].curil = cdata->cpu_interrupt_level;
628 cur_traptrace_ring[nextidx].start_time_abs = sabs;
629 cur_traptrace_ring[nextidx].duration = ~0ULL;
630
631 rbtrace_bt(&cur_traptrace_ring[nextidx].backtrace[0],
632 MAX_TRACE_BTFRAMES - 1, cdata, frameptr, false);
633
634 assert(nextidx <= 0xFFFF);
635
636 return (uint32_t)((cpu_num << 16) | nextidx);
637 }
638
639 static inline void
640 traptrace_end(uint32_t index, uint64_t eabs)
641 {
642 if (index != TRAPTRACE_INVALID_INDEX) {
643 traptrace_entry_t *ttentp = &traptrace_ring[index >> 16][index & 0xFFFF];
644
645 ttentp->duration = eabs - ttentp->start_time_abs;
646 }
647 }
648
649 #endif /* DEVELOPMENT || DEBUG */
650
651 __header_always_inline void
652 pltrace(boolean_t plenable)
653 {
654 #if DEVELOPMENT || DEBUG
655 if (__improbable(plctrace_enabled != 0)) {
656 pltrace_internal(plenable);
657 }
658 #else
659 (void)plenable;
660 #endif
661 }
662
663 static inline void
664 disable_preemption_internal(void)
665 {
666 assert(get_preemption_level() >= 0);
667
668 os_compiler_barrier();
669 CPU_DATA()->cpu_preemption_level++;
670 os_compiler_barrier();
671 pltrace(FALSE);
672 }
673
674 static inline void
675 enable_preemption_internal(void)
676 {
677 assert(get_preemption_level() > 0);
678 pltrace(TRUE);
679 os_compiler_barrier();
680 if (0 == --CPU_DATA()->cpu_preemption_level) {
681 kernel_preempt_check();
682 }
683 os_compiler_barrier();
684 }
685
686 static inline void
687 enable_preemption_no_check(void)
688 {
689 assert(get_preemption_level() > 0);
690
691 pltrace(TRUE);
692 os_compiler_barrier();
693 CPU_DATA()->cpu_preemption_level--;
694 os_compiler_barrier();
695 }
696
697 static inline void
698 _enable_preemption_no_check(void)
699 {
700 enable_preemption_no_check();
701 }
702
703 static inline void
704 mp_disable_preemption(void)
705 {
706 disable_preemption_internal();
707 }
708
709 static inline void
710 _mp_disable_preemption(void)
711 {
712 disable_preemption_internal();
713 }
714
715 static inline void
716 mp_enable_preemption(void)
717 {
718 enable_preemption_internal();
719 }
720
721 static inline void
722 _mp_enable_preemption(void)
723 {
724 enable_preemption_internal();
725 }
726
727 static inline void
728 mp_enable_preemption_no_check(void)
729 {
730 enable_preemption_no_check();
731 }
732
733 static inline void
734 _mp_enable_preemption_no_check(void)
735 {
736 enable_preemption_no_check();
737 }
738
739 #ifdef XNU_KERNEL_PRIVATE
740 #define disable_preemption() disable_preemption_internal()
741 #define enable_preemption() enable_preemption_internal()
742 #define MACHINE_PREEMPTION_MACROS (1)
743 #endif
744
745 static inline cpu_data_t *
746 cpu_datap(int cpu)
747 {
748 return cpu_data_ptr[cpu];
749 }
750
751 static inline int
752 cpu_is_running(int cpu)
753 {
754 return (cpu_datap(cpu) != NULL) && (cpu_datap(cpu)->cpu_running);
755 }
756
757 #ifdef MACH_KERNEL_PRIVATE
758 static inline cpu_data_t *
759 cpu_shadowp(int cpu)
760 {
761 return cpu_data_ptr[cpu]->cd_shadow;
762 }
763
764 #endif
765 extern cpu_data_t *cpu_data_alloc(boolean_t is_boot_cpu);
766 extern void cpu_data_realloc(void);
767
768 #endif /* I386_CPU_DATA */