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28 #ifndef ARM64_MONOTONIC_H
29 #define ARM64_MONOTONIC_H
31 #include <sys/cdefs.h>
35 #include <pexpert/arm64/board_config.h>
41 #if MONOTONIC && !CPMU_AIC_PMI
42 #define MONOTONIC_FIQ 1
43 #endif /* MONOTONIC && !CPMU_AIC_PMI */
49 #else /* HAS_UNCORE_CTRS */
51 #endif /* !HAS_UNCORE_CTRS */
53 #define MT_CORE_CYCLES 0
54 #define MT_CORE_INSTRS 1
55 #define MT_CORE_NFIXED 2
56 #define MT_CORE_MAXVAL ((UINT64_C(1) << 48) - 1)
60 #endif /* KERNEL_PRIVATE */
62 #if MACH_KERNEL_PRIVATE
68 /* set by hardware if a PMI was delivered */
69 #define PMCR0_PMAI (UINT64_C(1) << 11)
70 #define PMCR0_PMI(REG) ((REG) & PMCR0_PMAI)
74 #define UPMSR_PMI(REG) ((REG) & 0x1)
76 #endif /* HAS_UNCORE_CTRS */
79 mt_pmi_pending(uint64_t * restrict pmcr0_out
,
80 uint64_t * restrict upmsr_out
)
82 uint64_t pmcr0
= __builtin_arm_rsr64("PMCR0_EL1");
83 bool pmi
= PMCR0_PMI(pmcr0
);
86 * Acknowledge the PMI by clearing the pmai bit.
88 __builtin_arm_wsr64("PMCR0_EL1", pmcr0
& ~PMCR0_PMAI
);
93 extern bool mt_uncore_enabled
;
94 if (mt_uncore_enabled
) {
95 uint64_t upmsr
= __builtin_arm_rsr64("UPMSR_EL1");
96 if (UPMSR_PMI(upmsr
)) {
101 #else /* HAS_UNCORE_CTRS */
102 #pragma unused(upmsr_out)
103 #endif /* !HAS_UNCORE_CTRS */
108 void mt_fiq(void *cpu
, uint64_t pmcr0
, uint64_t upmsr
);
111 void mt_cpmu_aic_pmi(void *source
);
112 #endif /* CPMU_AIC_PMI */
116 #endif /* MACH_KERNEL_PRIVATE */
118 #endif /* MONOTONIC */
120 #endif /* !defined(ARM64_MONOTONIC_H) */