osfmk/ppc/chud/chud_spr.h

   1 /*
   2  * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. Please obtain a copy of the License at
  10  * http://www.opensource.apple.com/apsl/ and read it before using this
  11  * file.
  12  *
  13  * The Original Code and all software distributed under the License are
  14  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  15  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  16  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  18  * Please see the License for the specific language governing rights and
  19  * limitations under the License.
  20  *
  21  * @APPLE_LICENSE_HEADER_END@
  22  */
  23
  24 #ifndef _CHUD_SPR_H_
  25 #define _CHUD_SPR_H_
  26
  27 /* PPC SPRs - 32-bit and 64-bit implementations */
  28 #define chud_ppc_srr0           26
  29 #define chud_ppc_srr1           27
  30 #define chud_ppc_dsisr          18
  31 #define chud_ppc_dar            19
  32 #define chud_ppc_dec            22
  33 #define chud_ppc_sdr1           25
  34 #define chud_ppc_sprg0          272
  35 #define chud_ppc_sprg1          273
  36 #define chud_ppc_sprg2          274
  37 #define chud_ppc_sprg3          275
  38 #define chud_ppc_ear            282
  39 #define chud_ppc_tbl            284
  40 #define chud_ppc_tbu            285
  41 #define chud_ppc_pvr            287
  42 #define chud_ppc_ibat0u         528
  43 #define chud_ppc_ibat0l         529
  44 #define chud_ppc_ibat1u         530
  45 #define chud_ppc_ibat1l         531
  46 #define chud_ppc_ibat2u         532
  47 #define chud_ppc_ibat2l         533
  48 #define chud_ppc_ibat3u         534
  49 #define chud_ppc_ibat3l         535
  50 #define chud_ppc_dbat0u         536
  51 #define chud_ppc_dbat0l         537
  52 #define chud_ppc_dbat1u         538
  53 #define chud_ppc_dbat1l         539
  54 #define chud_ppc_dbat2u         540
  55 #define chud_ppc_dbat2l         541
  56 #define chud_ppc_dbat3u         542
  57 #define chud_ppc_dbat3l         543
  58 #define chud_ppc_dabr           1013
  59 #define chud_ppc_msr            10000   /* FAKE */
  60
  61 /* PPC SPRs - 32-bit implementations */
  62 #define chud_ppc32_sr0          20000   /* FAKE */
  63 #define chud_ppc32_sr1          20001   /* FAKE */
  64 #define chud_ppc32_sr2          20002   /* FAKE */
  65 #define chud_ppc32_sr3          20003   /* FAKE */
  66 #define chud_ppc32_sr4          20004   /* FAKE */
  67 #define chud_ppc32_sr5          20005   /* FAKE */
  68 #define chud_ppc32_sr6          20006   /* FAKE */
  69 #define chud_ppc32_sr7          20007   /* FAKE */
  70 #define chud_ppc32_sr8          20008   /* FAKE */
  71 #define chud_ppc32_sr9          20009   /* FAKE */
  72 #define chud_ppc32_sr10         20010   /* FAKE */
  73 #define chud_ppc32_sr11         20011   /* FAKE */
  74 #define chud_ppc32_sr12         20012   /* FAKE */
  75 #define chud_ppc32_sr13         20013   /* FAKE */
  76 #define chud_ppc32_sr14         20014   /* FAKE */
  77 #define chud_ppc32_sr15         20015   /* FAKE */
  78
  79 /* PPC SPRs - 64-bit implementations */
  80 #define chud_ppc64_asr          280
  81
  82 /* PPC SPRs - 750/750CX/750CXe/750FX Specific */
  83 #define chud_750_upmc1          937
  84 #define chud_750_upmc2          938
  85 #define chud_750_upmc3          941
  86 #define chud_750_upmc4          942
  87 #define chud_750_mmcr0          952
  88 #define chud_750_pmc1           953
  89 #define chud_750_pmc2           954
  90 #define chud_750_sia            955
  91 #define chud_750_mmcr1          956
  92 #define chud_750_pmc3           957
  93 #define chud_750_pmc4           958
  94 #define chud_750_hid0           1008
  95 #define chud_750_hid1           1009
  96 #define chud_750_iabr           1010
  97 #define chud_750_l2cr           1017
  98 #define chud_750_ictc           1019
  99 #define chud_750_thrm1          1020
 100 #define chud_750_thrm2          1021
 101 #define chud_750_thrm3          1022
 102 #define chud_750fx_ibat4u       560 /* 750FX only */
 103 #define chud_750fx_ibat4l       561 /* 750FX only */
 104 #define chud_750fx_ibat5u       562 /* 750FX only */
 105 #define chud_750fx_ibat5l       563 /* 750FX only */
 106 #define chud_750fx_ibat6u       564 /* 750FX only */
 107 #define chud_750fx_ibat6l       565 /* 750FX only */
 108 #define chud_750fx_ibat7u       566 /* 750FX only */
 109 #define chud_750fx_ibat7l       567 /* 750FX only */
 110 #define chud_750fx_dbat4u       568 /* 750FX only */
 111 #define chud_750fx_dbat4l       569 /* 750FX only */
 112 #define chud_750fx_dbat5u       570 /* 750FX only */
 113 #define chud_750fx_dbat5l       571 /* 750FX only */
 114 #define chud_750fx_dbat6u       572 /* 750FX only */
 115 #define chud_750fx_dbat6l       573 /* 750FX only */
 116 #define chud_750fx_dbat7u       574 /* 750FX only */
 117 #define chud_750fx_dbat7l       575 /* 750FX only */
 118 #define chud_750fx_hid2         1016  /* 750FX only */
 119
 120 /* PPC SPRs - 7400/7410 Specific */
 121 #define chud_7400_upmc1         937
 122 #define chud_7400_upmc2         938
 123 #define chud_7400_upmc3         941
 124 #define chud_7400_upmc4         942
 125 #define chud_7400_mmcr2         944
 126 #define chud_7400_bamr          951
 127 #define chud_7400_mmcr0         952
 128 #define chud_7400_pmc1          953
 129 #define chud_7400_pmc2          954
 130 #define chud_7400_siar          955
 131 #define chud_7400_mmcr1         956
 132 #define chud_7400_pmc3          957
 133 #define chud_7400_pmc4          958
 134 #define chud_7400_sda           959
 135 #define chud_7400_hid0          1008
 136 #define chud_7400_hid1          1009
 137 #define chud_7400_iabr          1010
 138 #define chud_7400_msscr0        1014
 139 #define chud_7410_l2pmcr        1016 /* 7410 only */
 140 #define chud_7400_l2cr          1017
 141 #define chud_7400_ictc          1019
 142 #define chud_7400_thrm1         1020
 143 #define chud_7400_thrm2         1021
 144 #define chud_7400_thrm3         1022
 145 #define chud_7400_pir           1023
 146
 147 /* PPC SPRs - 7450/7455 Specific */
 148 #define chud_7455_sprg4         276 /* 7455 only */
 149 #define chud_7455_sprg5         277 /* 7455 only */
 150 #define chud_7455_sprg6         278 /* 7455 only */
 151 #define chud_7455_sprg7         279 /* 7455 only */
 152 #define chud_7455_ibat4u        560 /* 7455 only */
 153 #define chud_7455_ibat4l        561 /* 7455 only */
 154 #define chud_7455_ibat5u        562 /* 7455 only */
 155 #define chud_7455_ibat5l        563 /* 7455 only */
 156 #define chud_7455_ibat6u        564 /* 7455 only */
 157 #define chud_7455_ibat6l        565 /* 7455 only */
 158 #define chud_7455_ibat7u        566 /* 7455 only */
 159 #define chud_7455_ibat7l        567 /* 7455 only */
 160 #define chud_7455_dbat4u        568 /* 7455 only */
 161 #define chud_7455_dbat4l        569 /* 7455 only */
 162 #define chud_7455_dbat5u        570 /* 7455 only */
 163 #define chud_7455_dbat5l        571 /* 7455 only */
 164 #define chud_7455_dbat6u        572 /* 7455 only */
 165 #define chud_7455_dbat6l        573 /* 7455 only */
 166 #define chud_7455_dbat7u        574 /* 7455 only */
 167 #define chud_7455_dbat7l        575 /* 7455 only */
 168 #define chud_7450_upmc5         929
 169 #define chud_7450_upmc6         930
 170 #define chud_7450_upmc1         937
 171 #define chud_7450_upmc2         938
 172 #define chud_7450_upmc3         941
 173 #define chud_7450_upmc4         942
 174 #define chud_7450_mmcr2         944
 175 #define chud_7450_pmc5          945
 176 #define chud_7450_pmc6          946
 177 #define chud_7450_bamr          951
 178 #define chud_7450_mmcr0         952
 179 #define chud_7450_pmc1          953
 180 #define chud_7450_pmc2          954
 181 #define chud_7450_siar          955
 182 #define chud_7450_mmcr1         956
 183 #define chud_7450_pmc3          957
 184 #define chud_7450_pmc4          958
 185 #define chud_7450_tlbmiss       980
 186 #define chud_7450_ptehi         981
 187 #define chud_7450_ptelo         982
 188 #define chud_7450_l3pm          983
 189 #define chud_7450_hid0          1008
 190 #define chud_7450_hid1          1009
 191 #define chud_7450_iabr          1010
 192 #define chud_7450_ldstdb        1012
 193 #define chud_7450_msscr0        1014
 194 #define chud_7450_msssr0        1015
 195 #define chud_7450_ldstcr        1016
 196 #define chud_7450_l2cr          1017
 197 #define chud_7450_l3cr          1018
 198 #define chud_7450_ictc          1019
 199 #define chud_7450_ictrl         1011
 200 #define chud_7450_thrm1         1020
 201 #define chud_7450_thrm2         1021
 202 #define chud_7450_thrm3         1022
 203 #define chud_7450_pir           1023
 204
 205 /* PPC SPRs - 970 Specific */
 206 #define chud_970_vrsave         256
 207 #define chud_970_ummcra         770
 208 #define chud_970_upmc1          771
 209 #define chud_970_upmc2          772
 210 #define chud_970_upmc3          773
 211 #define chud_970_upmc4          774
 212 #define chud_970_upmc5          775
 213 #define chud_970_upmc6          776
 214 #define chud_970_upmc7          777
 215 #define chud_970_upmc8          778
 216 #define chud_970_ummcr0         779
 217 #define chud_970_usiar          780
 218 #define chud_970_usdar          781
 219 #define chud_970_ummcr1         782
 220 #define chud_970_uimc           783
 221 #define chud_970_mmcra          786
 222 #define chud_970_pmc1           787
 223 #define chud_970_pmc2           788
 224 #define chud_970_pmc3           789
 225 #define chud_970_pmc4           790
 226 #define chud_970_pmc5           791
 227 #define chud_970_pmc6           792
 228 #define chud_970_pmc7           793
 229 #define chud_970_pmc8           794
 230 #define chud_970_mmcr0          795
 231 #define chud_970_siar           796
 232 #define chud_970_sdar           797
 233 #define chud_970_mmcr1          798
 234 #define chud_970_imc            799
 235
 236 /* PPC SPRs - 7400/7410 Specific, Private */
 237 #define chud_7400_msscr1        1015
 238
 239 /* PPC SPRs - 64-bit implementations,  Private */
 240 #define chud_ppc64_accr         29
 241 #define chud_ppc64_ctrl         152
 242
 243 /* PPC SPRs - 970 Specific, Private */
 244 #define chud_970_scomc          276
 245 #define chud_970_scomd          277
 246 #define chud_970_hsprg0         304
 247 #define chud_970_hsprg1         305
 248 #define chud_970_hdec           310
 249 #define chud_970_hior           311
 250 #define chud_970_rmor           312
 251 #define chud_970_hrmor          313
 252 #define chud_970_hsrr0          314
 253 #define chud_970_hsrr1          315
 254 #define chud_970_lpcr           318
 255 #define chud_970_lpidr          319
 256 #define chud_970_trig0          976
 257 #define chud_970_trig1          977
 258 #define chud_970_trig2          978
 259 #define chud_970_hid0           1008
 260 #define chud_970_hid1           1009
 261 #define chud_970_hid4           1012
 262 #define chud_970_hid5           1014
 263 #define chud_970_dabrx          1015
 264 #define chud_970_trace          1022
 265 #define chud_970_pir            1023
 266
 267 #endif // _CHUD_SPR_H_
 268