osfmk/arm64/tunables/tunables_h8.s

   1 /*
   2  * Copyright (c) 2019 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
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   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
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  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
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  18  * The Original Code and all software distributed under the License are
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  23  * Please see the License for the specific language governing rights and
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  27  */
  28 .macro APPLY_TUNABLES
  29         /***** Tunables that apply to all cores, all revisions *****/
  30         HID_CLEAR_BITS ARM64_REG_HID11, ARM64_REG_HID11_DisFillC1BubOpt, $1
  31
  32         // Change the default memcache data set ID from 0 to 15 for all agents
  33         HID_SET_BITS ARM64_REG_HID8, (ARM64_REG_HID8_DataSetID0_VALUE | ARM64_REG_HID8_DataSetID1_VALUE), $1
  34         HID_SET_BITS ARM64_REG_HID8, (ARM64_REG_HID8_DataSetID2_VALUE | ARM64_REG_HID8_DataSetID3_VALUE), $1
  35
  36         // Use 4-cycle MUL latency to avoid denormal stalls
  37         HID_SET_BITS ARM64_REG_HID7, ARM64_REG_HID7_disNexFastFmul, $1
  38
  39         // disable reporting of TLB-multi-hit-error
  40         // <rdar://problem/22163216>
  41         HID_CLEAR_BITS ARM64_REG_LSU_ERR_STS, ARM64_REG_LSU_ERR_STS_L1DTlbMultiHitEN, $1
  42
  43         /***** Tunables that apply to all P cores, all revisions *****/
  44         /* N/A */
  45
  46         /***** Tunables that apply to all E cores, all revisions *****/
  47         /* N/A */
  48
  49         /***** Tunables that apply to specific cores, all revisions *****/
  50         /* N/A */
  51
  52         /***** Tunables that apply to specific cores and revisions *****/
  53
  54         // rdar://problem/36112905: Set CYC_CFG:skipInit to pull in isAlive by one DCLK
  55         // to work around potential hang.  Must only be applied to Maui C0.
  56         EXEC_COREEQ_REVEQ MIDR_MAUI, CPU_VERSION_C0, $0, $1
  57         HID_SET_BITS ARM64_REG_CYC_CFG, ARM64_REG_CYC_CFG_skipInit, $1
  58         EXEC_END
  59         isb             sy
  60 .endmacro