osfmk/arm64/tunables/tunables_h11.s

   1 /*
   2  * Copyright (c) 2019 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 .macro APPLY_TUNABLES
  29         /***** Tunables that apply to all cores, all revisions *****/
  30         /* N/A */
  31
  32         /***** Tunables that apply to all P cores, all revisions *****/
  33         EXEC_PCORE_REVALL $0, $1
  34         // rdar://problem/34435356: segfaults due to IEX clock-gating
  35         HID_SET_BITS ARM64_REG_HID1, ARM64_REG_HID1_rccForceAllIexL3ClksOn, $1
  36
  37         // Prevent ordered loads from being dispatched from LSU until all prior loads have completed.
  38         // rdar://problem/34095873: AF2 ordering rules allow ARM device ordering violations
  39         HID_SET_BITS ARM64_REG_HID4, ARM64_REG_HID4_ForceNsOrdLdReqNoOlderLd, $1
  40
  41         // rdar://problem/38482968: [Cyprus Tunable] Poisoned cache line crossing younger load is not redirected by older load-barrier
  42         HID_SET_BITS ARM64_REG_HID3, ARM64_REG_HID3_DisColorOpt, $1
  43
  44         // rdar://problem/41056604: disable faster launches of uncacheable unaligned stores to workaround load/load ordering violation
  45         HID_SET_BITS ARM64_REG_HID11, ARM64_REG_HID11_DisX64NTLnchOpt, $1
  46
  47         EXEC_END
  48
  49         /***** Tunables that apply to all E cores, all revisions *****/
  50         EXEC_ECORE_REVALL $0, $1
  51         // Prevent ordered loads from being dispatched from LSU until all prior loads have completed.
  52         // rdar://problem/34095873: AF2 ordering rules allow ARM device ordering violations
  53         HID_SET_BITS ARM64_REG_EHID4, ARM64_REG_HID4_ForceNsOrdLdReqNoOlderLd, $1
  54
  55         // rdar://problem/36595004: Poisoned younger load is not redirected by older load-acquire
  56         HID_SET_BITS ARM64_REG_EHID3, ARM64_REG_EHID3_DisColorOpt, $1
  57
  58         // rdar://problem/37949166: Disable the extension of prefetcher training pipe clock gating, revert to default gating
  59         HID_SET_BITS ARM64_REG_EHID10, ARM64_REG_EHID10_rccDisPwrSavePrfClkOff, $1
  60
  61         EXEC_END
  62
  63         /***** Tunables that apply to specific cores, all revisions *****/
  64         // Should be applied to all Aruba variants, but only Cyprus variants B0 and later
  65         EXEC_COREEQ_REVALL MIDR_ARUBA_VORTEX, $0, $1
  66         // rdar://problem/36716477: data corruption due to incorrect branch predictor resolution
  67         HID_SET_BITS ARM64_REG_HID1, ARM64_REG_HID1_enaBrKillLimit, $1
  68         EXEC_END
  69
  70         /***** Tunables that apply to specific cores and revisions *****/
  71         EXEC_COREEQ_REVHS MIDR_CYPRUS_VORTEX, CPU_VERSION_A1, $0, $1
  72         // rdar://problem/36716477: data corruption due to incorrect branch predictor resolution
  73         HID_SET_BITS ARM64_REG_HID1, ARM64_REG_HID1_enaBrKillLimit, $1
  74         EXEC_END
  75
  76         EXEC_COREEQ_REVEQ MIDR_ARUBA_VORTEX, CPU_VERSION_A1, $0, $1
  77         // rdar://problem/40695685: Enable BIF fill buffer stall logic to prevent skid buffer overflow (Aruba A1 only)
  78         HID_SET_BITS ARM64_REG_HID5, ARM64_REG_HID5_EnableDnFIFORdStall, $1
  79         EXEC_END
  80 .endmacro