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1 /*
2 * Copyright (c) 2007 Apple Inc. All rights reserved.
3 */
4 /*
5 * CDDL HEADER START
6 *
7 * The contents of this file are subject to the terms of the
8 * Common Development and Distribution License, Version 1.0 only
9 * (the "License"). You may not use this file except in compliance
10 * with the License.
11 *
12 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
13 * or http://www.opensolaris.org/os/licensing.
14 * See the License for the specific language governing permissions
15 * and limitations under the License.
16 *
17 * When distributing Covered Code, include this CDDL HEADER in each
18 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
19 * If applicable, add the following below this CDDL HEADER, with the
20 * fields enclosed by brackets "[]" replaced with your own identifying
21 * information: Portions Copyright [yyyy] [name of copyright owner]
22 *
23 * CDDL HEADER END
24 */
25 /*
26 * Copyright 2004 Sun Microsystems, Inc. All rights reserved.
27 * Use is subject to license terms.
28 */
29
30 #ifndef _MACH_ARM_SDT_ISA_H
31 #define _MACH_ARM_SDT_ISA_H
32
33 /*
34 * Only define when testing. This makes the calls into actual calls to
35 * test functions.
36 */
37 /* #define DTRACE_CALL_TEST */
38
39 #define DTRACE_STRINGIFY(s) #s
40 #define DTRACE_TOSTRING(s) DTRACE_STRINGIFY(s)
41
42 #if defined(KERNEL)
43 /*
44 * For the kernel, set an explicit global label so the symbol can be located
45 */
46 #ifdef __arm__
47 #define DTRACE_LAB(p, n) \
48 "__dtrace_probe$" DTRACE_TOSTRING(%=__LINE__) DTRACE_STRINGIFY(_##p##___##n)
49
50 #define DTRACE_LABEL(p, n) \
51 ".pushsection __DATA, __data\n\t" \
52 ".p2align 2\n\t" \
53 ".globl " DTRACE_LAB(p, n) "\n\t" \
54 DTRACE_LAB(p, n) ":" ".long 1f""\n\t" \
55 ".popsection" "\n\t" \
56 "1:"
57 #else /* __arm64__ */
58 #define DTRACE_LAB(p, n) \
59 "__dtrace_probe$" DTRACE_TOSTRING(%=__LINE__) DTRACE_STRINGIFY(_##p##___##n)
60
61 #define DTRACE_LABEL(p, n) \
62 ".pushsection __DATA, __data\n\t" \
63 ".p2align 3\n\t" \
64 ".globl " DTRACE_LAB(p, n) "\n\t" \
65 DTRACE_LAB(p, n) ":" ".quad 1f""\n\t" \
66 ".popsection" "\n\t" \
67 "1:"
68 #endif
69 #else /* !KERNEL */
70 #define DTRACE_LABEL(p, n) \
71 "__dtrace_probe$" DTRACE_TOSTRING(%=__LINE__) DTRACE_STRINGIFY(_##p##___##n) ":" "\n\t"
72 #endif /* !KERNEL */
73
74 #ifdef DTRACE_CALL_TEST
75
76 #define DTRACE_CALL(p,n) \
77 DTRACE_LABEL(p,n) \
78 DTRACE_CALL_INSN(p,n)
79
80 #else /* !DTRACE_CALL_TEST */
81
82 #define DTRACE_CALL(p,n) \
83 DTRACE_LABEL(p,n) \
84 DTRACE_NOPS
85
86 #endif /* !DTRACE_CALL_TEST */
87
88 #if defined(__arm__)
89
90 #define DTRACE_NOPS \
91 "nop" "\n\t"
92
93 #define DTRACE_CALL_INSN(p,n) \
94 "blx _dtracetest" DTRACE_STRINGIFY(_##p##_##n) "\n\t"
95
96 #ifdef __thumb__
97 #define DTRACE_ALLOC_STACK(n) \
98 "sub sp, #" #n "\n\t"
99 #define DTRACE_DEALLOC_STACK(n) \
100 "add sp, #" #n "\n\t"
101 #else
102 #define DTRACE_ALLOC_STACK(n) \
103 "sub sp, sp, #" #n "\n\t"
104 #define DTRACE_DEALLOC_STACK(n) \
105 "add sp, sp, #" #n "\n\t"
106 #endif
107
108 #define ARG1_EXTENT 1
109 #define ARGS2_EXTENT 2
110 #define ARGS3_EXTENT 3
111 #define ARGS4_EXTENT 4
112 #define ARGS5_EXTENT 5
113 #define ARGS6_EXTENT 6
114 #define ARGS7_EXTENT 7
115 #define ARGS8_EXTENT 8
116 #define ARGS9_EXTENT 9
117 #define ARGS10_EXTENT 10
118
119 #define DTRACE_CALL0ARGS(provider, name) \
120 asm volatile ( \
121 DTRACE_CALL(provider, name) \
122 "# eat trailing nl+tab from DTRACE_CALL" \
123 : \
124 : \
125 );
126
127 #define DTRACE_CALL1ARG(provider, name) \
128 asm volatile ("ldr r0, [%0]" "\n\t" \
129 DTRACE_CALL(provider, name) \
130 : \
131 : "l" (__dtrace_args) \
132 : "memory", "r0" \
133 );
134
135 #define DTRACE_CALL2ARGS(provider, name) \
136 asm volatile ("ldr r1, [%0, #4]" "\n\t" \
137 "ldr r0, [%0]" "\n\t" \
138 DTRACE_CALL(provider, name) \
139 : \
140 : "l" (__dtrace_args) \
141 : "memory", "r0", "r1" \
142 );
143
144 #define DTRACE_CALL3ARGS(provider, name) \
145 asm volatile ("ldr r2, [%0, #8]" "\n\t" \
146 "ldr r1, [%0, #4]" "\n\t" \
147 "ldr r0, [%0]" "\n\t" \
148 DTRACE_CALL(provider, name) \
149 : \
150 : "l" (__dtrace_args) \
151 : "memory", "r0", "r1", "r2" \
152 );
153
154 #define DTRACE_CALL4ARGS(provider, name) \
155 asm volatile ("ldr r3, [%0, #12]" "\n\t" \
156 "ldr r2, [%0, #8]" "\n\t" \
157 "ldr r1, [%0, #4]" "\n\t" \
158 "ldr r0, [%0]" "\n\t" \
159 DTRACE_CALL(provider, name) \
160 : \
161 : "l" (__dtrace_args) \
162 : "memory", "r0", "r1", "r2", "r3" \
163 );
164
165 /*
166 * One of our ARM32 ABIs (armv7k) mandates that the stack be aligned to 16 bytes.
167 * We currently apply this constraint to all ARM32 DTRACE_CALL macros; hence the
168 * macros below will overallocate for some ABIs.
169 */
170 #define DTRACE_CALL5ARGS(provider, name) \
171 asm volatile ( \
172 DTRACE_ALLOC_STACK(16) \
173 "ldr r0, [%0, #16]" "\n\t" \
174 "str r0, [sp]" "\n\t" \
175 "ldr r3, [%0, #12]" "\n\t" \
176 "ldr r2, [%0, #8]" "\n\t" \
177 "ldr r1, [%0, #4]" "\n\t" \
178 "ldr r0, [%0]" "\n\t" \
179 DTRACE_CALL(provider, name) \
180 DTRACE_DEALLOC_STACK(16) \
181 : \
182 : "l" (__dtrace_args) \
183 : "memory", "r0", "r1", "r2", "r3" \
184 );
185
186 #define DTRACE_CALL6ARGS(provider, name) \
187 asm volatile ( \
188 DTRACE_ALLOC_STACK(16) \
189 "ldr r1, [%0, #20]" "\n\t" \
190 "ldr r0, [%0, #16]" "\n\t" \
191 "str r1, [sp, #4]" "\n\t" \
192 "str r0, [sp]" "\n\t" \
193 "ldr r3, [%0, #12]" "\n\t" \
194 "ldr r2, [%0, #8]" "\n\t" \
195 "ldr r1, [%0, #4]" "\n\t" \
196 "ldr r0, [%0]" "\n\t" \
197 DTRACE_CALL(provider, name) \
198 DTRACE_DEALLOC_STACK(16) \
199 : \
200 : "l" (__dtrace_args) \
201 : "memory", "r0", "r1", "r2", "r3" \
202 );
203
204 #define DTRACE_CALL7ARGS(provider, name) \
205 asm volatile ( \
206 DTRACE_ALLOC_STACK(16) \
207 "ldr r2, [%0, #24]" "\n\t" \
208 "ldr r1, [%0, #20]" "\n\t" \
209 "ldr r0, [%0, #16]" "\n\t" \
210 "str r2, [sp, #8]" "\n\t" \
211 "str r1, [sp, #4]" "\n\t" \
212 "str r0, [sp]" "\n\t" \
213 "ldr r3, [%0, #12]" "\n\t" \
214 "ldr r2, [%0, #8]" "\n\t" \
215 "ldr r1, [%0, #4]" "\n\t" \
216 "ldr r0, [%0]" "\n\t" \
217 DTRACE_CALL(provider, name) \
218 DTRACE_DEALLOC_STACK(16) \
219 : \
220 : "l" (__dtrace_args) \
221 : "memory", "r0", "r1", "r2", "r3" \
222 );
223
224 #define DTRACE_CALL8ARGS(provider, name) \
225 asm volatile ( \
226 DTRACE_ALLOC_STACK(16) \
227 "ldr r3, [%0, #28]" "\n\t" \
228 "ldr r2, [%0, #24]" "\n\t" \
229 "ldr r1, [%0, #20]" "\n\t" \
230 "ldr r0, [%0, #16]" "\n\t" \
231 "str r3, [sp, #12]" "\n\t" \
232 "str r2, [sp, #8]" "\n\t" \
233 "str r1, [sp, #4]" "\n\t" \
234 "str r0, [sp]" "\n\t" \
235 "ldr r3, [%0, #12]" "\n\t" \
236 "ldr r2, [%0, #8]" "\n\t" \
237 "ldr r1, [%0, #4]" "\n\t" \
238 "ldr r0, [%0]" "\n\t" \
239 DTRACE_CALL(provider, name) \
240 DTRACE_DEALLOC_STACK(16) \
241 : \
242 : "l" (__dtrace_args) \
243 : "memory", "r0", "r1", "r2", "r3" \
244 );
245
246 #define DTRACE_CALL9ARGS(provider, name) \
247 asm volatile ( \
248 DTRACE_ALLOC_STACK(32) \
249 "ldr r0, [%0, #32]" "\n\t" \
250 "str r0, [sp, #16]" "\n\t" \
251 "ldr r3, [%0, #28]" "\n\t" \
252 "ldr r2, [%0, #24]" "\n\t" \
253 "ldr r1, [%0, #20]" "\n\t" \
254 "ldr r0, [%0, #16]" "\n\t" \
255 "str r3, [sp, #12]" "\n\t" \
256 "str r2, [sp, #8]" "\n\t" \
257 "str r1, [sp, #4]" "\n\t" \
258 "str r0, [sp]" "\n\t" \
259 "ldr r3, [%0, #12]" "\n\t" \
260 "ldr r2, [%0, #8]" "\n\t" \
261 "ldr r1, [%0, #4]" "\n\t" \
262 "ldr r0, [%0]" "\n\t" \
263 DTRACE_CALL(provider, name) \
264 DTRACE_DEALLOC_STACK(32) \
265 : \
266 : "l" (__dtrace_args) \
267 : "memory", "r0", "r1", "r2", "r3" \
268 );
269
270 #define DTRACE_CALL10ARGS(provider, name) \
271 asm volatile ( \
272 DTRACE_ALLOC_STACK(32) \
273 "ldr r1, [%0, #36]" "\n\t" \
274 "ldr r0, [%0, #32]" "\n\t" \
275 "str r1, [sp, #20]" "\n\t" \
276 "str r0, [sp, #16]" "\n\t" \
277 "ldr r3, [%0, #28]" "\n\t" \
278 "ldr r2, [%0, #24]" "\n\t" \
279 "ldr r1, [%0, #20]" "\n\t" \
280 "ldr r0, [%0, #16]" "\n\t" \
281 "str r3, [sp, #12]" "\n\t" \
282 "str r2, [sp, #8]" "\n\t" \
283 "str r1, [sp, #4]" "\n\t" \
284 "str r0, [sp]" "\n\t" \
285 "ldr r3, [%0, #12]" "\n\t" \
286 "ldr r2, [%0, #8]" "\n\t" \
287 "ldr r1, [%0, #4]" "\n\t" \
288 "ldr r0, [%0]" "\n\t" \
289 DTRACE_CALL(provider, name) \
290 DTRACE_DEALLOC_STACK(32) \
291 : \
292 : "l" (__dtrace_args) \
293 : "memory", "r0", "r1", "r2", "r3" \
294 );
295
296 #elif defined(__arm64__)
297
298 #define DTRACE_NOPS \
299 "nop" "\n\t"
300
301
302 #define DTRACE_CALL_INSN(p,n) \
303 "bl _dtracetest" DTRACE_STRINGIFY(_##p##_##n) "\n\t"
304
305 #define DTRACE_ALLOC_STACK(n) \
306 "sub sp, sp, #" #n "\n\t"
307 #define DTRACE_DEALLOC_STACK(n) \
308 "add sp, sp, #" #n "\n\t"
309
310 #define ARG1_EXTENT 1
311 #define ARGS2_EXTENT 2
312 #define ARGS3_EXTENT 3
313 #define ARGS4_EXTENT 4
314 #define ARGS5_EXTENT 5
315 #define ARGS6_EXTENT 6
316 #define ARGS7_EXTENT 7
317 #define ARGS8_EXTENT 8
318 #define ARGS9_EXTENT 9
319 #define ARGS10_EXTENT 10
320
321 #define DTRACE_CALL0ARGS(provider, name) \
322 asm volatile ( \
323 DTRACE_CALL(provider, name) \
324 "# eat trailing nl+tab from DTRACE_CALL" \
325 : \
326 : \
327 );
328
329 #define DTRACE_CALL1ARG(provider, name) \
330 asm volatile ("ldr x0, [%0]" "\n\t" \
331 DTRACE_CALL(provider, name) \
332 : \
333 : "r" (__dtrace_args) \
334 : "memory", "x0" \
335 );
336
337 #define DTRACE_CALL2ARGS(provider, name) \
338 asm volatile ("ldp x0, x1, [%0]" "\n\t" \
339 DTRACE_CALL(provider, name) \
340 : \
341 : "r" (__dtrace_args) \
342 : "memory", "x0", "x1" \
343 );
344
345 #define DTRACE_CALL3ARGS(provider, name) \
346 asm volatile ("ldr x2, [%0, #16]" "\n\t" \
347 "ldp x0, x1, [%0]" "\n\t" \
348 DTRACE_CALL(provider, name) \
349 : \
350 : "r" (__dtrace_args) \
351 : "memory", "x0", "x1", "x2" \
352 );
353
354 #define DTRACE_CALL4ARGS(provider, name) \
355 asm volatile ("ldp x2, x3, [%0, #16]" "\n\t" \
356 "ldp x0, x1, [%0]" "\n\t" \
357 DTRACE_CALL(provider, name) \
358 : \
359 : "r" (__dtrace_args) \
360 : "memory", "x0", "x1", "x2", "x3" \
361 );
362
363 #define DTRACE_CALL5ARGS(provider, name) \
364 asm volatile ("ldr x4, [%0, #32]" "\n\t" \
365 "ldp x2, x3, [%0, #16]" "\n\t" \
366 "ldp x0, x1, [%0]" "\n\t" \
367 DTRACE_CALL(provider, name) \
368 : \
369 : "r" (__dtrace_args) \
370 : "memory", "x0", "x1", "x2", "x3", "x4" \
371 );
372
373 #define DTRACE_CALL6ARGS(provider, name) \
374 asm volatile ("ldp x4, x5, [%0, #32]" "\n\t" \
375 "ldp x2, x3, [%0, #16]" "\n\t" \
376 "ldp x0, x1, [%0]" "\n\t" \
377 DTRACE_CALL(provider, name) \
378 : \
379 : "r" (__dtrace_args) \
380 : "memory", "x0", "x1", "x2", "x3", "x4", "x5" \
381 );
382
383 #define DTRACE_CALL7ARGS(provider, name) \
384 asm volatile ("ldr x6, [%0, #48]" "\n\t" \
385 "ldp x4, x5, [%0, #32]" "\n\t" \
386 "ldp x2, x3, [%0, #16]" "\n\t" \
387 "ldp x0, x1, [%0]" "\n\t" \
388 DTRACE_CALL(provider, name) \
389 : \
390 : "r" (__dtrace_args) \
391 : "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6" \
392 );
393
394 #define DTRACE_CALL8ARGS(provider, name) \
395 asm volatile ("ldp x6, x7, [%0, #48]" "\n\t" \
396 "ldp x4, x5, [%0, #32]" "\n\t" \
397 "ldp x2, x3, [%0, #16]" "\n\t" \
398 "ldp x0, x1, [%0]" "\n\t" \
399 DTRACE_CALL(provider, name) \
400 : \
401 : "r" (__dtrace_args) \
402 : "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7" \
403 );
404
405 /* Keep stack 16 byte aligned per ABI requirements */
406 #define DTRACE_CALL9ARGS(provider, name) \
407 asm volatile ( \
408 DTRACE_ALLOC_STACK(16) \
409 "ldr x0, [%0, #64]" "\n\t" \
410 "str x0, [sp]" "\n\t" \
411 "ldp x6, x7, [%0, #48]" "\n\t" \
412 "ldp x4, x5, [%0, #32]" "\n\t" \
413 "ldp x2, x3, [%0, #16]" "\n\t" \
414 "ldp x0, x1, [%0]" "\n\t" \
415 DTRACE_CALL(provider, name) \
416 DTRACE_DEALLOC_STACK(16) \
417 : \
418 : "r" (__dtrace_args) \
419 : "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7" \
420 );
421
422 #define DTRACE_CALL10ARGS(provider, name) \
423 asm volatile ( \
424 DTRACE_ALLOC_STACK(16) \
425 "ldp x0, x1, [%0, #64]" "\n\t" \
426 "stp x0, x1, [sp]" "\n\t" \
427 "ldp x6, x7, [%0, #48]" "\n\t" \
428 "ldp x4, x5, [%0, #32]" "\n\t" \
429 "ldp x2, x3, [%0, #16]" "\n\t" \
430 "ldp x0, x1, [%0]" "\n\t" \
431 DTRACE_CALL(provider, name) \
432 DTRACE_DEALLOC_STACK(16) \
433 : \
434 : "r" (__dtrace_args) \
435 : "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7" \
436 );
437
438 #endif /* __arm__ */
439
440 #endif /* _MACH_ARM_SDT_ISA_H */