]> git.saurik.com Git - apple/xnu.git/blob - osfmk/x86_64/pmap.c
xnu-1699.24.23.tar.gz
[apple/xnu.git] / osfmk / x86_64 / pmap.c
1 /*
2 * Copyright (c) 2000-2010 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 /*
29 * @OSF_COPYRIGHT@
30 */
31 /*
32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989,1988 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56 /*
57 */
58
59 /*
60 * File: pmap.c
61 * Author: Avadis Tevanian, Jr., Michael Wayne Young
62 * (These guys wrote the Vax version)
63 *
64 * Physical Map management code for Intel i386, i486, and i860.
65 *
66 * Manages physical address maps.
67 *
68 * In addition to hardware address maps, this
69 * module is called upon to provide software-use-only
70 * maps which may or may not be stored in the same
71 * form as hardware maps. These pseudo-maps are
72 * used to store intermediate results from copy
73 * operations to and from address spaces.
74 *
75 * Since the information managed by this module is
76 * also stored by the logical address mapping module,
77 * this module may throw away valid virtual-to-physical
78 * mappings at almost any time. However, invalidations
79 * of virtual-to-physical mappings must be done as
80 * requested.
81 *
82 * In order to cope with hardware architectures which
83 * make virtual-to-physical map invalidates expensive,
84 * this module may delay invalidate or reduced protection
85 * operations until such time as they are actually
86 * necessary. This module is given full information as
87 * to which processors are currently using which maps,
88 * and to when physical maps must be made correct.
89 */
90
91 #include <string.h>
92 #include <mach_kdb.h>
93 #include <mach_ldebug.h>
94
95 #include <libkern/OSAtomic.h>
96
97 #include <mach/machine/vm_types.h>
98
99 #include <mach/boolean.h>
100 #include <kern/thread.h>
101 #include <kern/zalloc.h>
102 #include <kern/queue.h>
103 #include <kern/mach_param.h>
104
105 #include <kern/lock.h>
106 #include <kern/kalloc.h>
107 #include <kern/spl.h>
108
109 #include <vm/pmap.h>
110 #include <vm/vm_map.h>
111 #include <vm/vm_kern.h>
112 #include <mach/vm_param.h>
113 #include <mach/vm_prot.h>
114 #include <vm/vm_object.h>
115 #include <vm/vm_page.h>
116
117 #include <mach/machine/vm_param.h>
118 #include <machine/thread.h>
119
120 #include <kern/misc_protos.h> /* prototyping */
121 #include <i386/misc_protos.h>
122 #include <i386/i386_lowmem.h>
123 #include <x86_64/lowglobals.h>
124
125 #include <i386/cpuid.h>
126 #include <i386/cpu_data.h>
127 #include <i386/cpu_number.h>
128 #include <i386/machine_cpu.h>
129 #include <i386/seg.h>
130 #include <i386/serial_io.h>
131 #include <i386/cpu_capabilities.h>
132 #include <i386/machine_routines.h>
133 #include <i386/proc_reg.h>
134 #include <i386/tsc.h>
135 #include <i386/pmap_internal.h>
136 #include <i386/pmap_pcid.h>
137
138 #if MACH_KDB
139 #include <ddb/db_command.h>
140 #include <ddb/db_output.h>
141 #include <ddb/db_sym.h>
142 #include <ddb/db_print.h>
143 #endif /* MACH_KDB */
144
145 #include <vm/vm_protos.h>
146
147 #include <i386/mp.h>
148 #include <i386/mp_desc.h>
149
150
151 #ifdef IWANTTODEBUG
152 #undef DEBUG
153 #define DEBUG 1
154 #define POSTCODE_DELAY 1
155 #include <i386/postcode.h>
156 #endif /* IWANTTODEBUG */
157
158 #ifdef PMAP_DEBUG
159 #define DBG(x...) kprintf("DBG: " x)
160 #else
161 #define DBG(x...)
162 #endif
163 /* Compile time assert to ensure adjacency/alignment of per-CPU data fields used
164 * in the trampolines for kernel/user boundary TLB coherency.
165 */
166 char pmap_cpu_data_assert[(((offsetof(cpu_data_t, cpu_tlb_invalid) - offsetof(cpu_data_t, cpu_active_cr3)) == 8) && (offsetof(cpu_data_t, cpu_active_cr3) % 64 == 0)) ? 1 : -1];
167 boolean_t pmap_trace = FALSE;
168
169 boolean_t no_shared_cr3 = DEBUG; /* TRUE for DEBUG by default */
170
171 int nx_enabled = 1; /* enable no-execute protection */
172 int allow_data_exec = VM_ABI_32; /* 32-bit apps may execute data by default, 64-bit apps may not */
173 int allow_stack_exec = 0; /* No apps may execute from the stack by default */
174
175 const boolean_t cpu_64bit = TRUE; /* Mais oui! */
176
177 uint64_t max_preemption_latency_tsc = 0;
178
179 pv_hashed_entry_t *pv_hash_table; /* hash lists */
180
181 uint32_t npvhash = 0;
182
183 pv_hashed_entry_t pv_hashed_free_list = PV_HASHED_ENTRY_NULL;
184 pv_hashed_entry_t pv_hashed_kern_free_list = PV_HASHED_ENTRY_NULL;
185 decl_simple_lock_data(,pv_hashed_free_list_lock)
186 decl_simple_lock_data(,pv_hashed_kern_free_list_lock)
187 decl_simple_lock_data(,pv_hash_table_lock)
188
189 zone_t pv_hashed_list_zone; /* zone of pv_hashed_entry structures */
190
191 /*
192 * First and last physical addresses that we maintain any information
193 * for. Initialized to zero so that pmap operations done before
194 * pmap_init won't touch any non-existent structures.
195 */
196 boolean_t pmap_initialized = FALSE;/* Has pmap_init completed? */
197
198 static struct vm_object kptobj_object_store;
199 static struct vm_object kpml4obj_object_store;
200 static struct vm_object kpdptobj_object_store;
201
202 /*
203 * Array of physical page attribites for managed pages.
204 * One byte per physical page.
205 */
206 char *pmap_phys_attributes;
207 unsigned int last_managed_page = 0;
208
209 /*
210 * Amount of virtual memory mapped by one
211 * page-directory entry.
212 */
213
214 uint64_t pde_mapped_size = PDE_MAPPED_SIZE;
215
216 unsigned pmap_memory_region_count;
217 unsigned pmap_memory_region_current;
218
219 pmap_memory_region_t pmap_memory_regions[PMAP_MEMORY_REGIONS_SIZE];
220
221 /*
222 * Other useful macros.
223 */
224 #define current_pmap() (vm_map_pmap(current_thread()->map))
225
226 struct pmap kernel_pmap_store;
227 pmap_t kernel_pmap;
228
229 pd_entry_t high_shared_pde;
230 pd_entry_t commpage64_pde;
231
232 struct zone *pmap_zone; /* zone of pmap structures */
233
234 struct zone *pmap_anchor_zone;
235 int pmap_debug = 0; /* flag for debugging prints */
236
237 unsigned int inuse_ptepages_count = 0;
238 long long alloc_ptepages_count __attribute__((aligned(8))) = 0; /* aligned for atomic access */
239 unsigned int bootstrap_wired_pages = 0;
240 int pt_fake_zone_index = -1;
241
242 extern long NMIPI_acks;
243
244 boolean_t kernel_text_ps_4K = TRUE;
245 boolean_t wpkernel = TRUE;
246
247 extern char end;
248
249 static int nkpt;
250
251 pt_entry_t *DMAP1, *DMAP2;
252 caddr_t DADDR1;
253 caddr_t DADDR2;
254
255 /*
256 * unlinks the pv_hashed_entry_t pvh from the singly linked hash chain.
257 * properly deals with the anchor.
258 * must be called with the hash locked, does not unlock it
259 */
260
261
262 /*
263 * Map memory at initialization. The physical addresses being
264 * mapped are not managed and are never unmapped.
265 *
266 * For now, VM is already on, we only need to map the
267 * specified memory.
268 */
269 vm_offset_t
270 pmap_map(
271 vm_offset_t virt,
272 vm_map_offset_t start_addr,
273 vm_map_offset_t end_addr,
274 vm_prot_t prot,
275 unsigned int flags)
276 {
277 int ps;
278
279 ps = PAGE_SIZE;
280 while (start_addr < end_addr) {
281 pmap_enter(kernel_pmap, (vm_map_offset_t)virt,
282 (ppnum_t) i386_btop(start_addr), prot, flags, FALSE);
283 virt += ps;
284 start_addr += ps;
285 }
286 return(virt);
287 }
288
289 /*
290 * Back-door routine for mapping kernel VM at initialization.
291 * Useful for mapping memory outside the range
292 * Sets no-cache, A, D.
293 * Otherwise like pmap_map.
294 */
295 vm_offset_t
296 pmap_map_bd(
297 vm_offset_t virt,
298 vm_map_offset_t start_addr,
299 vm_map_offset_t end_addr,
300 vm_prot_t prot,
301 unsigned int flags)
302 {
303 pt_entry_t template;
304 pt_entry_t *pte;
305 spl_t spl;
306 vm_offset_t base = virt;
307 template = pa_to_pte(start_addr)
308 | INTEL_PTE_REF
309 | INTEL_PTE_MOD
310 | INTEL_PTE_WIRED
311 | INTEL_PTE_VALID;
312
313 if (flags & (VM_MEM_NOT_CACHEABLE | VM_WIMG_USE_DEFAULT)) {
314 template |= INTEL_PTE_NCACHE;
315 if (!(flags & (VM_MEM_GUARDED | VM_WIMG_USE_DEFAULT)))
316 template |= INTEL_PTE_PTA;
317 }
318 if (prot & VM_PROT_WRITE)
319 template |= INTEL_PTE_WRITE;
320
321 while (start_addr < end_addr) {
322 spl = splhigh();
323 pte = pmap_pte(kernel_pmap, (vm_map_offset_t)virt);
324 if (pte == PT_ENTRY_NULL) {
325 panic("pmap_map_bd: Invalid kernel address\n");
326 }
327 pmap_store_pte(pte, template);
328 splx(spl);
329 pte_increment_pa(template);
330 virt += PAGE_SIZE;
331 start_addr += PAGE_SIZE;
332 }
333 (void)base;
334 PMAP_UPDATE_TLBS(kernel_pmap, base, base + end_addr - start_addr);
335 return(virt);
336 }
337
338 extern char *first_avail;
339 extern vm_offset_t virtual_avail, virtual_end;
340 extern pmap_paddr_t avail_start, avail_end;
341 extern vm_offset_t sHIB;
342 extern vm_offset_t eHIB;
343 extern vm_offset_t stext;
344 extern vm_offset_t etext;
345 extern vm_offset_t sdata;
346
347 extern void *KPTphys;
348
349 void
350 pmap_cpu_init(void)
351 {
352 /*
353 * Here early in the life of a processor (from cpu_mode_init()).
354 * Ensure global page feature is disabled at this point.
355 */
356
357 set_cr4(get_cr4() &~ CR4_PGE);
358
359 /*
360 * Initialize the per-cpu, TLB-related fields.
361 */
362 current_cpu_datap()->cpu_kernel_cr3 = kernel_pmap->pm_cr3;
363 current_cpu_datap()->cpu_active_cr3 = kernel_pmap->pm_cr3;
364 current_cpu_datap()->cpu_tlb_invalid = FALSE;
365 current_cpu_datap()->cpu_task_map = TASK_MAP_64BIT;
366 pmap_pcid_configure();
367 }
368
369
370
371 /*
372 * Bootstrap the system enough to run with virtual memory.
373 * Map the kernel's code and data, and allocate the system page table.
374 * Called with mapping OFF. Page_size must already be set.
375 */
376
377 void
378 pmap_bootstrap(
379 __unused vm_offset_t load_start,
380 __unused boolean_t IA32e)
381 {
382 #if NCOPY_WINDOWS > 0
383 vm_offset_t va;
384 int i;
385 #endif
386 assert(IA32e);
387
388 vm_last_addr = VM_MAX_KERNEL_ADDRESS; /* Set the highest address
389 * known to VM */
390 /*
391 * The kernel's pmap is statically allocated so we don't
392 * have to use pmap_create, which is unlikely to work
393 * correctly at this part of the boot sequence.
394 */
395
396 kernel_pmap = &kernel_pmap_store;
397 kernel_pmap->ref_count = 1;
398 kernel_pmap->nx_enabled = FALSE;
399 kernel_pmap->pm_task_map = TASK_MAP_64BIT;
400 kernel_pmap->pm_obj = (vm_object_t) NULL;
401 kernel_pmap->dirbase = (pd_entry_t *)((uintptr_t)IdlePTD);
402 kernel_pmap->pm_pdpt = (pd_entry_t *) ((uintptr_t)IdlePDPT);
403 kernel_pmap->pm_pml4 = IdlePML4;
404 kernel_pmap->pm_cr3 = (uintptr_t)ID_MAP_VTOP(IdlePML4);
405 pmap_pcid_initialize_kernel(kernel_pmap);
406
407
408
409 current_cpu_datap()->cpu_kernel_cr3 = (addr64_t) kernel_pmap->pm_cr3;
410
411 nkpt = NKPT;
412 OSAddAtomic(NKPT, &inuse_ptepages_count);
413 OSAddAtomic64(NKPT, &alloc_ptepages_count);
414 bootstrap_wired_pages = NKPT;
415
416 virtual_avail = (vm_offset_t)(VM_MIN_KERNEL_ADDRESS) + (vm_offset_t)first_avail;
417 virtual_end = (vm_offset_t)(VM_MAX_KERNEL_ADDRESS);
418
419 #if NCOPY_WINDOWS > 0
420 /*
421 * Reserve some special page table entries/VA space for temporary
422 * mapping of pages.
423 */
424 #define SYSMAP(c, p, v, n) \
425 v = (c)va; va += ((n)*INTEL_PGBYTES);
426
427 va = virtual_avail;
428
429 for (i=0; i<PMAP_NWINDOWS; i++) {
430 #if 1
431 kprintf("trying to do SYSMAP idx %d %p\n", i,
432 current_cpu_datap());
433 kprintf("cpu_pmap %p\n", current_cpu_datap()->cpu_pmap);
434 kprintf("mapwindow %p\n", current_cpu_datap()->cpu_pmap->mapwindow);
435 kprintf("two stuff %p %p\n",
436 (void *)(current_cpu_datap()->cpu_pmap->mapwindow[i].prv_CMAP),
437 (void *)(current_cpu_datap()->cpu_pmap->mapwindow[i].prv_CADDR));
438 #endif
439 SYSMAP(caddr_t,
440 (current_cpu_datap()->cpu_pmap->mapwindow[i].prv_CMAP),
441 (current_cpu_datap()->cpu_pmap->mapwindow[i].prv_CADDR),
442 1);
443 current_cpu_datap()->cpu_pmap->mapwindow[i].prv_CMAP =
444 &(current_cpu_datap()->cpu_pmap->mapwindow[i].prv_CMAP_store);
445 *current_cpu_datap()->cpu_pmap->mapwindow[i].prv_CMAP = 0;
446 }
447
448 /* DMAP user for debugger */
449 SYSMAP(caddr_t, DMAP1, DADDR1, 1);
450 SYSMAP(caddr_t, DMAP2, DADDR2, 1); /* XXX temporary - can remove */
451
452 virtual_avail = va;
453 #endif
454
455 if (PE_parse_boot_argn("npvhash", &npvhash, sizeof (npvhash))) {
456 if (0 != ((npvhash + 1) & npvhash)) {
457 kprintf("invalid hash %d, must be ((2^N)-1), "
458 "using default %d\n", npvhash, NPVHASH);
459 npvhash = NPVHASH;
460 }
461 } else {
462 npvhash = NPVHASH;
463 }
464
465 simple_lock_init(&kernel_pmap->lock, 0);
466 simple_lock_init(&pv_hashed_free_list_lock, 0);
467 simple_lock_init(&pv_hashed_kern_free_list_lock, 0);
468 simple_lock_init(&pv_hash_table_lock,0);
469
470 pmap_cpu_init();
471
472 if (pmap_pcid_ncpus)
473 printf("PMAP: PCID enabled\n");
474
475 boot_args *args = (boot_args *)PE_state.bootArgs;
476 if (args->efiMode == kBootArgsEfiMode32) {
477 printf("EFI32: kernel virtual space limited to 4GB\n");
478 virtual_end = VM_MAX_KERNEL_ADDRESS_EFI32;
479 }
480 kprintf("Kernel virtual space from 0x%lx to 0x%lx.\n",
481 (long)KERNEL_BASE, (long)virtual_end);
482 kprintf("Available physical space from 0x%llx to 0x%llx\n",
483 avail_start, avail_end);
484
485 /*
486 * The -no_shared_cr3 boot-arg is a debugging feature (set by default
487 * in the DEBUG kernel) to force the kernel to switch to its own map
488 * (and cr3) when control is in kernelspace. The kernel's map does not
489 * include (i.e. share) userspace so wild references will cause
490 * a panic. Only copyin and copyout are exempt from this.
491 */
492 (void) PE_parse_boot_argn("-no_shared_cr3",
493 &no_shared_cr3, sizeof (no_shared_cr3));
494 if (no_shared_cr3)
495 kprintf("Kernel not sharing user map\n");
496
497 #ifdef PMAP_TRACES
498 if (PE_parse_boot_argn("-pmap_trace", &pmap_trace, sizeof (pmap_trace))) {
499 kprintf("Kernel traces for pmap operations enabled\n");
500 }
501 #endif /* PMAP_TRACES */
502 }
503
504 void
505 pmap_virtual_space(
506 vm_offset_t *startp,
507 vm_offset_t *endp)
508 {
509 *startp = virtual_avail;
510 *endp = virtual_end;
511 }
512
513 /*
514 * Initialize the pmap module.
515 * Called by vm_init, to initialize any structures that the pmap
516 * system needs to map virtual memory.
517 */
518 void
519 pmap_init(void)
520 {
521 long npages;
522 vm_offset_t addr;
523 vm_size_t s, vsize;
524 vm_map_offset_t vaddr;
525 ppnum_t ppn;
526
527
528 kernel_pmap->pm_obj_pml4 = &kpml4obj_object_store;
529 _vm_object_allocate((vm_object_size_t)NPML4PGS, &kpml4obj_object_store);
530
531 kernel_pmap->pm_obj_pdpt = &kpdptobj_object_store;
532 _vm_object_allocate((vm_object_size_t)NPDPTPGS, &kpdptobj_object_store);
533
534 kernel_pmap->pm_obj = &kptobj_object_store;
535 _vm_object_allocate((vm_object_size_t)NPDEPGS, &kptobj_object_store);
536
537 /*
538 * Allocate memory for the pv_head_table and its lock bits,
539 * the modify bit array, and the pte_page table.
540 */
541
542 /*
543 * zero bias all these arrays now instead of off avail_start
544 * so we cover all memory
545 */
546
547 npages = i386_btop(avail_end);
548 s = (vm_size_t) (sizeof(struct pv_rooted_entry) * npages
549 + (sizeof (struct pv_hashed_entry_t *) * (npvhash+1))
550 + pv_lock_table_size(npages)
551 + pv_hash_lock_table_size((npvhash+1))
552 + npages);
553
554 s = round_page(s);
555 if (kernel_memory_allocate(kernel_map, &addr, s, 0,
556 KMA_KOBJECT | KMA_PERMANENT)
557 != KERN_SUCCESS)
558 panic("pmap_init");
559
560 memset((char *)addr, 0, s);
561
562 vaddr = addr;
563 vsize = s;
564
565 #if PV_DEBUG
566 if (0 == npvhash) panic("npvhash not initialized");
567 #endif
568
569 /*
570 * Allocate the structures first to preserve word-alignment.
571 */
572 pv_head_table = (pv_rooted_entry_t) addr;
573 addr = (vm_offset_t) (pv_head_table + npages);
574
575 pv_hash_table = (pv_hashed_entry_t *)addr;
576 addr = (vm_offset_t) (pv_hash_table + (npvhash + 1));
577
578 pv_lock_table = (char *) addr;
579 addr = (vm_offset_t) (pv_lock_table + pv_lock_table_size(npages));
580
581 pv_hash_lock_table = (char *) addr;
582 addr = (vm_offset_t) (pv_hash_lock_table + pv_hash_lock_table_size((npvhash+1)));
583
584 pmap_phys_attributes = (char *) addr;
585
586 ppnum_t last_pn = i386_btop(avail_end);
587 unsigned int i;
588 pmap_memory_region_t *pmptr = pmap_memory_regions;
589 for (i = 0; i < pmap_memory_region_count; i++, pmptr++) {
590 if (pmptr->type != kEfiConventionalMemory)
591 continue;
592 unsigned int pn;
593 for (pn = pmptr->base; pn <= pmptr->end; pn++) {
594 if (pn < last_pn) {
595 pmap_phys_attributes[pn] |= PHYS_MANAGED;
596
597 if (pn > last_managed_page)
598 last_managed_page = pn;
599
600 if (pn < lowest_lo)
601 pmap_phys_attributes[pn] |= PHYS_NOENCRYPT;
602 else if (pn >= lowest_hi && pn <= highest_hi)
603 pmap_phys_attributes[pn] |= PHYS_NOENCRYPT;
604 }
605 }
606 }
607 while (vsize) {
608 ppn = pmap_find_phys(kernel_pmap, vaddr);
609
610 pmap_phys_attributes[ppn] |= PHYS_NOENCRYPT;
611
612 vaddr += PAGE_SIZE;
613 vsize -= PAGE_SIZE;
614 }
615 /*
616 * Create the zone of physical maps,
617 * and of the physical-to-virtual entries.
618 */
619 s = (vm_size_t) sizeof(struct pmap);
620 pmap_zone = zinit(s, 400*s, 4096, "pmap"); /* XXX */
621 zone_change(pmap_zone, Z_NOENCRYPT, TRUE);
622
623 pmap_anchor_zone = zinit(PAGE_SIZE, task_max, PAGE_SIZE, "pagetable anchors");
624 zone_change(pmap_anchor_zone, Z_NOENCRYPT, TRUE);
625
626 #if ZONE_DEBUG
627 /* The anchor is required to be page aligned. Zone debugging adds
628 * padding which may violate that requirement. Disable it
629 * to avoid assumptions.
630 */
631 zone_debug_disable(pmap_anchor_zone);
632 #endif
633
634 s = (vm_size_t) sizeof(struct pv_hashed_entry);
635 pv_hashed_list_zone = zinit(s, 10000*s /* Expandable zone */,
636 4096 * 3 /* LCM x86_64*/, "pv_list");
637 zone_change(pv_hashed_list_zone, Z_NOENCRYPT, TRUE);
638
639 /* create pv entries for kernel pages mapped by low level
640 startup code. these have to exist so we can pmap_remove()
641 e.g. kext pages from the middle of our addr space */
642
643 vaddr = (vm_map_offset_t) VM_MIN_KERNEL_ADDRESS;
644 for (ppn = VM_MIN_KERNEL_PAGE; ppn < i386_btop(avail_start); ppn++) {
645 pv_rooted_entry_t pv_e;
646
647 pv_e = pai_to_pvh(ppn);
648 pv_e->va = vaddr;
649 vaddr += PAGE_SIZE;
650 pv_e->pmap = kernel_pmap;
651 queue_init(&pv_e->qlink);
652 }
653 pmap_initialized = TRUE;
654
655 max_preemption_latency_tsc = tmrCvt((uint64_t)MAX_PREEMPTION_LATENCY_NS, tscFCvtn2t);
656
657 /*
658 * Ensure the kernel's PML4 entry exists for the basement
659 * before this is shared with any user.
660 */
661 pmap_expand_pml4(kernel_pmap, KERNEL_BASEMENT);
662 }
663
664 /*
665 * Called once VM is fully initialized so that we can release unused
666 * sections of low memory to the general pool.
667 * Also complete the set-up of identity-mapped sections of the kernel:
668 * 1) write-protect kernel text
669 * 2) map kernel text using large pages if possible
670 * 3) read and write-protect page zero (for K32)
671 * 4) map the global page at the appropriate virtual address.
672 *
673 * Use of large pages
674 * ------------------
675 * To effectively map and write-protect all kernel text pages, the text
676 * must be 2M-aligned at the base, and the data section above must also be
677 * 2M-aligned. That is, there's padding below and above. This is achieved
678 * through linker directives. Large pages are used only if this alignment
679 * exists (and not overriden by the -kernel_text_page_4K boot-arg). The
680 * memory layout is:
681 *
682 * : :
683 * | __DATA |
684 * sdata: ================== 2Meg
685 * | |
686 * | zero-padding |
687 * | |
688 * etext: ------------------
689 * | |
690 * : :
691 * | |
692 * | __TEXT |
693 * | |
694 * : :
695 * | |
696 * stext: ================== 2Meg
697 * | |
698 * | zero-padding |
699 * | |
700 * eHIB: ------------------
701 * | __HIB |
702 * : :
703 *
704 * Prior to changing the mapping from 4K to 2M, the zero-padding pages
705 * [eHIB,stext] and [etext,sdata] are ml_static_mfree()'d. Then all the
706 * 4K pages covering [stext,etext] are coalesced as 2M large pages.
707 * The now unused level-1 PTE pages are also freed.
708 */
709 extern uint32_t pmap_reserved_ranges;
710 void
711 pmap_lowmem_finalize(void)
712 {
713 spl_t spl;
714 int i;
715
716 /* Check the kernel is linked at the expected base address */
717 if (i386_btop(kvtophys((vm_offset_t) &IdlePML4)) !=
718 I386_KERNEL_IMAGE_BASE_PAGE)
719 panic("pmap_lowmem_finalize() unexpected kernel base address");
720
721 /*
722 * Update wired memory statistics for early boot pages
723 */
724 PMAP_ZINFO_PALLOC(bootstrap_wired_pages * PAGE_SIZE);
725
726 /*
727 * Free all pages in pmap regions below the base:
728 * rdar://6332712
729 * We can't free all the pages to VM that EFI reports available.
730 * Pages in the range 0xc0000-0xff000 aren't safe over sleep/wake.
731 * There's also a size miscalculation here: pend is one page less
732 * than it should be but this is not fixed to be backwards
733 * compatible.
734 * Due to this current EFI limitation, we take only the first
735 * entry in the memory region table. However, the loop is retained
736 * (with the intended termination criteria commented out) in the
737 * hope that some day we can free all low-memory ranges.
738 */
739 for (i = 0;
740 // pmap_memory_regions[i].end <= I386_KERNEL_IMAGE_BASE_PAGE;
741 i < 1 && (pmap_reserved_ranges == 0);
742 i++) {
743 vm_offset_t pbase = (vm_offset_t)i386_ptob(pmap_memory_regions[i].base);
744 vm_offset_t pend = (vm_offset_t)i386_ptob(pmap_memory_regions[i].end);
745 // vm_offset_t pend = i386_ptob(pmap_memory_regions[i].end+1);
746
747 DBG("ml_static_mfree(%p,%p) for pmap region %d\n",
748 (void *) ml_static_ptovirt(pbase),
749 (void *) (pend - pbase), i);
750 ml_static_mfree(ml_static_ptovirt(pbase), pend - pbase);
751 }
752
753 /*
754 * If text and data are both 2MB-aligned,
755 * we can map text with large-pages,
756 * unless the -kernel_text_ps_4K boot-arg overrides.
757 */
758 if ((stext & I386_LPGMASK) == 0 && (sdata & I386_LPGMASK) == 0) {
759 kprintf("Kernel text is 2MB aligned");
760 kernel_text_ps_4K = FALSE;
761 if (PE_parse_boot_argn("-kernel_text_ps_4K",
762 &kernel_text_ps_4K,
763 sizeof (kernel_text_ps_4K)))
764 kprintf(" but will be mapped with 4K pages\n");
765 else
766 kprintf(" and will be mapped with 2M pages\n");
767 }
768
769 (void) PE_parse_boot_argn("wpkernel", &wpkernel, sizeof (wpkernel));
770 if (wpkernel)
771 kprintf("Kernel text %p-%p to be write-protected\n",
772 (void *) stext, (void *) etext);
773
774 spl = splhigh();
775
776 /*
777 * Scan over text if mappings are to be changed:
778 * - Remap kernel text readonly unless the "wpkernel" boot-arg is 0
779 * - Change to large-pages if possible and not overriden.
780 */
781 if (kernel_text_ps_4K && wpkernel) {
782 vm_offset_t myva;
783 for (myva = stext; myva < etext; myva += PAGE_SIZE) {
784 pt_entry_t *ptep;
785
786 ptep = pmap_pte(kernel_pmap, (vm_map_offset_t)myva);
787 if (ptep)
788 pmap_store_pte(ptep, *ptep & ~INTEL_PTE_RW);
789 }
790 }
791
792 if (!kernel_text_ps_4K) {
793 vm_offset_t myva;
794
795 /*
796 * Release zero-filled page padding used for 2M-alignment.
797 */
798 DBG("ml_static_mfree(%p,%p) for padding below text\n",
799 (void *) eHIB, (void *) (stext - eHIB));
800 ml_static_mfree(eHIB, stext - eHIB);
801 DBG("ml_static_mfree(%p,%p) for padding above text\n",
802 (void *) etext, (void *) (sdata - etext));
803 ml_static_mfree(etext, sdata - etext);
804
805 /*
806 * Coalesce text pages into large pages.
807 */
808 for (myva = stext; myva < sdata; myva += I386_LPGBYTES) {
809 pt_entry_t *ptep;
810 vm_offset_t pte_phys;
811 pt_entry_t *pdep;
812 pt_entry_t pde;
813
814 pdep = pmap_pde(kernel_pmap, (vm_map_offset_t)myva);
815 ptep = pmap_pte(kernel_pmap, (vm_map_offset_t)myva);
816 DBG("myva: %p pdep: %p ptep: %p\n",
817 (void *) myva, (void *) pdep, (void *) ptep);
818 if ((*ptep & INTEL_PTE_VALID) == 0)
819 continue;
820 pte_phys = (vm_offset_t)(*ptep & PG_FRAME);
821 pde = *pdep & PTMASK; /* page attributes from pde */
822 pde |= INTEL_PTE_PS; /* make it a 2M entry */
823 pde |= pte_phys; /* take page frame from pte */
824
825 if (wpkernel)
826 pde &= ~INTEL_PTE_RW;
827 DBG("pmap_store_pte(%p,0x%llx)\n",
828 (void *)pdep, pde);
829 pmap_store_pte(pdep, pde);
830
831 /*
832 * Free the now-unused level-1 pte.
833 * Note: ptep is a virtual address to the pte in the
834 * recursive map. We can't use this address to free
835 * the page. Instead we need to compute its address
836 * in the Idle PTEs in "low memory".
837 */
838 vm_offset_t vm_ptep = (vm_offset_t) KPTphys
839 + (pte_phys >> PTPGSHIFT);
840 DBG("ml_static_mfree(%p,0x%x) for pte\n",
841 (void *) vm_ptep, PAGE_SIZE);
842 ml_static_mfree(vm_ptep, PAGE_SIZE);
843 }
844
845 /* Change variable read by sysctl machdep.pmap */
846 pmap_kernel_text_ps = I386_LPGBYTES;
847 }
848
849 /* map lowmem global page into fixed addr */
850 pt_entry_t *pte = NULL;
851 if (0 == (pte = pmap_pte(kernel_pmap,
852 VM_MIN_KERNEL_LOADED_ADDRESS + 0x2000)))
853 panic("lowmem pte");
854 /* make sure it is defined on page boundary */
855 assert(0 == ((vm_offset_t) &lowGlo & PAGE_MASK));
856 pmap_store_pte(pte, kvtophys((vm_offset_t)&lowGlo)
857 | INTEL_PTE_REF
858 | INTEL_PTE_MOD
859 | INTEL_PTE_WIRED
860 | INTEL_PTE_VALID
861 | INTEL_PTE_RW);
862 splx(spl);
863 if (pmap_pcid_ncpus)
864 tlb_flush_global();
865 else
866 flush_tlb_raw();
867 }
868
869 /*
870 * this function is only used for debugging fron the vm layer
871 */
872 boolean_t
873 pmap_verify_free(
874 ppnum_t pn)
875 {
876 pv_rooted_entry_t pv_h;
877 int pai;
878 boolean_t result;
879
880 assert(pn != vm_page_fictitious_addr);
881
882 if (!pmap_initialized)
883 return(TRUE);
884
885 if (pn == vm_page_guard_addr)
886 return TRUE;
887
888 pai = ppn_to_pai(pn);
889 if (!IS_MANAGED_PAGE(pai))
890 return(FALSE);
891 pv_h = pai_to_pvh(pn);
892 result = (pv_h->pmap == PMAP_NULL);
893 return(result);
894 }
895
896 boolean_t
897 pmap_is_empty(
898 pmap_t pmap,
899 vm_map_offset_t va_start,
900 vm_map_offset_t va_end)
901 {
902 vm_map_offset_t offset;
903 ppnum_t phys_page;
904
905 if (pmap == PMAP_NULL) {
906 return TRUE;
907 }
908
909 /*
910 * Check the resident page count
911 * - if it's zero, the pmap is completely empty.
912 * This short-circuit test prevents a virtual address scan which is
913 * painfully slow for 64-bit spaces.
914 * This assumes the count is correct
915 * .. the debug kernel ought to be checking perhaps by page table walk.
916 */
917 if (pmap->stats.resident_count == 0)
918 return TRUE;
919
920 for (offset = va_start;
921 offset < va_end;
922 offset += PAGE_SIZE_64) {
923 phys_page = pmap_find_phys(pmap, offset);
924 if (phys_page) {
925 kprintf("pmap_is_empty(%p,0x%llx,0x%llx): "
926 "page %d at 0x%llx\n",
927 pmap, va_start, va_end, phys_page, offset);
928 return FALSE;
929 }
930 }
931
932 return TRUE;
933 }
934
935
936 /*
937 * Create and return a physical map.
938 *
939 * If the size specified for the map
940 * is zero, the map is an actual physical
941 * map, and may be referenced by the
942 * hardware.
943 *
944 * If the size specified is non-zero,
945 * the map will be used in software only, and
946 * is bounded by that size.
947 */
948 pmap_t
949 pmap_create(
950 vm_map_size_t sz,
951 boolean_t is_64bit)
952 {
953 pmap_t p;
954 vm_size_t size;
955 pml4_entry_t *pml4;
956 pml4_entry_t *kpml4;
957
958 PMAP_TRACE(PMAP_CODE(PMAP__CREATE) | DBG_FUNC_START,
959 (uint32_t) (sz>>32), (uint32_t) sz, is_64bit, 0, 0);
960
961 size = (vm_size_t) sz;
962
963 /*
964 * A software use-only map doesn't even need a map.
965 */
966
967 if (size != 0) {
968 return(PMAP_NULL);
969 }
970
971 p = (pmap_t) zalloc(pmap_zone);
972 if (PMAP_NULL == p)
973 panic("pmap_create zalloc");
974 /* Zero all fields */
975 bzero(p, sizeof(*p));
976 /* init counts now since we'll be bumping some */
977 simple_lock_init(&p->lock, 0);
978 p->stats.resident_count = 0;
979 p->stats.resident_max = 0;
980 p->stats.wired_count = 0;
981 p->ref_count = 1;
982 p->nx_enabled = 1;
983 p->pm_shared = FALSE;
984
985 p->pm_task_map = is_64bit ? TASK_MAP_64BIT : TASK_MAP_32BIT;;
986 if (pmap_pcid_ncpus)
987 pmap_pcid_initialize(p);
988 p->pm_pml4 = zalloc(pmap_anchor_zone);
989
990 pmap_assert((((uintptr_t)p->pm_pml4) & PAGE_MASK) == 0);
991
992 memset((char *)p->pm_pml4, 0, PAGE_SIZE);
993
994 p->pm_cr3 = (pmap_paddr_t)kvtophys((vm_offset_t)p->pm_pml4);
995
996 /* allocate the vm_objs to hold the pdpt, pde and pte pages */
997
998 p->pm_obj_pml4 = vm_object_allocate((vm_object_size_t)(NPML4PGS));
999 if (NULL == p->pm_obj_pml4)
1000 panic("pmap_create pdpt obj");
1001
1002 p->pm_obj_pdpt = vm_object_allocate((vm_object_size_t)(NPDPTPGS));
1003 if (NULL == p->pm_obj_pdpt)
1004 panic("pmap_create pdpt obj");
1005
1006 p->pm_obj = vm_object_allocate((vm_object_size_t)(NPDEPGS));
1007 if (NULL == p->pm_obj)
1008 panic("pmap_create pte obj");
1009
1010 /* All pmaps share the kernel's pml4 */
1011 pml4 = pmap64_pml4(p, 0ULL);
1012 kpml4 = kernel_pmap->pm_pml4;
1013 pml4[KERNEL_PML4_INDEX] = kpml4[KERNEL_PML4_INDEX];
1014 pml4[KERNEL_KEXTS_INDEX] = kpml4[KERNEL_KEXTS_INDEX];
1015 pml4[KERNEL_PHYSMAP_INDEX] = kpml4[KERNEL_PHYSMAP_INDEX];
1016
1017 PMAP_TRACE(PMAP_CODE(PMAP__CREATE) | DBG_FUNC_START,
1018 p, is_64bit, 0, 0, 0);
1019
1020 return(p);
1021 }
1022
1023 /*
1024 * Retire the given physical map from service.
1025 * Should only be called if the map contains
1026 * no valid mappings.
1027 */
1028
1029 void
1030 pmap_destroy(pmap_t p)
1031 {
1032 int c;
1033
1034 if (p == PMAP_NULL)
1035 return;
1036
1037 PMAP_TRACE(PMAP_CODE(PMAP__DESTROY) | DBG_FUNC_START,
1038 p, 0, 0, 0, 0);
1039
1040 PMAP_LOCK(p);
1041
1042 c = --p->ref_count;
1043
1044 pmap_assert((current_thread() && (current_thread()->map)) ? (current_thread()->map->pmap != p) : TRUE);
1045
1046 if (c == 0) {
1047 /*
1048 * If some cpu is not using the physical pmap pointer that it
1049 * is supposed to be (see set_dirbase), we might be using the
1050 * pmap that is being destroyed! Make sure we are
1051 * physically on the right pmap:
1052 */
1053 PMAP_UPDATE_TLBS(p, 0x0ULL, 0xFFFFFFFFFFFFF000ULL);
1054 if (pmap_pcid_ncpus)
1055 pmap_destroy_pcid_sync(p);
1056 }
1057
1058 PMAP_UNLOCK(p);
1059
1060 if (c != 0) {
1061 PMAP_TRACE(PMAP_CODE(PMAP__DESTROY) | DBG_FUNC_END,
1062 p, 1, 0, 0, 0);
1063 pmap_assert(p == kernel_pmap);
1064 return; /* still in use */
1065 }
1066
1067 /*
1068 * Free the memory maps, then the
1069 * pmap structure.
1070 */
1071 int inuse_ptepages = 0;
1072
1073 zfree(pmap_anchor_zone, p->pm_pml4);
1074
1075 inuse_ptepages += p->pm_obj_pml4->resident_page_count;
1076 vm_object_deallocate(p->pm_obj_pml4);
1077
1078 inuse_ptepages += p->pm_obj_pdpt->resident_page_count;
1079 vm_object_deallocate(p->pm_obj_pdpt);
1080
1081 inuse_ptepages += p->pm_obj->resident_page_count;
1082 vm_object_deallocate(p->pm_obj);
1083
1084 OSAddAtomic(-inuse_ptepages, &inuse_ptepages_count);
1085 PMAP_ZINFO_PFREE(inuse_ptepages * PAGE_SIZE);
1086
1087 zfree(pmap_zone, p);
1088
1089 PMAP_TRACE(PMAP_CODE(PMAP__DESTROY) | DBG_FUNC_END,
1090 0, 0, 0, 0, 0);
1091 }
1092
1093 /*
1094 * Add a reference to the specified pmap.
1095 */
1096
1097 void
1098 pmap_reference(pmap_t p)
1099 {
1100 if (p != PMAP_NULL) {
1101 PMAP_LOCK(p);
1102 p->ref_count++;
1103 PMAP_UNLOCK(p);;
1104 }
1105 }
1106
1107 /*
1108 * Remove phys addr if mapped in specified map
1109 *
1110 */
1111 void
1112 pmap_remove_some_phys(
1113 __unused pmap_t map,
1114 __unused ppnum_t pn)
1115 {
1116
1117 /* Implement to support working set code */
1118
1119 }
1120
1121
1122 /*
1123 * Set the physical protection on the
1124 * specified range of this map as requested.
1125 * Will not increase permissions.
1126 */
1127 void
1128 pmap_protect(
1129 pmap_t map,
1130 vm_map_offset_t sva,
1131 vm_map_offset_t eva,
1132 vm_prot_t prot)
1133 {
1134 pt_entry_t *pde;
1135 pt_entry_t *spte, *epte;
1136 vm_map_offset_t lva;
1137 vm_map_offset_t orig_sva;
1138 boolean_t set_NX;
1139 int num_found = 0;
1140
1141 pmap_intr_assert();
1142
1143 if (map == PMAP_NULL)
1144 return;
1145
1146 if (prot == VM_PROT_NONE) {
1147 pmap_remove(map, sva, eva);
1148 return;
1149 }
1150 PMAP_TRACE(PMAP_CODE(PMAP__PROTECT) | DBG_FUNC_START,
1151 map,
1152 (uint32_t) (sva >> 32), (uint32_t) sva,
1153 (uint32_t) (eva >> 32), (uint32_t) eva);
1154
1155 if ((prot & VM_PROT_EXECUTE) || !nx_enabled || !map->nx_enabled)
1156 set_NX = FALSE;
1157 else
1158 set_NX = TRUE;
1159
1160 PMAP_LOCK(map);
1161
1162 orig_sva = sva;
1163 while (sva < eva) {
1164 lva = (sva + pde_mapped_size) & ~(pde_mapped_size - 1);
1165 if (lva > eva)
1166 lva = eva;
1167 pde = pmap_pde(map, sva);
1168 if (pde && (*pde & INTEL_PTE_VALID)) {
1169 if (*pde & INTEL_PTE_PS) {
1170 /* superpage */
1171 spte = pde;
1172 epte = spte+1; /* excluded */
1173 } else {
1174 spte = pmap_pte(map, (sva & ~(pde_mapped_size - 1)));
1175 spte = &spte[ptenum(sva)];
1176 epte = &spte[intel_btop(lva - sva)];
1177 }
1178
1179 for (; spte < epte; spte++) {
1180 if (!(*spte & INTEL_PTE_VALID))
1181 continue;
1182
1183 if (prot & VM_PROT_WRITE)
1184 pmap_update_pte(spte, *spte,
1185 *spte | INTEL_PTE_WRITE);
1186 else
1187 pmap_update_pte(spte, *spte,
1188 *spte & ~INTEL_PTE_WRITE);
1189
1190 if (set_NX)
1191 pmap_update_pte(spte, *spte,
1192 *spte | INTEL_PTE_NX);
1193 else
1194 pmap_update_pte(spte, *spte,
1195 *spte & ~INTEL_PTE_NX);
1196
1197 num_found++;
1198 }
1199 }
1200 sva = lva;
1201 }
1202 if (num_found)
1203 PMAP_UPDATE_TLBS(map, orig_sva, eva);
1204
1205 PMAP_UNLOCK(map);
1206
1207 PMAP_TRACE(PMAP_CODE(PMAP__PROTECT) | DBG_FUNC_END,
1208 0, 0, 0, 0, 0);
1209
1210 }
1211
1212 /* Map a (possibly) autogenned block */
1213 void
1214 pmap_map_block(
1215 pmap_t pmap,
1216 addr64_t va,
1217 ppnum_t pa,
1218 uint32_t size,
1219 vm_prot_t prot,
1220 int attr,
1221 __unused unsigned int flags)
1222 {
1223 uint32_t page;
1224 int cur_page_size;
1225
1226 if (attr & VM_MEM_SUPERPAGE)
1227 cur_page_size = SUPERPAGE_SIZE;
1228 else
1229 cur_page_size = PAGE_SIZE;
1230
1231 for (page = 0; page < size; page+=cur_page_size/PAGE_SIZE) {
1232 pmap_enter(pmap, va, pa, prot, attr, TRUE);
1233 va += cur_page_size;
1234 pa+=cur_page_size/PAGE_SIZE;
1235 }
1236 }
1237
1238
1239 void
1240 pmap_expand_pml4(
1241 pmap_t map,
1242 vm_map_offset_t vaddr)
1243 {
1244 vm_page_t m;
1245 pmap_paddr_t pa;
1246 uint64_t i;
1247 ppnum_t pn;
1248 pml4_entry_t *pml4p;
1249
1250 DBG("pmap_expand_pml4(%p,%p)\n", map, (void *)vaddr);
1251
1252 /*
1253 * Allocate a VM page for the pml4 page
1254 */
1255 while ((m = vm_page_grab()) == VM_PAGE_NULL)
1256 VM_PAGE_WAIT();
1257
1258 /*
1259 * put the page into the pmap's obj list so it
1260 * can be found later.
1261 */
1262 pn = m->phys_page;
1263 pa = i386_ptob(pn);
1264 i = pml4idx(map, vaddr);
1265
1266 /*
1267 * Zero the page.
1268 */
1269 pmap_zero_page(pn);
1270
1271 vm_page_lockspin_queues();
1272 vm_page_wire(m);
1273 vm_page_unlock_queues();
1274
1275 OSAddAtomic(1, &inuse_ptepages_count);
1276 OSAddAtomic64(1, &alloc_ptepages_count);
1277 PMAP_ZINFO_PALLOC(PAGE_SIZE);
1278
1279 /* Take the oject lock (mutex) before the PMAP_LOCK (spinlock) */
1280 vm_object_lock(map->pm_obj_pml4);
1281
1282 PMAP_LOCK(map);
1283 /*
1284 * See if someone else expanded us first
1285 */
1286 if (pmap64_pdpt(map, vaddr) != PDPT_ENTRY_NULL) {
1287 PMAP_UNLOCK(map);
1288 vm_object_unlock(map->pm_obj_pml4);
1289
1290 VM_PAGE_FREE(m);
1291
1292 OSAddAtomic(-1, &inuse_ptepages_count);
1293 PMAP_ZINFO_PFREE(PAGE_SIZE);
1294 return;
1295 }
1296
1297 #if 0 /* DEBUG */
1298 if (0 != vm_page_lookup(map->pm_obj_pml4, (vm_object_offset_t)i)) {
1299 panic("pmap_expand_pml4: obj not empty, pmap %p pm_obj %p vaddr 0x%llx i 0x%llx\n",
1300 map, map->pm_obj_pml4, vaddr, i);
1301 }
1302 #endif
1303 vm_page_insert(m, map->pm_obj_pml4, (vm_object_offset_t)i);
1304 vm_object_unlock(map->pm_obj_pml4);
1305
1306 /*
1307 * Set the page directory entry for this page table.
1308 */
1309 pml4p = pmap64_pml4(map, vaddr); /* refetch under lock */
1310
1311 pmap_store_pte(pml4p, pa_to_pte(pa)
1312 | INTEL_PTE_VALID
1313 | INTEL_PTE_USER
1314 | INTEL_PTE_WRITE);
1315
1316 PMAP_UNLOCK(map);
1317
1318 return;
1319 }
1320
1321 void
1322 pmap_expand_pdpt(
1323 pmap_t map,
1324 vm_map_offset_t vaddr)
1325 {
1326 vm_page_t m;
1327 pmap_paddr_t pa;
1328 uint64_t i;
1329 ppnum_t pn;
1330 pdpt_entry_t *pdptp;
1331
1332 DBG("pmap_expand_pdpt(%p,%p)\n", map, (void *)vaddr);
1333
1334 while ((pdptp = pmap64_pdpt(map, vaddr)) == PDPT_ENTRY_NULL) {
1335 pmap_expand_pml4(map, vaddr);
1336 }
1337
1338 /*
1339 * Allocate a VM page for the pdpt page
1340 */
1341 while ((m = vm_page_grab()) == VM_PAGE_NULL)
1342 VM_PAGE_WAIT();
1343
1344 /*
1345 * put the page into the pmap's obj list so it
1346 * can be found later.
1347 */
1348 pn = m->phys_page;
1349 pa = i386_ptob(pn);
1350 i = pdptidx(map, vaddr);
1351
1352 /*
1353 * Zero the page.
1354 */
1355 pmap_zero_page(pn);
1356
1357 vm_page_lockspin_queues();
1358 vm_page_wire(m);
1359 vm_page_unlock_queues();
1360
1361 OSAddAtomic(1, &inuse_ptepages_count);
1362 OSAddAtomic64(1, &alloc_ptepages_count);
1363 PMAP_ZINFO_PALLOC(PAGE_SIZE);
1364
1365 /* Take the oject lock (mutex) before the PMAP_LOCK (spinlock) */
1366 vm_object_lock(map->pm_obj_pdpt);
1367
1368 PMAP_LOCK(map);
1369 /*
1370 * See if someone else expanded us first
1371 */
1372 if (pmap64_pde(map, vaddr) != PD_ENTRY_NULL) {
1373 PMAP_UNLOCK(map);
1374 vm_object_unlock(map->pm_obj_pdpt);
1375
1376 VM_PAGE_FREE(m);
1377
1378 OSAddAtomic(-1, &inuse_ptepages_count);
1379 PMAP_ZINFO_PFREE(PAGE_SIZE);
1380 return;
1381 }
1382
1383 #if 0 /* DEBUG */
1384 if (0 != vm_page_lookup(map->pm_obj_pdpt, (vm_object_offset_t)i)) {
1385 panic("pmap_expand_pdpt: obj not empty, pmap %p pm_obj %p vaddr 0x%llx i 0x%llx\n",
1386 map, map->pm_obj_pdpt, vaddr, i);
1387 }
1388 #endif
1389 vm_page_insert(m, map->pm_obj_pdpt, (vm_object_offset_t)i);
1390 vm_object_unlock(map->pm_obj_pdpt);
1391
1392 /*
1393 * Set the page directory entry for this page table.
1394 */
1395 pdptp = pmap64_pdpt(map, vaddr); /* refetch under lock */
1396
1397 pmap_store_pte(pdptp, pa_to_pte(pa)
1398 | INTEL_PTE_VALID
1399 | INTEL_PTE_USER
1400 | INTEL_PTE_WRITE);
1401
1402 PMAP_UNLOCK(map);
1403
1404 return;
1405
1406 }
1407
1408
1409
1410 /*
1411 * Routine: pmap_expand
1412 *
1413 * Expands a pmap to be able to map the specified virtual address.
1414 *
1415 * Allocates new virtual memory for the P0 or P1 portion of the
1416 * pmap, then re-maps the physical pages that were in the old
1417 * pmap to be in the new pmap.
1418 *
1419 * Must be called with the pmap system and the pmap unlocked,
1420 * since these must be unlocked to use vm_allocate or vm_deallocate.
1421 * Thus it must be called in a loop that checks whether the map
1422 * has been expanded enough.
1423 * (We won't loop forever, since page tables aren't shrunk.)
1424 */
1425 void
1426 pmap_expand(
1427 pmap_t map,
1428 vm_map_offset_t vaddr)
1429 {
1430 pt_entry_t *pdp;
1431 register vm_page_t m;
1432 register pmap_paddr_t pa;
1433 uint64_t i;
1434 ppnum_t pn;
1435
1436
1437 /*
1438 * For the kernel, the virtual address must be in or above the basement
1439 * which is for kexts and is in the 512GB immediately below the kernel..
1440 * XXX - should use VM_MIN_KERNEL_AND_KEXT_ADDRESS not KERNEL_BASEMENT
1441 */
1442 if (map == kernel_pmap &&
1443 !(vaddr >= KERNEL_BASEMENT && vaddr <= VM_MAX_KERNEL_ADDRESS))
1444 panic("pmap_expand: bad vaddr 0x%llx for kernel pmap", vaddr);
1445
1446
1447 while ((pdp = pmap64_pde(map, vaddr)) == PD_ENTRY_NULL) {
1448 /* need room for another pde entry */
1449 pmap_expand_pdpt(map, vaddr);
1450 }
1451
1452 /*
1453 * Allocate a VM page for the pde entries.
1454 */
1455 while ((m = vm_page_grab()) == VM_PAGE_NULL)
1456 VM_PAGE_WAIT();
1457
1458 /*
1459 * put the page into the pmap's obj list so it
1460 * can be found later.
1461 */
1462 pn = m->phys_page;
1463 pa = i386_ptob(pn);
1464 i = pdeidx(map, vaddr);
1465
1466 /*
1467 * Zero the page.
1468 */
1469 pmap_zero_page(pn);
1470
1471 vm_page_lockspin_queues();
1472 vm_page_wire(m);
1473 vm_page_unlock_queues();
1474
1475 OSAddAtomic(1, &inuse_ptepages_count);
1476 OSAddAtomic64(1, &alloc_ptepages_count);
1477 PMAP_ZINFO_PALLOC(PAGE_SIZE);
1478
1479 /* Take the oject lock (mutex) before the PMAP_LOCK (spinlock) */
1480 vm_object_lock(map->pm_obj);
1481
1482 PMAP_LOCK(map);
1483
1484 /*
1485 * See if someone else expanded us first
1486 */
1487 if (pmap_pte(map, vaddr) != PT_ENTRY_NULL) {
1488 PMAP_UNLOCK(map);
1489 vm_object_unlock(map->pm_obj);
1490
1491 VM_PAGE_FREE(m);
1492
1493 OSAddAtomic(-1, &inuse_ptepages_count);
1494 PMAP_ZINFO_PFREE(PAGE_SIZE);
1495 return;
1496 }
1497
1498 #if 0 /* DEBUG */
1499 if (0 != vm_page_lookup(map->pm_obj, (vm_object_offset_t)i)) {
1500 panic("pmap_expand: obj not empty, pmap 0x%x pm_obj 0x%x vaddr 0x%llx i 0x%llx\n",
1501 map, map->pm_obj, vaddr, i);
1502 }
1503 #endif
1504 vm_page_insert(m, map->pm_obj, (vm_object_offset_t)i);
1505 vm_object_unlock(map->pm_obj);
1506
1507 /*
1508 * Set the page directory entry for this page table.
1509 */
1510 pdp = pmap_pde(map, vaddr);
1511 pmap_store_pte(pdp, pa_to_pte(pa)
1512 | INTEL_PTE_VALID
1513 | INTEL_PTE_USER
1514 | INTEL_PTE_WRITE);
1515
1516 PMAP_UNLOCK(map);
1517
1518 return;
1519 }
1520
1521 /* On K64 machines with more than 32GB of memory, pmap_steal_memory
1522 * will allocate past the 1GB of pre-expanded virtual kernel area. This
1523 * function allocates all the page tables using memory from the same pool
1524 * that pmap_steal_memory uses, rather than calling vm_page_grab (which
1525 * isn't available yet). */
1526 void
1527 pmap_pre_expand(pmap_t pmap, vm_map_offset_t vaddr)
1528 {
1529 ppnum_t pn;
1530 pt_entry_t *pte;
1531
1532 PMAP_LOCK(pmap);
1533
1534 if(pmap64_pdpt(pmap, vaddr) == PDPT_ENTRY_NULL) {
1535 if (!pmap_next_page_hi(&pn))
1536 panic("pmap_pre_expand");
1537
1538 pmap_zero_page(pn);
1539
1540 pte = pmap64_pml4(pmap, vaddr);
1541
1542 pmap_store_pte(pte, pa_to_pte(i386_ptob(pn))
1543 | INTEL_PTE_VALID
1544 | INTEL_PTE_USER
1545 | INTEL_PTE_WRITE);
1546 }
1547
1548 if(pmap64_pde(pmap, vaddr) == PD_ENTRY_NULL) {
1549 if (!pmap_next_page_hi(&pn))
1550 panic("pmap_pre_expand");
1551
1552 pmap_zero_page(pn);
1553
1554 pte = pmap64_pdpt(pmap, vaddr);
1555
1556 pmap_store_pte(pte, pa_to_pte(i386_ptob(pn))
1557 | INTEL_PTE_VALID
1558 | INTEL_PTE_USER
1559 | INTEL_PTE_WRITE);
1560 }
1561
1562 if(pmap_pte(pmap, vaddr) == PT_ENTRY_NULL) {
1563 if (!pmap_next_page_hi(&pn))
1564 panic("pmap_pre_expand");
1565
1566 pmap_zero_page(pn);
1567
1568 pte = pmap64_pde(pmap, vaddr);
1569
1570 pmap_store_pte(pte, pa_to_pte(i386_ptob(pn))
1571 | INTEL_PTE_VALID
1572 | INTEL_PTE_USER
1573 | INTEL_PTE_WRITE);
1574 }
1575
1576 PMAP_UNLOCK(pmap);
1577 }
1578
1579 /*
1580 * pmap_sync_page_data_phys(ppnum_t pa)
1581 *
1582 * Invalidates all of the instruction cache on a physical page and
1583 * pushes any dirty data from the data cache for the same physical page
1584 * Not required in i386.
1585 */
1586 void
1587 pmap_sync_page_data_phys(__unused ppnum_t pa)
1588 {
1589 return;
1590 }
1591
1592 /*
1593 * pmap_sync_page_attributes_phys(ppnum_t pa)
1594 *
1595 * Write back and invalidate all cachelines on a physical page.
1596 */
1597 void
1598 pmap_sync_page_attributes_phys(ppnum_t pa)
1599 {
1600 cache_flush_page_phys(pa);
1601 }
1602
1603
1604
1605 #ifdef CURRENTLY_UNUSED_AND_UNTESTED
1606
1607 int collect_ref;
1608 int collect_unref;
1609
1610 /*
1611 * Routine: pmap_collect
1612 * Function:
1613 * Garbage collects the physical map system for
1614 * pages which are no longer used.
1615 * Success need not be guaranteed -- that is, there
1616 * may well be pages which are not referenced, but
1617 * others may be collected.
1618 * Usage:
1619 * Called by the pageout daemon when pages are scarce.
1620 */
1621 void
1622 pmap_collect(
1623 pmap_t p)
1624 {
1625 register pt_entry_t *pdp, *ptp;
1626 pt_entry_t *eptp;
1627 int wired;
1628
1629 if (p == PMAP_NULL)
1630 return;
1631
1632 if (p == kernel_pmap)
1633 return;
1634
1635 /*
1636 * Garbage collect map.
1637 */
1638 PMAP_LOCK(p);
1639
1640 for (pdp = (pt_entry_t *)p->dirbase;
1641 pdp < (pt_entry_t *)&p->dirbase[(UMAXPTDI+1)];
1642 pdp++)
1643 {
1644 if (*pdp & INTEL_PTE_VALID) {
1645 if(*pdp & INTEL_PTE_REF) {
1646 pmap_store_pte(pdp, *pdp & ~INTEL_PTE_REF);
1647 collect_ref++;
1648 } else {
1649 collect_unref++;
1650 ptp = pmap_pte(p, pdetova(pdp - (pt_entry_t *)p->dirbase));
1651 eptp = ptp + NPTEPG;
1652
1653 /*
1654 * If the pte page has any wired mappings, we cannot
1655 * free it.
1656 */
1657 wired = 0;
1658 {
1659 register pt_entry_t *ptep;
1660 for (ptep = ptp; ptep < eptp; ptep++) {
1661 if (iswired(*ptep)) {
1662 wired = 1;
1663 break;
1664 }
1665 }
1666 }
1667 if (!wired) {
1668 /*
1669 * Remove the virtual addresses mapped by this pte page.
1670 */
1671 pmap_remove_range(p,
1672 pdetova(pdp - (pt_entry_t *)p->dirbase),
1673 ptp,
1674 eptp);
1675
1676 /*
1677 * Invalidate the page directory pointer.
1678 */
1679 pmap_store_pte(pdp, 0x0);
1680
1681 PMAP_UNLOCK(p);
1682
1683 /*
1684 * And free the pte page itself.
1685 */
1686 {
1687 register vm_page_t m;
1688
1689 vm_object_lock(p->pm_obj);
1690
1691 m = vm_page_lookup(p->pm_obj,(vm_object_offset_t)(pdp - (pt_entry_t *)&p->dirbase[0]));
1692 if (m == VM_PAGE_NULL)
1693 panic("pmap_collect: pte page not in object");
1694
1695 vm_object_unlock(p->pm_obj);
1696
1697 VM_PAGE_FREE(m);
1698
1699 OSAddAtomic(-1, &inuse_ptepages_count);
1700 PMAP_ZINFO_PFREE(PAGE_SIZE);
1701 }
1702
1703 PMAP_LOCK(p);
1704 }
1705 }
1706 }
1707 }
1708
1709 PMAP_UPDATE_TLBS(p, 0x0, 0xFFFFFFFFFFFFF000ULL);
1710 PMAP_UNLOCK(p);
1711 return;
1712
1713 }
1714 #endif
1715
1716
1717 void
1718 pmap_copy_page(ppnum_t src, ppnum_t dst)
1719 {
1720 bcopy_phys((addr64_t)i386_ptob(src),
1721 (addr64_t)i386_ptob(dst),
1722 PAGE_SIZE);
1723 }
1724
1725
1726 /*
1727 * Routine: pmap_pageable
1728 * Function:
1729 * Make the specified pages (by pmap, offset)
1730 * pageable (or not) as requested.
1731 *
1732 * A page which is not pageable may not take
1733 * a fault; therefore, its page table entry
1734 * must remain valid for the duration.
1735 *
1736 * This routine is merely advisory; pmap_enter
1737 * will specify that these pages are to be wired
1738 * down (or not) as appropriate.
1739 */
1740 void
1741 pmap_pageable(
1742 __unused pmap_t pmap,
1743 __unused vm_map_offset_t start_addr,
1744 __unused vm_map_offset_t end_addr,
1745 __unused boolean_t pageable)
1746 {
1747 #ifdef lint
1748 pmap++; start_addr++; end_addr++; pageable++;
1749 #endif /* lint */
1750 }
1751
1752
1753 void
1754 invalidate_icache(__unused vm_offset_t addr,
1755 __unused unsigned cnt,
1756 __unused int phys)
1757 {
1758 return;
1759 }
1760
1761 void
1762 flush_dcache(__unused vm_offset_t addr,
1763 __unused unsigned count,
1764 __unused int phys)
1765 {
1766 return;
1767 }
1768
1769 #if CONFIG_DTRACE
1770 /*
1771 * Constrain DTrace copyin/copyout actions
1772 */
1773 extern kern_return_t dtrace_copyio_preflight(addr64_t);
1774 extern kern_return_t dtrace_copyio_postflight(addr64_t);
1775
1776 kern_return_t dtrace_copyio_preflight(__unused addr64_t va)
1777 {
1778 thread_t thread = current_thread();
1779 uint64_t ccr3;
1780
1781 if (current_map() == kernel_map)
1782 return KERN_FAILURE;
1783 else if (((ccr3 = get_cr3_base()) != thread->map->pmap->pm_cr3) && (no_shared_cr3 == FALSE))
1784 return KERN_FAILURE;
1785 else if (no_shared_cr3 && (ccr3 != kernel_pmap->pm_cr3))
1786 return KERN_FAILURE;
1787 else if (thread->machine.specFlags & CopyIOActive)
1788 return KERN_FAILURE;
1789 else
1790 return KERN_SUCCESS;
1791 }
1792
1793 kern_return_t dtrace_copyio_postflight(__unused addr64_t va)
1794 {
1795 return KERN_SUCCESS;
1796 }
1797 #endif /* CONFIG_DTRACE */
1798
1799 #include <mach_vm_debug.h>
1800 #if MACH_VM_DEBUG
1801 #include <vm/vm_debug.h>
1802
1803 int
1804 pmap_list_resident_pages(
1805 __unused pmap_t pmap,
1806 __unused vm_offset_t *listp,
1807 __unused int space)
1808 {
1809 return 0;
1810 }
1811 #endif /* MACH_VM_DEBUG */
1812
1813
1814
1815 /* temporary workaround */
1816 boolean_t
1817 coredumpok(__unused vm_map_t map, __unused vm_offset_t va)
1818 {
1819 #if 0
1820 pt_entry_t *ptep;
1821
1822 ptep = pmap_pte(map->pmap, va);
1823 if (0 == ptep)
1824 return FALSE;
1825 return ((*ptep & (INTEL_PTE_NCACHE | INTEL_PTE_WIRED)) != (INTEL_PTE_NCACHE | INTEL_PTE_WIRED));
1826 #else
1827 return TRUE;
1828 #endif
1829 }
1830
1831
1832 boolean_t
1833 phys_page_exists(ppnum_t pn)
1834 {
1835 assert(pn != vm_page_fictitious_addr);
1836
1837 if (!pmap_initialized)
1838 return TRUE;
1839
1840 if (pn == vm_page_guard_addr)
1841 return FALSE;
1842
1843 if (!IS_MANAGED_PAGE(ppn_to_pai(pn)))
1844 return FALSE;
1845
1846 return TRUE;
1847 }
1848
1849
1850
1851 void
1852 pmap_switch(pmap_t tpmap)
1853 {
1854 spl_t s;
1855
1856 s = splhigh(); /* Make sure interruptions are disabled */
1857 set_dirbase(tpmap, current_thread());
1858 splx(s);
1859 }
1860
1861
1862 /*
1863 * disable no-execute capability on
1864 * the specified pmap
1865 */
1866 void
1867 pmap_disable_NX(pmap_t pmap)
1868 {
1869 pmap->nx_enabled = 0;
1870 }
1871
1872 void
1873 pt_fake_zone_init(int zone_index)
1874 {
1875 pt_fake_zone_index = zone_index;
1876 }
1877
1878 void
1879 pt_fake_zone_info(
1880 int *count,
1881 vm_size_t *cur_size,
1882 vm_size_t *max_size,
1883 vm_size_t *elem_size,
1884 vm_size_t *alloc_size,
1885 uint64_t *sum_size,
1886 int *collectable,
1887 int *exhaustable,
1888 int *caller_acct)
1889 {
1890 *count = inuse_ptepages_count;
1891 *cur_size = PAGE_SIZE * inuse_ptepages_count;
1892 *max_size = PAGE_SIZE * (inuse_ptepages_count +
1893 vm_page_inactive_count +
1894 vm_page_active_count +
1895 vm_page_free_count);
1896 *elem_size = PAGE_SIZE;
1897 *alloc_size = PAGE_SIZE;
1898 *sum_size = alloc_ptepages_count * PAGE_SIZE;
1899
1900 *collectable = 1;
1901 *exhaustable = 0;
1902 *caller_acct = 1;
1903 }
1904
1905 static inline void
1906 pmap_cpuset_NMIPI(cpu_set cpu_mask) {
1907 unsigned int cpu, cpu_bit;
1908 uint64_t deadline;
1909
1910 for (cpu = 0, cpu_bit = 1; cpu < real_ncpus; cpu++, cpu_bit <<= 1) {
1911 if (cpu_mask & cpu_bit)
1912 cpu_NMI_interrupt(cpu);
1913 }
1914 deadline = mach_absolute_time() + (LockTimeOut);
1915 while (mach_absolute_time() < deadline)
1916 cpu_pause();
1917 }
1918
1919 /*
1920 * Called with pmap locked, we:
1921 * - scan through per-cpu data to see which other cpus need to flush
1922 * - send an IPI to each non-idle cpu to be flushed
1923 * - wait for all to signal back that they are inactive or we see that
1924 * they are at a safe point (idle).
1925 * - flush the local tlb if active for this pmap
1926 * - return ... the caller will unlock the pmap
1927 */
1928
1929 void
1930 pmap_flush_tlbs(pmap_t pmap, vm_map_offset_t startv, vm_map_offset_t endv)
1931 {
1932 unsigned int cpu;
1933 unsigned int cpu_bit;
1934 cpu_set cpus_to_signal;
1935 unsigned int my_cpu = cpu_number();
1936 pmap_paddr_t pmap_cr3 = pmap->pm_cr3;
1937 boolean_t flush_self = FALSE;
1938 uint64_t deadline;
1939 boolean_t pmap_is_shared = (pmap->pm_shared || (pmap == kernel_pmap));
1940
1941 assert((processor_avail_count < 2) ||
1942 (ml_get_interrupts_enabled() && get_preemption_level() != 0));
1943
1944 /*
1945 * Scan other cpus for matching active or task CR3.
1946 * For idle cpus (with no active map) we mark them invalid but
1947 * don't signal -- they'll check as they go busy.
1948 */
1949 cpus_to_signal = 0;
1950
1951 if (pmap_pcid_ncpus) {
1952 pmap_pcid_invalidate_all_cpus(pmap);
1953 __asm__ volatile("mfence":::"memory");
1954 }
1955
1956 for (cpu = 0, cpu_bit = 1; cpu < real_ncpus; cpu++, cpu_bit <<= 1) {
1957 if (!cpu_datap(cpu)->cpu_running)
1958 continue;
1959 uint64_t cpu_active_cr3 = CPU_GET_ACTIVE_CR3(cpu);
1960 uint64_t cpu_task_cr3 = CPU_GET_TASK_CR3(cpu);
1961
1962 if ((pmap_cr3 == cpu_task_cr3) ||
1963 (pmap_cr3 == cpu_active_cr3) ||
1964 (pmap_is_shared)) {
1965 if (cpu == my_cpu) {
1966 flush_self = TRUE;
1967 continue;
1968 }
1969 if (pmap_pcid_ncpus && pmap_is_shared)
1970 cpu_datap(cpu)->cpu_tlb_invalid_global = TRUE;
1971 else
1972 cpu_datap(cpu)->cpu_tlb_invalid_local = TRUE;
1973 __asm__ volatile("mfence":::"memory");
1974
1975 /*
1976 * We don't need to signal processors which will flush
1977 * lazily at the idle state or kernel boundary.
1978 * For example, if we're invalidating the kernel pmap,
1979 * processors currently in userspace don't need to flush
1980 * their TLBs until the next time they enter the kernel.
1981 * Alterations to the address space of a task active
1982 * on a remote processor result in a signal, to
1983 * account for copy operations. (There may be room
1984 * for optimization in such cases).
1985 * The order of the loads below with respect
1986 * to the store to the "cpu_tlb_invalid" field above
1987 * is important--hence the barrier.
1988 */
1989 if (CPU_CR3_IS_ACTIVE(cpu) &&
1990 (pmap_cr3 == CPU_GET_ACTIVE_CR3(cpu) ||
1991 pmap->pm_shared ||
1992 (pmap_cr3 == CPU_GET_TASK_CR3(cpu)))) {
1993 cpus_to_signal |= cpu_bit;
1994 i386_signal_cpu(cpu, MP_TLB_FLUSH, ASYNC);
1995 }
1996 }
1997 }
1998
1999 PMAP_TRACE_CONSTANT(PMAP_CODE(PMAP__FLUSH_TLBS) | DBG_FUNC_START,
2000 pmap, cpus_to_signal, flush_self, startv, endv);
2001
2002 /*
2003 * Flush local tlb if required.
2004 * Do this now to overlap with other processors responding.
2005 */
2006 if (flush_self) {
2007 if (pmap_pcid_ncpus) {
2008 pmap_pcid_validate_cpu(pmap, my_cpu);
2009 if (pmap_is_shared)
2010 tlb_flush_global();
2011 else
2012 flush_tlb_raw();
2013 }
2014 else
2015 flush_tlb_raw();
2016 }
2017
2018 if (cpus_to_signal) {
2019 cpu_set cpus_to_respond = cpus_to_signal;
2020
2021 deadline = mach_absolute_time() + LockTimeOut;
2022 /*
2023 * Wait for those other cpus to acknowledge
2024 */
2025 while (cpus_to_respond != 0) {
2026 long orig_acks = 0;
2027
2028 for (cpu = 0, cpu_bit = 1; cpu < real_ncpus; cpu++, cpu_bit <<= 1) {
2029 /* Consider checking local/global invalidity
2030 * as appropriate in the PCID case.
2031 */
2032 if ((cpus_to_respond & cpu_bit) != 0) {
2033 if (!cpu_datap(cpu)->cpu_running ||
2034 cpu_datap(cpu)->cpu_tlb_invalid == FALSE ||
2035 !CPU_CR3_IS_ACTIVE(cpu)) {
2036 cpus_to_respond &= ~cpu_bit;
2037 }
2038 cpu_pause();
2039 }
2040 if (cpus_to_respond == 0)
2041 break;
2042 }
2043 if (cpus_to_respond && (mach_absolute_time() > deadline)) {
2044 if (machine_timeout_suspended())
2045 continue;
2046 pmap_tlb_flush_timeout = TRUE;
2047 orig_acks = NMIPI_acks;
2048 pmap_cpuset_NMIPI(cpus_to_respond);
2049
2050 panic("TLB invalidation IPI timeout: "
2051 "CPU(s) failed to respond to interrupts, unresponsive CPU bitmap: 0x%lx, NMIPI acks: orig: 0x%lx, now: 0x%lx",
2052 cpus_to_respond, orig_acks, NMIPI_acks);
2053 }
2054 }
2055 }
2056
2057 PMAP_TRACE_CONSTANT(PMAP_CODE(PMAP__FLUSH_TLBS) | DBG_FUNC_END,
2058 pmap, cpus_to_signal, startv, endv, 0);
2059 }
2060
2061 void
2062 process_pmap_updates(void)
2063 {
2064 int ccpu = cpu_number();
2065 pmap_assert(ml_get_interrupts_enabled() == 0 || get_preemption_level() != 0);
2066 if (pmap_pcid_ncpus) {
2067 pmap_pcid_validate_current();
2068 if (cpu_datap(ccpu)->cpu_tlb_invalid_global) {
2069 cpu_datap(ccpu)->cpu_tlb_invalid = FALSE;
2070 tlb_flush_global();
2071 }
2072 else {
2073 cpu_datap(ccpu)->cpu_tlb_invalid_local = FALSE;
2074 flush_tlb_raw();
2075 }
2076 }
2077 else {
2078 current_cpu_datap()->cpu_tlb_invalid = FALSE;
2079 flush_tlb_raw();
2080 }
2081
2082 __asm__ volatile("mfence");
2083 }
2084
2085 void
2086 pmap_update_interrupt(void)
2087 {
2088 PMAP_TRACE(PMAP_CODE(PMAP__UPDATE_INTERRUPT) | DBG_FUNC_START,
2089 0, 0, 0, 0, 0);
2090
2091 process_pmap_updates();
2092
2093 PMAP_TRACE(PMAP_CODE(PMAP__UPDATE_INTERRUPT) | DBG_FUNC_END,
2094 0, 0, 0, 0, 0);
2095 }