2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
4 * @APPLE_LICENSE_HEADER_START@
6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
23 * @APPLE_LICENSE_HEADER_END@
29 * Mach Operating System
30 * Copyright (c) 1991,1990 Carnegie Mellon University
31 * All Rights Reserved.
33 * Permission to use, copy, modify and distribute this software and its
34 * documentation is hereby granted, provided that both the copyright
35 * notice and this permission notice appear in all copies of the
36 * software, derivative works or modified versions, and any portions
37 * thereof, and that both notices appear in supporting documentation.
39 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
40 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
41 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
43 * Carnegie Mellon requests users of this software to return to
45 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
46 * School of Computer Science
47 * Carnegie Mellon University
48 * Pittsburgh PA 15213-3890
50 * any improvements or extensions that they make and grant Carnegie Mellon
51 * the rights to redistribute these changes.
60 * Interrupt descriptor table and code vectors for it.
62 #define IDT_BASE_ENTRY(vec,seg,type) \
70 #define IDT_ENTRY(vec,type) IDT_BASE_ENTRY(vec,KERNEL_CS,type)
73 * No error code. Clear error code and push trap number.
75 #define EXCEPTION(n,name) \
76 IDT_ENTRY(EXT(name),K_TRAP_GATE);\
83 * Interrupt from user. Clear error code and push trap number.
85 #define EXCEP_USR(n,name) \
86 IDT_ENTRY(EXT(name),U_TRAP_GATE);\
93 * Special interrupt code.
95 #define EXCEP_SPC(n,name) \
96 IDT_ENTRY(EXT(name),K_TRAP_GATE)
99 * Special interrupt code from user.
101 #define EXCEP_SPC_USR(n,name) \
102 IDT_ENTRY(EXT(name),U_TRAP_GATE)
105 * Extra-special interrupt code. Note that no offset may be
106 * specified in a task gate descriptor, so name is ignored.
108 #define EXCEP_TASK(n,name) \
109 IDT_BASE_ENTRY(0,DEBUG_TSS,K_TASK_GATE)
112 * Error code has been pushed. Push trap number.
114 #define EXCEP_ERR(n,name) \
115 IDT_ENTRY(EXT(name),K_TRAP_GATE);\
123 #define INTERRUPT(n) \
124 IDT_ENTRY(0f,K_INTR_GATE) ;\
134 EXCEPTION(0x00,t_zero_div)
135 EXCEP_SPC(0x01,t_debug)
136 INTERRUPT(0x02) /* NMI */
137 EXCEP_USR(0x03,t_int3)
138 EXCEP_USR(0x04,t_into)
139 EXCEP_USR(0x05,t_bounds)
140 EXCEPTION(0x06,t_invop)
141 EXCEPTION(0x07,t_nofpu)
143 EXCEP_TASK(0x08,db_task_dbl_fault)
145 EXCEPTION(0x08,a_dbl_fault)
147 EXCEPTION(0x09,a_fpu_over)
148 EXCEPTION(0x0a,a_inv_tss)
149 EXCEP_SPC(0x0b,t_segnp)
151 EXCEP_TASK(0x0c,db_task_stk_fault)
153 EXCEP_ERR(0x0c,t_stack_fault)
155 EXCEP_SPC(0x0d,t_gen_prot)
156 EXCEP_SPC(0x0e,t_page_fault)
157 EXCEPTION(0x0f,t_trap_0f)
158 EXCEPTION(0x10,t_fpu_err)
159 EXCEPTION(0x11,t_trap_11)
160 EXCEPTION(0x12,t_trap_12)
161 EXCEPTION(0x13,t_trap_13)
162 EXCEPTION(0x14,t_trap_14)
163 EXCEPTION(0x15,t_trap_15)
164 EXCEPTION(0x16,t_trap_16)
165 EXCEPTION(0x17,t_trap_17)
166 EXCEPTION(0x18,t_trap_18)
167 EXCEPTION(0x19,t_trap_19)
168 EXCEPTION(0x1a,t_trap_1a)
169 EXCEPTION(0x1b,t_trap_1b)
170 EXCEPTION(0x1c,t_trap_1c)
171 EXCEPTION(0x1d,t_trap_1d)
172 EXCEPTION(0x1e,t_trap_1e)
173 EXCEPTION(0x1f,t_trap_1f)
277 EXCEP_SPC_USR(0x80,syscall_int80)
411 EXCEPTION(0xff,t_preempt)