osfmk/i386/cpuid.h

   1 /*
   2  * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 /*
  29  * @OSF_COPYRIGHT@
  30  */
  31
  32 /*
  33  * x86 CPU identification
  34  *
  35  */
  36
  37 #ifndef _MACHINE_CPUID_H_
  38 #define _MACHINE_CPUID_H_
  39
  40 #include <sys/appleapiopts.h>
  41
  42 #ifdef __APPLE_API_PRIVATE
  43
  44 #define CPUID_VID_INTEL         "GenuineIntel"
  45 #define CPUID_VID_AMD           "AuthenticAMD"
  46
  47 #define CPUID_STRING_UNKNOWN    "Unknown CPU Typ"
  48
  49 #define _Bit(n)                 (1ULL << n)
  50 #define _HBit(n)                (1ULL << ((n)+32))
  51
  52 /*
  53  * The CPUID_FEATURE_XXX values define 64-bit values
  54  * returned in %ecx:%edx to a CPUID request with %eax of 1:
  55  */
  56 #define CPUID_FEATURE_FPU     _Bit(0)   /* Floating point unit on-chip */
  57 #define CPUID_FEATURE_VME     _Bit(1)   /* Virtual Mode Extension */
  58 #define CPUID_FEATURE_DE      _Bit(2)   /* Debugging Extension */
  59 #define CPUID_FEATURE_PSE     _Bit(3)   /* Page Size Extension */
  60 #define CPUID_FEATURE_TSC     _Bit(4)   /* Time Stamp Counter */
  61 #define CPUID_FEATURE_MSR     _Bit(5)   /* Model Specific Registers */
  62 #define CPUID_FEATURE_PAE     _Bit(6)   /* Physical Address Extension */
  63 #define CPUID_FEATURE_MCE     _Bit(7)   /* Machine Check Exception */
  64 #define CPUID_FEATURE_CX8     _Bit(8)   /* CMPXCHG8B */
  65 #define CPUID_FEATURE_APIC    _Bit(9)   /* On-chip APIC */
  66 #define CPUID_FEATURE_SEP     _Bit(11)  /* Fast System Call */
  67 #define CPUID_FEATURE_MTRR    _Bit(12)  /* Memory Type Range Register */
  68 #define CPUID_FEATURE_PGE     _Bit(13)  /* Page Global Enable */
  69 #define CPUID_FEATURE_MCA     _Bit(14)  /* Machine Check Architecture */
  70 #define CPUID_FEATURE_CMOV    _Bit(15)  /* Conditional Move Instruction */
  71 #define CPUID_FEATURE_PAT     _Bit(16)  /* Page Attribute Table */
  72 #define CPUID_FEATURE_PSE36   _Bit(17)  /* 36-bit Page Size Extension */
  73 #define CPUID_FEATURE_PSN     _Bit(18)  /* Processor Serial Number */
  74 #define CPUID_FEATURE_CLFSH   _Bit(19)  /* CLFLUSH Instruction supported */
  75 #define CPUID_FEATURE_DS      _Bit(21)  /* Debug Store */
  76 #define CPUID_FEATURE_ACPI    _Bit(22)  /* Thermal monitor and Clock Ctrl */
  77 #define CPUID_FEATURE_MMX     _Bit(23)  /* MMX supported */
  78 #define CPUID_FEATURE_FXSR    _Bit(24)  /* Fast floating pt save/restore */
  79 #define CPUID_FEATURE_SSE     _Bit(25)  /* Streaming SIMD extensions */
  80 #define CPUID_FEATURE_SSE2    _Bit(26)  /* Streaming SIMD extensions 2 */
  81 #define CPUID_FEATURE_SS      _Bit(27)  /* Self-Snoop */
  82 #define CPUID_FEATURE_HTT     _Bit(28)  /* Hyper-Threading Technology */
  83 #define CPUID_FEATURE_TM      _Bit(29)  /* Thermal Monitor (TM1) */
  84 #define CPUID_FEATURE_PBE     _Bit(31)  /* Pend Break Enable */
  85
  86 #define CPUID_FEATURE_SSE3    _HBit(0)  /* Streaming SIMD extensions 3 */
  87 #define CPUID_FEATURE_PCLMULQDQ _HBit(1) /* PCLMULQDQ Instruction */
  88
  89 #define CPUID_FEATURE_MONITOR _HBit(3)  /* Monitor/mwait */
  90 #define CPUID_FEATURE_DSCPL   _HBit(4)  /* Debug Store CPL */
  91 #define CPUID_FEATURE_VMX     _HBit(5)  /* VMX */
  92 #define CPUID_FEATURE_SMX     _HBit(6)  /* SMX */
  93 #define CPUID_FEATURE_EST     _HBit(7)  /* Enhanced SpeedsTep (GV3) */
  94 #define CPUID_FEATURE_TM2     _HBit(8)  /* Thermal Monitor 2 */
  95 #define CPUID_FEATURE_SSSE3   _HBit(9)  /* Supplemental SSE3 instructions */
  96 #define CPUID_FEATURE_CID     _HBit(10) /* L1 Context ID */
  97 #define CPUID_FEATURE_CX16    _HBit(13) /* CmpXchg16b instruction */
  98 #define CPUID_FEATURE_xTPR    _HBit(14) /* Send Task PRiority msgs */
  99 #define CPUID_FEATURE_PDCM    _HBit(15) /* Perf/Debug Capability MSR */
 100
 101 #define CPUID_FEATURE_DCA     _HBit(18) /* Direct Cache Access */
 102 #define CPUID_FEATURE_SSE4_1  _HBit(19) /* Streaming SIMD extensions 4.1 */
 103 #define CPUID_FEATURE_SSE4_2  _HBit(20) /* Streaming SIMD extensions 4.2 */
 104 #define CPUID_FEATURE_xAPIC   _HBit(21) /* Extended APIC Mode */
 105 #define CPUID_FEATURE_POPCNT  _HBit(23) /* POPCNT instruction */
 106 #define CPUID_FEATURE_AES     _HBit(25) /* AES instructions */
 107 #define CPUID_FEATURE_VMM     _HBit(31) /* VMM (Hypervisor) present */
 108
 109 /*
 110  * The CPUID_EXTFEATURE_XXX values define 64-bit values
 111  * returned in %ecx:%edx to a CPUID request with %eax of 0x80000001:
 112  */
 113 #define CPUID_EXTFEATURE_SYSCALL   _Bit(11)     /* SYSCALL/sysret */
 114 #define CPUID_EXTFEATURE_XD        _Bit(20)     /* eXecute Disable */
 115
 116 #define CPUID_EXTFEATURE_1GBPAGE   _Bit(26)     /* 1G-Byte Page support */
 117 #define CPUID_EXTFEATURE_RDTSCP    _Bit(27)     /* RDTSCP */
 118 #define CPUID_EXTFEATURE_EM64T     _Bit(29)     /* Extended Mem 64 Technology */
 119
 120 #define CPUID_EXTFEATURE_LAHF      _HBit(0)     /* LAHF/SAHF instructions */
 121
 122 /*
 123  * The CPUID_EXTFEATURE_XXX values define 64-bit values
 124  * returned in %ecx:%edx to a CPUID request with %eax of 0x80000007:
 125  */
 126 #define CPUID_EXTFEATURE_TSCI      _Bit(8)      /* TSC Invariant */
 127
 128 #define CPUID_CACHE_SIZE        16      /* Number of descriptor values */
 129
 130 #define CPUID_MWAIT_EXTENSION   _Bit(0) /* enumeration of WMAIT extensions */
 131 #define CPUID_MWAIT_BREAK       _Bit(1) /* interrupts are break events     */
 132
 133 #define CPUID_MODEL_YONAH       14
 134 #define CPUID_MODEL_MEROM       15
 135 #define CPUID_MODEL_PENRYN      23
 136 #define CPUID_MODEL_NEHALEM     26
 137 #define CPUID_MODEL_FIELDS      30      /* Lynnfield, Clarksfield, Jasper */
 138 #define CPUID_MODEL_DALES       31      /* Havendale, Auburndale */
 139 #define CPUID_MODEL_NEHALEM_EX  46
 140 #define CPUID_MODEL_DALES_32NM  37      /* Clarkdale, Arrandale */
 141 #define CPUID_MODEL_WESTMERE    44      /* Gulftown, Westmere-EP, Westmere-WS */
 142 #define CPUID_MODEL_WESTMERE_EX 47
 143
 144 #ifndef ASSEMBLER
 145 #include <stdint.h>
 146 #include <mach/mach_types.h>
 147 #include <kern/kern_types.h>
 148 #include <mach/machine.h>
 149
 150
 151 typedef enum { eax, ebx, ecx, edx } cpuid_register_t;
 152 static inline void
 153 cpuid(uint32_t *data)
 154 {
 155         asm("cpuid"
 156                 : "=a" (data[eax]),
 157                   "=b" (data[ebx]),
 158                   "=c" (data[ecx]),
 159                   "=d" (data[edx])
 160                 : "a"  (data[eax]),
 161                   "b"  (data[ebx]),
 162                   "c"  (data[ecx]),
 163                   "d"  (data[edx]));
 164 }
 165 static inline void
 166 do_cpuid(uint32_t selector, uint32_t *data)
 167 {
 168         asm("cpuid"
 169                 : "=a" (data[0]),
 170                   "=b" (data[1]),
 171                   "=c" (data[2]),
 172                   "=d" (data[3])
 173                 : "a"(selector));
 174 }
 175
 176 /*
 177  * Cache ID descriptor structure, used to parse CPUID leaf 2.
 178  * Note: not used in kernel.
 179  */
 180 typedef enum { Lnone, L1I, L1D, L2U, L3U, LCACHE_MAX } cache_type_t ;
 181 typedef struct {
 182         unsigned char   value;          /* Descriptor value */
 183         cache_type_t    type;           /* Cache type */
 184         unsigned int    size;           /* Cache size */
 185         unsigned int    linesize;       /* Cache line size */
 186 #ifdef KERNEL
 187         const char      *description;   /* Cache description */
 188 #endif /* KERNEL */
 189 } cpuid_cache_desc_t;
 190
 191 #ifdef KERNEL
 192 #define CACHE_DESC(value,type,size,linesize,text) \
 193         { value, type, size, linesize, text }
 194 #else
 195 #define CACHE_DESC(value,type,size,linesize,text) \
 196         { value, type, size, linesize }
 197 #endif /* KERNEL */
 198
 199 /* Monitor/mwait Leaf: */
 200 typedef struct {
 201         uint32_t        linesize_min;
 202         uint32_t        linesize_max;
 203         uint32_t        extensions;
 204         uint32_t        sub_Cstates;
 205 } cpuid_mwait_leaf_t;
 206
 207 /* Thermal and Power Management Leaf: */
 208 typedef struct {
 209         boolean_t       sensor;
 210         boolean_t       dynamic_acceleration;
 211         boolean_t       invariant_APIC_timer;
 212         uint32_t        thresholds;
 213         boolean_t       ACNT_MCNT;
 214 } cpuid_thermal_leaf_t;
 215
 216 /* Architectural Performance Monitoring Leaf: */
 217 typedef struct {
 218         uint8_t         version;
 219         uint8_t         number;
 220         uint8_t         width;
 221         uint8_t         events_number;
 222         uint32_t        events;
 223         uint8_t         fixed_number;
 224         uint8_t         fixed_width;
 225 } cpuid_arch_perf_leaf_t;
 226
 227 /* Physical CPU info - this is exported out of the kernel (kexts), so be wary of changes */
 228 typedef struct {
 229         char            cpuid_vendor[16];
 230         char            cpuid_brand_string[48];
 231         const char      *cpuid_model_string;
 232
 233         cpu_type_t      cpuid_type;     /* this is *not* a cpu_type_t in our <mach/machine.h> */
 234         uint8_t         cpuid_family;
 235         uint8_t         cpuid_model;
 236         uint8_t         cpuid_extmodel;
 237         uint8_t         cpuid_extfamily;
 238         uint8_t         cpuid_stepping;
 239         uint64_t        cpuid_features;
 240         uint64_t        cpuid_extfeatures;
 241         uint32_t        cpuid_signature;
 242         uint8_t         cpuid_brand;
 243
 244         uint32_t        cache_size[LCACHE_MAX];
 245         uint32_t        cache_linesize;
 246
 247         uint8_t         cache_info[64];    /* list of cache descriptors */
 248
 249         uint32_t        cpuid_cores_per_package;
 250         uint32_t        cpuid_logical_per_package;
 251         uint32_t        cache_sharing[LCACHE_MAX];
 252         uint32_t        cache_partitions[LCACHE_MAX];
 253
 254         cpu_type_t      cpuid_cpu_type;                 /* <mach/machine.h> */
 255         cpu_subtype_t   cpuid_cpu_subtype;              /* <mach/machine.h> */
 256
 257         /* Per-vendor info */
 258         cpuid_mwait_leaf_t      cpuid_mwait_leaf;
 259 #define cpuid_mwait_linesize_max        cpuid_mwait_leaf.linesize_max
 260 #define cpuid_mwait_linesize_min        cpuid_mwait_leaf.linesize_min
 261 #define cpuid_mwait_extensions          cpuid_mwait_leaf.extensions
 262 #define cpuid_mwait_sub_Cstates         cpuid_mwait_leaf.sub_Cstates
 263         cpuid_thermal_leaf_t    cpuid_thermal_leaf;
 264         cpuid_arch_perf_leaf_t  cpuid_arch_perf_leaf;
 265
 266         /* Cache details: */
 267         uint32_t        cpuid_cache_linesize;
 268         uint32_t        cpuid_cache_L2_associativity;
 269         uint32_t        cpuid_cache_size;
 270
 271         /* Virtual and physical address aize: */
 272         uint32_t        cpuid_address_bits_physical;
 273         uint32_t        cpuid_address_bits_virtual;
 274
 275         uint32_t        cpuid_microcode_version;
 276
 277         /* Numbers of tlbs per processor [i|d, small|large, level0|level1] */
 278         uint32_t        cpuid_tlb[2][2][2];
 279                         #define TLB_INST        0
 280                         #define TLB_DATA        1
 281                         #define TLB_SMALL       0
 282                         #define TLB_LARGE       1
 283         uint32_t        cpuid_stlb;
 284
 285         uint32_t        core_count;
 286         uint32_t        thread_count;
 287
 288         /* Max leaf ids available from CPUID */
 289         uint32_t        cpuid_max_basic;
 290         uint32_t        cpuid_max_ext;
 291
 292         /* Family-specific info links */
 293         uint32_t                cpuid_cpufamily;
 294         cpuid_mwait_leaf_t      *cpuid_mwait_leafp;
 295         cpuid_thermal_leaf_t    *cpuid_thermal_leafp;
 296         cpuid_arch_perf_leaf_t  *cpuid_arch_perf_leafp;
 297
 298 } i386_cpu_info_t;
 299
 300 #ifdef __cplusplus
 301 extern "C" {
 302 #endif
 303
 304 /*
 305  * External declarations
 306  */
 307 extern cpu_type_t       cpuid_cputype(void);
 308 extern cpu_subtype_t    cpuid_cpusubtype(void);
 309 extern void             cpuid_cpu_display(const char *);
 310 extern void             cpuid_feature_display(const char *);
 311 extern void             cpuid_extfeature_display(const char *);
 312 extern char *           cpuid_get_feature_names(uint64_t, char *, unsigned);
 313 extern char *           cpuid_get_extfeature_names(uint64_t, char *, unsigned);
 314
 315 extern uint64_t         cpuid_features(void);
 316 extern uint64_t         cpuid_extfeatures(void);
 317 extern uint32_t         cpuid_family(void);
 318 extern uint32_t         cpuid_cpufamily(void);
 319
 320 extern void             cpuid_get_info(i386_cpu_info_t *info_p);
 321 extern i386_cpu_info_t  *cpuid_info(void);
 322
 323 extern void             cpuid_set_info(void);
 324
 325 #ifdef __cplusplus
 326 }
 327 #endif
 328
 329 #endif /* ASSEMBLER */
 330
 331 #endif /* __APPLE_API_PRIVATE */
 332 #endif /* _MACHINE_CPUID_H_ */