osfmk/ppc/exception.h

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  * @OSF_COPYRIGHT@
  24  */
  25
  26 /* Miscellaneous constants and structures used by the exception
  27  * handlers
  28  */
  29
  30 #ifndef _PPC_EXCEPTION_H_
  31 #define _PPC_EXCEPTION_H_
  32
  33 #include <ppc/savearea.h>
  34
  35 #ifndef ASSEMBLER
  36
  37 #include <cpus.h>
  38 #include <mach_kdb.h>
  39 #include <mach_kdp.h>
  40
  41 #include <mach/machine/vm_types.h>
  42 #include <mach/boolean.h>
  43 #include <kern/cpu_data.h>
  44 #include <pexpert/pexpert.h>
  45 #include <IOKit/IOInterrupts.h>
  46 #include <ppc/machine_routines.h>
  47
  48 /*      Per processor CPU features */
  49 struct procFeatures {
  50         unsigned int    Available;
  51 #define pfFloat         0x80000000
  52 #define pfFloatb        0
  53 #define pfAltivec       0x40000000
  54 #define pfAltivecb      1
  55 #define pfAvJava        0x20000000
  56 #define pfAvJavab       2
  57 #define pfSMPcap        0x10000000
  58 #define pfSMPcapb       3
  59 #define pfCanSleep      0x08000000
  60 #define pfCanSleepb     4
  61 #define pfCanNap        0x04000000
  62 #define pfCanNapb       5
  63 #define pfCanDoze       0x02000000
  64 #define pfCanDozeb      6
  65 #define pfThermal       0x01000000
  66 #define pfThermalb      7
  67 #define pfThermInt      0x00800000
  68 #define pfThermIntb     8
  69 #define pfNoL2PFNap     0x00008000
  70 #define pfNoL2PFNapb    16
  71 #define pfSlowNap       0x00004000
  72 #define pfSlowNapb      17
  73 #define pfNoMuMMCK      0x00002000
  74 #define pfNoMuMMCKb     18
  75 #define pfLClck         0x00001000
  76 #define pfLClckb        19
  77 #define pfWillNap       0x00000800
  78 #define pfWillNapb      20
  79 #define pfNoMSRir       0x00000400
  80 #define pfNoMSRirb      21
  81 #define pfL3pdet        0x00000200
  82 #define pfL3pdetb       22
  83 #define pfL1i           0x00000100
  84 #define pfL1ib          23
  85 #define pfL1d           0x00000080
  86 #define pfL1db          24
  87 #define pfL1fa          0x00000040
  88 #define pfL1fab         25
  89 #define pfL2            0x00000020
  90 #define pfL2b           26
  91 #define pfL2fa          0x00000010
  92 #define pfL2fab         27
  93 #define pfL2i           0x00000008
  94 #define pfL2ib          28
  95 #define pfL3            0x00000004
  96 #define pfL3b           29
  97 #define pfL3fa          0x00000002
  98 #define pfL3fab         30
  99 #define pfValid         0x00000001
 100 #define pfValidb        31
 101         unsigned short  rptdProc;
 102         unsigned short  lineSize;
 103         unsigned int    l1iSize;
 104         unsigned int    l1dSize;
 105         unsigned int    l2cr;
 106         unsigned int    l2Size;
 107         unsigned int    l3cr;
 108         unsigned int    l3Size;
 109         unsigned int    pfHID0;
 110         unsigned int    pfHID1;
 111         unsigned int    pfHID2;
 112         unsigned int    pfHID3;
 113         unsigned int    pfMSSCR0;
 114         unsigned int    pfMSSCR1;
 115         unsigned int    pfICTRL;
 116         unsigned int    pfLDSTCR;
 117         unsigned int    pfLDSTDB;
 118         unsigned int    l2crOriginal;
 119         unsigned int    l3crOriginal;
 120         unsigned int    pfBootConfig;
 121         unsigned int    reserved[4];
 122 };
 123
 124 typedef struct procFeatures procFeatures;
 125
 126 struct thrmControl {
 127         unsigned int    maxTemp;                        /* Maximum temprature before damage */
 128         unsigned int    throttleTemp;           /* Temprature at which to throttle down */
 129         unsigned int    lowTemp;                        /* Interrupt when temprature drops below */
 130         unsigned int    highTemp;                       /* Interrupt when temprature exceeds this */
 131         unsigned int    thrm3val;                       /* Value for thrm3 register */
 132         unsigned int    rsvd[3];                        /* Pad to cache line */
 133 };
 134
 135 typedef struct thrmControl thrmControl;
 136
 137 /* When an exception is taken, this info is accessed via sprg0 */
 138 /* We should always have this one on a cache line boundary */
 139 struct per_proc_info {
 140         unsigned short  cpu_number;
 141         unsigned short  cpu_flags;                      /* Various low-level flags */
 142         vm_offset_t     istackptr;
 143         vm_offset_t     intstack_top_ss;
 144
 145         vm_offset_t     debstackptr;
 146         vm_offset_t     debstack_top_ss;
 147
 148         unsigned int    tempwork1;                      /* Temp work area - monitor use carefully */
 149         unsigned int    save_exception_type;
 150         unsigned int    old_thread;
 151
 152         /* PPC cache line boundary here - 020 */
 153
 154         unsigned int    active_kloaded;         /* pointer to active_kloaded[CPU_NO] */
 155         unsigned int    active_stacks;          /* pointer to active_stacks[CPU_NO] */
 156         unsigned int    need_ast;                       /* pointer to need_ast[CPU_NO] */
 157 /*
 158  *      Note: the following two pairs of words need to stay in order and each pair must
 159  *      be in the same reservation (line) granule
 160  */
 161         struct facility_context *FPU_owner;             /* Owner of the FPU on this cpu */
 162         unsigned int    pprsv1;
 163         struct facility_context *VMX_owner;             /* Owner of the VMX on this cpu */
 164         unsigned int    pprsv2;
 165         unsigned int    next_savearea;                  /* pointer to the next savearea */
 166
 167         /* PPC cache line boundary here - 040 */
 168         unsigned int    quickfret;                      /* List of saveareas to release */
 169         unsigned int    lclfree;                        /* Pointer to local savearea list */
 170         unsigned int    lclfreecnt;                     /* Entries in local savearea list */
 171         unsigned int    Lastpmap;                       /* Last user pmap loaded  */
 172         unsigned int    userspace;                      /* Last loaded user memory space ID  */
 173         unsigned int    userpmap;                       /* User pmap - real address */
 174         unsigned int    liveVRSave;                     /* VRSave assiciated with live vector registers */
 175         unsigned int    spcFlags;                       /* Special thread flags */
 176
 177         /* PPC cache line boundary here - 060 */
 178         boolean_t               interrupts_enabled;
 179         unsigned int    ppbbTaskEnv;            /* BlueBox Task Environment */
 180         IOInterruptHandler      interrupt_handler;
 181         void *                  interrupt_nub;
 182         unsigned int    interrupt_source;
 183         void *                  interrupt_target;
 184         void *                  interrupt_refCon;
 185         time_base_enable_t      time_base_enable;
 186
 187         /* PPC cache line boundary here - 080 */
 188         unsigned int    MPsigpStat;                     /* Signal Processor status (interlocked update for this one) */
 189 #define MPsigpMsgp              0xC0000000              /* Message pending (busy + pass ) */
 190 #define MPsigpBusy              0x80000000              /* Processor area busy, i.e., locked */
 191 #define MPsigpPass              0x40000000              /* Busy lock passed to receiving processor */
 192 #define MPsigpAck               0x20000000              /* Ack Busy lock passed to receiving processor */
 193 #define MPsigpSrc               0x000000FF              /* Processor that owns busy, i.e., the ID of */
 194                                                                                 /*   whomever set busy. When a busy is passed, */
 195                                                                                 /*   this is the requestor of the function. */
 196 #define MPsigpFunc              0x0000FF00              /* Current function */
 197 #define MPsigpIdle              0x00                    /* No function pending */
 198 #define MPsigpSigp              0x04                    /* Signal a processor */
 199 #define SIGPast         0                                       /* Requests an ast on target processor */
 200 #define SIGPcpureq      1                                       /* Requests CPU specific function */
 201 #define SIGPdebug       2                                       /* Requests a debugger entry */
 202 #define SIGPwake        3                                       /* Wake up a sleeping processor */
 203 #define CPRQtemp        0                                       /* Get temprature of processor */
 204 #define CPRQtimebase    1                                       /* Get timebase of processor */
 205         unsigned int    MPsigpParm0;            /* SIGP parm 0 */
 206         unsigned int    MPsigpParm1;            /* SIGP parm 1 */
 207         unsigned int    MPsigpParm2;            /* SIGP parm 2 */
 208         cpu_id_t                cpu_id;
 209         vm_offset_t             start_paddr;
 210         unsigned int    ruptStamp[2];           /* Timebase at last interruption */
 211
 212         /* PPC cache line boundary here - 0A0 */
 213         procFeatures    pf;                                     /* Processor features */
 214
 215         /* PPC cache line boundary here - 100 */
 216         thrmControl             thrm;                           /* Thermal controls */
 217
 218         /* PPC cache line boundary here - 120 */
 219         unsigned int    napStamp[2];            /* Time base when we napped */
 220         unsigned int    napTotal[2];            /* Total nap time in ticks */
 221         unsigned int    numSIGPast;                     /* Number of SIGP asts recieved */
 222         unsigned int    numSIGPcpureq;          /* Number of SIGP cpu requests recieved */
 223         unsigned int    numSIGPdebug;           /* Number of SIGP debugs recieved */
 224         unsigned int    numSIGPwake;            /* Number of SIGP wakes recieved */
 225
 226         /* PPC cache line boundary here - 140 */
 227         unsigned int    numSIGPtimo;            /* Number of SIGP send timeouts */
 228         unsigned int    numSIGPmast;            /* Number of SIGPast messages merged */
 229         unsigned int    numSIGPmwake;           /* Number of SIGPwake messages merged */
 230         unsigned int    spcTRc;                         /* Special trace count */
 231         unsigned int    spcTRp;                         /* Special trace buffer pointer */
 232         unsigned int    Uassist;                        /* User Assist Word */
 233         vm_offset_t             VMMareaPhys;            /* vmm state page physical addr */
 234         unsigned int    FAMintercept;           /* vmm FAM Exceptions to intercept */
 235
 236         /* PPC cache line boundary here - 160 */
 237         cpu_data_t              pp_cpu_data;            /* cpu data info */
 238         unsigned int    rsrvd170[4];            /* Reserved slots */
 239
 240         /* PPC cache line boundary here - 180 */
 241         unsigned int    rsrvd180[8];            /* Reserved slots */
 242
 243         /* PPC cache line boundary here - 1A0 */
 244         unsigned int    rsrvd1A0[8];            /* Reserved slots */
 245
 246         /* PPC cache line boundary here - 1C0 */
 247         unsigned int    rsrvd1C0[8];            /* Reserved slots */
 248
 249         /* PPC cache line boundary here - 1E0 */
 250         double                  emfp0;                          /* Copies of floating point registers */
 251         double                  emfp1;                          /* Used for emulation purposes */
 252         double                  emfp2;
 253         double                  emfp3;
 254
 255         double                  emfp4;
 256         double                  emfp5;
 257         double                  emfp6;
 258         double                  emfp7;
 259
 260         double                  emfp8;
 261         double                  emfp9;
 262         double                  emfp10;
 263         double                  emfp11;
 264
 265         double                  emfp12;
 266         double                  emfp13;
 267         double                  emfp14;
 268         double                  emfp15;
 269
 270         double                  emfp16;
 271         double                  emfp17;
 272         double                  emfp18;
 273         double                  emfp19;
 274
 275         double                  emfp20;
 276         double                  emfp21;
 277         double                  emfp22;
 278         double                  emfp23;
 279
 280         double                  emfp24;
 281         double                  emfp25;
 282         double                  emfp26;
 283         double                  emfp27;
 284
 285         double                  emfp28;
 286         double                  emfp29;
 287         double                  emfp30;
 288         double                  emfp31;
 289
 290 /*                                                                 - 2E0 */
 291         unsigned int    emfpscr_pad;
 292         unsigned int    emfpscr;
 293         unsigned int    empadfp[6];
 294
 295 /*                                                                 - 300 */
 296         unsigned int    emvr0[4];                       /* Copies of vector registers used both */
 297         unsigned int    emvr1[4];                       /* for full vector emulation or */
 298         unsigned int    emvr2[4];                       /* as saveareas while assisting denorms */
 299         unsigned int    emvr3[4];
 300         unsigned int    emvr4[4];
 301         unsigned int    emvr5[4];
 302         unsigned int    emvr6[4];
 303         unsigned int    emvr7[4];
 304         unsigned int    emvr8[4];
 305         unsigned int    emvr9[4];
 306         unsigned int    emvr10[4];
 307         unsigned int    emvr11[4];
 308         unsigned int    emvr12[4];
 309         unsigned int    emvr13[4];
 310         unsigned int    emvr14[4];
 311         unsigned int    emvr15[4];
 312         unsigned int    emvr16[4];
 313         unsigned int    emvr17[4];
 314         unsigned int    emvr18[4];
 315         unsigned int    emvr19[4];
 316         unsigned int    emvr20[4];
 317         unsigned int    emvr21[4];
 318         unsigned int    emvr22[4];
 319         unsigned int    emvr23[4];
 320         unsigned int    emvr24[4];
 321         unsigned int    emvr25[4];
 322         unsigned int    emvr26[4];
 323         unsigned int    emvr27[4];
 324         unsigned int    emvr28[4];
 325         unsigned int    emvr29[4];
 326         unsigned int    emvr30[4];
 327         unsigned int    emvr31[4];
 328         unsigned int    emvscr[4];
 329         unsigned int    empadvr[4];
 330 /*                                                                 - 520 */
 331
 332         unsigned int    patcharea[56];
 333 /*                                                                 - 600 */
 334
 335 };
 336
 337 #define pp_active_thread        pp_cpu_data.active_thread
 338 #define pp_preemption_count     pp_cpu_data.preemption_level
 339 #define pp_simple_lock_count    pp_cpu_data.simple_lock_count
 340 #define pp_interrupt_level      pp_cpu_data.interrupt_level
 341
 342
 343 extern struct per_proc_info per_proc_info[NCPUS];
 344
 345 extern char *trap_type[];
 346
 347 #endif /* ndef ASSEMBLER */
 348 /* with this savearea should be redriven */
 349
 350 /* cpu_flags defs */
 351 #define SIGPactive      0x8000
 352 #define needSRload      0x4000
 353 #define turnEEon        0x2000
 354 #define traceBE     0x1000                                      /* user mode BE tracing in enabled */
 355 #define traceBEb    3                                           /* bit number for traceBE */
 356 #define BootDone        0x0100
 357 #define SignalReady     0x0200
 358 #define loadMSR         0x7FF4
 359
 360 #define T_VECTOR_SIZE   4                                       /* function pointer size */
 361
 362 /* Hardware exceptions */
 363
 364 #define T_IN_VAIN                               (0x00 * T_VECTOR_SIZE)
 365 #define T_RESET                                 (0x01 * T_VECTOR_SIZE)
 366 #define T_MACHINE_CHECK                 (0x02 * T_VECTOR_SIZE)
 367 #define T_DATA_ACCESS                   (0x03 * T_VECTOR_SIZE)
 368 #define T_INSTRUCTION_ACCESS    (0x04 * T_VECTOR_SIZE)
 369 #define T_INTERRUPT                             (0x05 * T_VECTOR_SIZE)
 370 #define T_ALIGNMENT                             (0x06 * T_VECTOR_SIZE)
 371 #define T_PROGRAM                               (0x07 * T_VECTOR_SIZE)
 372 #define T_FP_UNAVAILABLE                (0x08 * T_VECTOR_SIZE)
 373 #define T_DECREMENTER                   (0x09 * T_VECTOR_SIZE)
 374 #define T_IO_ERROR                              (0x0a * T_VECTOR_SIZE)
 375 #define T_RESERVED                              (0x0b * T_VECTOR_SIZE)
 376 #define T_SYSTEM_CALL                   (0x0c * T_VECTOR_SIZE)
 377 #define T_TRACE                                 (0x0d * T_VECTOR_SIZE)
 378 #define T_FP_ASSIST                             (0x0e * T_VECTOR_SIZE)
 379 #define T_PERF_MON                              (0x0f * T_VECTOR_SIZE)
 380 #define T_VMX                                   (0x10 * T_VECTOR_SIZE)
 381 #define T_INVALID_EXCP0                 (0x11 * T_VECTOR_SIZE)
 382 #define T_INVALID_EXCP1                 (0x12 * T_VECTOR_SIZE)
 383 #define T_INVALID_EXCP2                 (0x13 * T_VECTOR_SIZE)
 384 #define T_INSTRUCTION_BKPT              (0x14 * T_VECTOR_SIZE)
 385 #define T_SYSTEM_MANAGEMENT             (0x15 * T_VECTOR_SIZE)
 386 #define T_ALTIVEC_ASSIST                (0x16 * T_VECTOR_SIZE)
 387 #define T_THERMAL                               (0x17 * T_VECTOR_SIZE)
 388 #define T_INVALID_EXCP5                 (0x18 * T_VECTOR_SIZE)
 389 #define T_INVALID_EXCP6                 (0x19 * T_VECTOR_SIZE)
 390 #define T_INVALID_EXCP7                 (0x1A * T_VECTOR_SIZE)
 391 #define T_INVALID_EXCP8                 (0x1B * T_VECTOR_SIZE)
 392 #define T_INVALID_EXCP9                 (0x1C * T_VECTOR_SIZE)
 393 #define T_INVALID_EXCP10                (0x1D * T_VECTOR_SIZE)
 394 #define T_INVALID_EXCP11                (0x1E * T_VECTOR_SIZE)
 395 #define T_INVALID_EXCP12                (0x1F * T_VECTOR_SIZE)
 396 #define T_INVALID_EXCP13                (0x20 * T_VECTOR_SIZE)
 397
 398 #define T_RUNMODE_TRACE                 (0x21 * T_VECTOR_SIZE) /* 601 only */
 399
 400 #define T_SIGP                                  (0x22 * T_VECTOR_SIZE)
 401 #define T_PREEMPT                               (0x23 * T_VECTOR_SIZE)
 402 #define T_CSWITCH                               (0x24 * T_VECTOR_SIZE)
 403 #define T_SHUTDOWN                              (0x25 * T_VECTOR_SIZE)
 404 #define T_CHOKE                                 (0x26 * T_VECTOR_SIZE)
 405
 406 #define T_AST                                   (0x100 * T_VECTOR_SIZE)
 407 #define T_MAX                                   T_CHOKE          /* Maximum exception no */
 408
 409 #define T_FAM                                   0x00004000
 410
 411 #define EXCEPTION_VECTOR(exception)     (exception * 0x100 /T_VECTOR_SIZE )
 412
 413 /*
 414  *              System choke (failure) codes
 415  */
 416
 417 #define failDebug 0
 418 #define failStack 1
 419 #define failMapping 2
 420 #define failContext 3
 421 #define failNoSavearea 4
 422 #define failSaveareaCorr 5
 423 #define failBadLiveContext 6
 424
 425 /* Always must be last - update failNames table in model_dep.c as well */
 426 #define failUnknown 7
 427
 428 #ifndef ASSEMBLER
 429
 430 typedef struct resethandler {
 431         unsigned int    type;
 432         vm_offset_t     call_paddr;
 433         vm_offset_t     arg__paddr;
 434 } resethandler_t;
 435
 436 extern resethandler_t ResetHandler;
 437
 438 #endif
 439
 440 #define RESET_HANDLER_NULL      0x0
 441 #define RESET_HANDLER_START     0x1
 442
 443 #endif /* _PPC_EXCEPTION_H_ */