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29 #ifndef _I386_POSTCODE_H_
30 #define _I386_POSTCODE_H_
36 /* Define this to delay about 1 sec after posting each code */
37 //#define POSTCODE_DELAY 1
39 /* The POSTCODE is port 0x80 */
42 #define SPINCOUNT 300000000
43 #define CPU_PAUSE() rep; nop
47 * Macro to output byte value to postcode, destoying register al.
48 * Additionally, if POSTCODE_DELAY, spin for about a second.
52 outb %al,$(POSTPORT); \
53 movl $(SPINCOUNT), %eax; \
61 #endif /* POSTCODE_DELAY */
63 #define POSTCODE(XX) \
67 /* Output byte value to postcode, without destoying register eax */
68 #define POSTCODE_SAVE_EAX(XX) \
74 * Display a 32-bit value to the post card - low byte to high byte
75 * Entry: value in %ebx
76 * Exit: %ebx preserved; %eax destroyed
78 #define POSTCODE32_EBX \
98 #define POSTCODE32_EBX
102 * The following postcodes are defined for stages of early startup:
105 #define _PSTART_ENTRY 0xFF
106 #define _PSTART_RELOC 0xFE
107 #define PSTART_ENTRY 0xFD
108 #define PSTART_PAGE_TABLES 0xFC
109 #define PSTART_BEFORE_PAGING 0xFB
110 #define VSTART_ENTRY 0xFA
111 #define VSTART_STACK_SWITCH 0xF9
112 #define VSTART_EXIT 0xF8
113 #define I386_INIT_ENTRY 0xF7
114 #define CPU_INIT_D 0xF6
115 #define PE_INIT_PLATFORM_D 0xF5
117 #define SLAVE_RSTART_ENTRY 0xEF
118 #define SLAVE_REAL_TO_PROT_ENTRY 0xEE
119 #define SLAVE_REAL_TO_PROT_EXIT 0xED
120 #define SLAVE_STARTPROG_ENTRY 0xEC
121 #define SLAVE_STARTPROG_EXIT 0xEB
122 #define SLAVE_PSTART_ENTRY 0xEA
123 #define SLAVE_PSTART_EXIT 0xE9
124 #define SLAVE_VSTART_ENTRY 0xE8
125 #define SLAVE_VSTART_DESC_INIT 0xE7
126 #define SLAVE_VSTART_STACK_SWITCH 0xE6
127 #define SLAVE_VSTART_EXIT 0xE5
128 #define I386_INIT_SLAVE 0xE4
130 #define PANIC_DOUBLE_FAULT 0xDF /* Double Fault exception */
131 #define PANIC_MACHINE_CHECK 0xDE /* Machine-Check */
132 #define MP_KDP_ENTER 0xDB /* Machine in kdp DeBugger */
133 #define PANIC_HLT 0xD1 /* Die an early death */
134 #define NO_64BIT 0x64 /* No 64-bit support yet */
136 #define ACPI_WAKE_START_ENTRY 0xCF
137 #define ACPI_WAKE_PROT_ENTRY 0xCE
138 #define ACPI_WAKE_PAGED_ENTRY 0xCD
140 #define CPU_IA32_ENABLE_ENTRY 0xBF
141 #define CPU_IA32_ENABLE_EXIT 0xBE
142 #define ML_LOAD_DESC64_ENTRY 0xBD
143 #define ML_LOAD_DESC64_GDT 0xBC
144 #define ML_LOAD_DESC64_IDT 0xBB
145 #define ML_LOAD_DESC64_LDT 0xBA
146 #define ML_LOAD_DESC64_EXIT 0xB9
147 #define CPU_IA32_DISABLE_ENTRY 0xB8
148 #define CPU_IA32_DISABLE_EXIT 0xB7
152 _postcode_delay(uint32_t spincount
)
154 asm volatile("1: \n\t"
158 : : "a" (spincount
));
161 _postcode(uint8_t xx
)
163 asm volatile("outb %0, %1" : : "a" (xx
), "N" (POSTPORT
));
171 _postcode_delay(SPINCOUNT
);
175 #define postcode(xx) do {} while(0)
179 #endif /* _I386_POSTCODE_H_ */