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32 * Mach Operating System
33 * Copyright (c) 1991 Carnegie Mellon University
34 * All Rights Reserved.
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
46 * Carnegie Mellon requests users of this software to return to
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
61 * Macro definitions for routines to manipulate the
62 * floating-point processor.
64 #include <kern/thread.h>
65 #include <i386/thread.h>
66 #include <kern/kern_types.h>
67 #include <mach/i386/kern_return.h>
68 #include <mach/i386/thread_status.h>
69 #include <i386/proc_reg.h>
73 extern void init_fpu(void);
74 extern void fpu_module_init(void);
76 struct x86_fpsave_state
* fps
);
77 extern kern_return_t
fpu_set_fxstate(
79 thread_state_t state
);
80 extern kern_return_t
fpu_get_fxstate(
82 thread_state_t state
);
83 extern void fpu_dup_fxstate(
86 extern void fpnoextflt(void);
87 extern void fpextovrflt(void);
88 extern void fpexterrflt(void);
89 extern void fpSSEexterrflt(void);
90 extern void fpflush(thread_t
);
91 extern void fp_setvalid(boolean_t
);
92 extern void fxsave64(struct x86_fx_save
*);
93 extern void fxrstor64(struct x86_fx_save
*);
99 __asm__ volatile("fninit")
101 #define fnstcw(control) \
102 __asm__("fnstcw %0" : "=m" (*(unsigned short *)(control)))
104 #define fldcw(control) \
105 __asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
107 static inline unsigned short
110 unsigned short status
;
111 __asm__
volatile("fnstsw %0" : "=ma" (status
));
116 __asm__ volatile("fnclex")
118 #define fnsave(state) \
119 __asm__ volatile("fnsave %0" : "=m" (*state))
121 #define frstor(state) \
122 __asm__ volatile("frstor %0" : : "m" (state))
127 #define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr)))
128 #define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
130 #define FXSAFE() (fp_kind == FP_FXSR)
133 static inline void clear_fpu(void)
139 * Save thread`s FPU context.
142 static inline void fpu_save_context(thread_t thread
)
144 struct x86_fpsave_state
*ifps
;
146 assert(ml_get_interrupts_enabled() == FALSE
);
147 ifps
= (thread
)->machine
.pcb
->ifps
;
148 if (ifps
!= 0 && !ifps
->fp_valid
) {
149 /* Clear CR0.TS in preparation for the FP context save. In
150 * theory, this shouldn't be necessary since a live FPU should
151 * indicate that TS is clear. However, various routines
152 * (such as sendsig & sigreturn) manipulate TS directly.
155 /* registers are in FPU - save to memory */
156 ifps
->fp_valid
= TRUE
;
158 if (!thread_is_64bit(thread
) || is_saved_state32(thread
->machine
.pcb
->iss
)) {
159 /* save the compatibility/legacy mode XMM+x87 state */
160 fxsave(&ifps
->fx_save_state
);
161 ifps
->fp_save_layout
= FXSAVE32
;
164 /* Execute a brief jump to 64-bit mode to save the 64
167 fxsave64(&ifps
->fx_save_state
);
168 ifps
->fp_save_layout
= FXSAVE64
;
174 #endif /* _I386_FPU_H_ */