bsd/kern/kern_mib.c

   1 /*
   2  * Copyright (c) 2000-2007 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 /*-
  29  * Copyright (c) 1982, 1986, 1989, 1993
  30  *      The Regents of the University of California.  All rights reserved.
  31  *
  32  * This code is derived from software contributed to Berkeley by
  33  * Mike Karels at Berkeley Software Design, Inc.
  34  *
  35  * Quite extensively rewritten by Poul-Henning Kamp of the FreeBSD
  36  * project, to make these variables more userfriendly.
  37  *
  38  * Redistribution and use in source and binary forms, with or without
  39  * modification, are permitted provided that the following conditions
  40  * are met:
  41  * 1. Redistributions of source code must retain the above copyright
  42  *    notice, this list of conditions and the following disclaimer.
  43  * 2. Redistributions in binary form must reproduce the above copyright
  44  *    notice, this list of conditions and the following disclaimer in the
  45  *    documentation and/or other materials provided with the distribution.
  46  * 3. All advertising materials mentioning features or use of this software
  47  *    must display the following acknowledgement:
  48  *      This product includes software developed by the University of
  49  *      California, Berkeley and its contributors.
  50  * 4. Neither the name of the University nor the names of its contributors
  51  *    may be used to endorse or promote products derived from this software
  52  *    without specific prior written permission.
  53  *
  54  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  55  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  56  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  57  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  58  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  59  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  60  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  61  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  62  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  63  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  *      @(#)kern_sysctl.c       8.4 (Berkeley) 4/14/94
  67  */
  68
  69 #include <sys/param.h>
  70 #include <sys/kernel.h>
  71 #include <sys/systm.h>
  72 #include <sys/sysctl.h>
  73 #include <sys/proc_internal.h>
  74 #include <sys/unistd.h>
  75
  76 #if defined(SMP)
  77 #include <machine/smp.h>
  78 #endif
  79
  80 #include <sys/param.h>  /* XXX prune includes */
  81 #include <sys/systm.h>
  82 #include <sys/kernel.h>
  83 #include <sys/malloc.h>
  84 #include <sys/proc.h>
  85 #include <sys/file_internal.h>
  86 #include <sys/vnode.h>
  87 #include <sys/unistd.h>
  88 #include <sys/ioctl.h>
  89 #include <sys/namei.h>
  90 #include <sys/tty.h>
  91 #include <sys/disklabel.h>
  92 #include <sys/vm.h>
  93 #include <sys/sysctl.h>
  94 #include <sys/user.h>
  95 #include <mach/machine.h>
  96 #include <mach/mach_types.h>
  97 #include <mach/vm_param.h>
  98 #include <kern/task.h>
  99 #include <vm/vm_kern.h>
 100 #include <mach/host_info.h>
 101 #include <kern/pms.h>
 102
 103 extern vm_map_t bsd_pageable_map;
 104
 105 #include <sys/mount_internal.h>
 106 #include <sys/kdebug.h>
 107
 108 #include <IOKit/IOPlatformExpert.h>
 109 #include <pexpert/pexpert.h>
 110
 111 #include <machine/machine_routines.h>
 112 #include <machine/cpu_capabilities.h>
 113
 114 #include <mach/mach_host.h>             /* for host_info() */
 115
 116 #ifdef __i386__
 117 #include <i386/cpuid.h>         /* for cpuid_info() */
 118 #endif
 119
 120
 121
 122 #ifndef MAX
 123 #define MAX(a,b) (a >= b ? a : b)
 124 #endif
 125
 126 /* XXX This should be in a BSD accessible Mach header, but isn't. */
 127 extern unsigned int vm_page_wire_count;
 128
 129 static int      cputype, cpusubtype, cputhreadtype, cpufamily, cpu64bit;
 130 static uint64_t cacheconfig[10], cachesize[10];
 131 static int      packages;
 132
 133 SYSCTL_NODE(, 0,          sysctl, CTLFLAG_RW|CTLFLAG_LOCKED, 0,
 134         "Sysctl internal magic");
 135 SYSCTL_NODE(, CTL_KERN,   kern,   CTLFLAG_RW|CTLFLAG_LOCKED, 0,
 136         "High kernel, proc, limits &c");
 137 SYSCTL_NODE(, CTL_VM,     vm,     CTLFLAG_RW|CTLFLAG_LOCKED, 0,
 138         "Virtual memory");
 139 SYSCTL_NODE(, CTL_VFS,    vfs,     CTLFLAG_RW|CTLFLAG_LOCKED, 0,
 140         "File system");
 141 SYSCTL_NODE(, CTL_NET,    net,    CTLFLAG_RW|CTLFLAG_LOCKED, 0,
 142         "Network, (see socket.h)");
 143 SYSCTL_NODE(, CTL_DEBUG,  debug,  CTLFLAG_RW|CTLFLAG_LOCKED, 0,
 144         "Debugging");
 145 SYSCTL_NODE(, CTL_HW,     hw,     CTLFLAG_RW|CTLFLAG_LOCKED, 0,
 146         "hardware");
 147 SYSCTL_NODE(, CTL_MACHDEP, machdep, CTLFLAG_RW|CTLFLAG_LOCKED, 0,
 148         "machine dependent");
 149 SYSCTL_NODE(, CTL_USER,   user,   CTLFLAG_RW|CTLFLAG_LOCKED, 0,
 150         "user-level");
 151
 152 #define SYSCTL_RETURN(r, x)     SYSCTL_OUT(r, &x, sizeof(x))
 153
 154 /******************************************************************************
 155  * hw.* MIB
 156  */
 157
 158 #define CTLHW_RETQUAD   (1 << 31)
 159 #define CTLHW_LOCAL     (1 << 30)
 160
 161 #define HW_LOCAL_CPUTHREADTYPE  (1 | CTLHW_LOCAL)
 162 #define HW_LOCAL_PHYSICALCPU    (2 | CTLHW_LOCAL)
 163 #define HW_LOCAL_PHYSICALCPUMAX (3 | CTLHW_LOCAL)
 164 #define HW_LOCAL_LOGICALCPU     (4 | CTLHW_LOCAL)
 165 #define HW_LOCAL_LOGICALCPUMAX  (5 | CTLHW_LOCAL)
 166
 167
 168 /*
 169  * Supporting some variables requires us to do "real" work.  We
 170  * gather some of that here.
 171  */
 172 static int
 173 sysctl_hw_generic(__unused struct sysctl_oid *oidp, __unused void *arg1,
 174         int arg2, struct sysctl_req *req)
 175 {
 176         char dummy[65];
 177         int  epochTemp;
 178         ml_cpu_info_t cpu_info;
 179         int val, doquad;
 180         long long qval;
 181         host_basic_info_data_t hinfo;
 182         kern_return_t kret;
 183         mach_msg_type_number_t count = HOST_BASIC_INFO_COUNT;
 184
 185         /*
 186          * Test and mask off the 'return quad' flag.
 187          * Note that only some things here support it.
 188          */
 189         doquad = arg2 & CTLHW_RETQUAD;
 190         arg2 &= ~CTLHW_RETQUAD;
 191
 192         ml_cpu_get_info(&cpu_info);
 193
 194 #define BSD_HOST 1
 195         kret = host_info((host_t)BSD_HOST, HOST_BASIC_INFO, (host_info_t)&hinfo, &count);
 196
 197         /*
 198          * Handle various OIDs.
 199          *
 200          * OIDs that can return int or quad set val and qval and then break.
 201          * Errors and int-only values return inline.
 202          */
 203         switch (arg2) {
 204         case HW_NCPU:
 205                 if (kret == KERN_SUCCESS) {
 206                         return(SYSCTL_RETURN(req, hinfo.max_cpus));
 207                 } else {
 208                         return(EINVAL);
 209                 }
 210         case HW_AVAILCPU:
 211                 if (kret == KERN_SUCCESS) {
 212                         return(SYSCTL_RETURN(req, hinfo.avail_cpus));
 213                 } else {
 214                         return(EINVAL);
 215                 }
 216         case HW_LOCAL_PHYSICALCPU:
 217                 if (kret == KERN_SUCCESS) {
 218                         return(SYSCTL_RETURN(req, hinfo.physical_cpu));
 219                 } else {
 220                         return(EINVAL);
 221                 }
 222         case HW_LOCAL_PHYSICALCPUMAX:
 223                 if (kret == KERN_SUCCESS) {
 224                         return(SYSCTL_RETURN(req, hinfo.physical_cpu_max));
 225                 } else {
 226                         return(EINVAL);
 227                 }
 228         case HW_LOCAL_LOGICALCPU:
 229                 if (kret == KERN_SUCCESS) {
 230                         return(SYSCTL_RETURN(req, hinfo.logical_cpu));
 231                 } else {
 232                         return(EINVAL);
 233                 }
 234         case HW_LOCAL_LOGICALCPUMAX:
 235                 if (kret == KERN_SUCCESS) {
 236                         return(SYSCTL_RETURN(req, hinfo.logical_cpu_max));
 237                 } else {
 238                         return(EINVAL);
 239                 }
 240         case HW_CACHELINE:
 241                 val = cpu_info.cache_line_size;
 242                 qval = (long long)val;
 243                 break;
 244         case HW_L1ICACHESIZE:
 245                 val = cpu_info.l1_icache_size;
 246                 qval = (long long)val;
 247                 break;
 248         case HW_L1DCACHESIZE:
 249                 val = cpu_info.l1_dcache_size;
 250                 qval = (long long)val;
 251                 break;
 252         case HW_L2CACHESIZE:
 253                 if (cpu_info.l2_cache_size == 0xFFFFFFFF)
 254                         return(EINVAL);
 255                 val = cpu_info.l2_cache_size;
 256                 qval = (long long)val;
 257                 break;
 258         case HW_L3CACHESIZE:
 259                 if (cpu_info.l3_cache_size == 0xFFFFFFFF)
 260                         return(EINVAL);
 261                 val = cpu_info.l3_cache_size;
 262                 qval = (long long)val;
 263                 break;
 264
 265                 /*
 266                  * Deprecated variables.  We still support these for
 267                  * backwards compatibility purposes only.
 268                  */
 269         case HW_MACHINE:
 270                 bzero(dummy, sizeof(dummy));
 271                 if(!PEGetMachineName(dummy,64))
 272                         return(EINVAL);
 273                 dummy[64] = 0;
 274                 return(SYSCTL_OUT(req, dummy, strlen(dummy) + 1));
 275         case HW_MODEL:
 276                 bzero(dummy, sizeof(dummy));
 277                 if(!PEGetModelName(dummy,64))
 278                         return(EINVAL);
 279                 dummy[64] = 0;
 280                 return(SYSCTL_OUT(req, dummy, strlen(dummy) + 1));
 281         case HW_USERMEM:
 282                 {
 283                 int usermem = mem_size - vm_page_wire_count * page_size;
 284
 285                         return(SYSCTL_RETURN(req, usermem));
 286                 }
 287         case HW_EPOCH:
 288                 epochTemp = PEGetPlatformEpoch();
 289                 if (epochTemp == -1)
 290                         return(EINVAL);
 291                 return(SYSCTL_RETURN(req, epochTemp));
 292         case HW_VECTORUNIT: {
 293                 int vector = cpu_info.vector_unit == 0? 0 : 1;
 294                 return(SYSCTL_RETURN(req, vector));
 295         }
 296         case HW_L2SETTINGS:
 297                 if (cpu_info.l2_cache_size == 0xFFFFFFFF)
 298                         return(EINVAL);
 299                 return(SYSCTL_RETURN(req, cpu_info.l2_settings));
 300         case HW_L3SETTINGS:
 301                 if (cpu_info.l3_cache_size == 0xFFFFFFFF)
 302                         return(EINVAL);
 303                 return(SYSCTL_RETURN(req, cpu_info.l3_settings));
 304         default:
 305                 return(ENOTSUP);
 306         }
 307         /*
 308          * Callers may come to us with either int or quad buffers.
 309          */
 310         if (doquad) {
 311                 return(SYSCTL_RETURN(req, qval));
 312         }
 313         return(SYSCTL_RETURN(req, val));
 314 }
 315
 316 /* hw.pagesize and hw.tbfrequency are expected as 64 bit values */
 317 static int
 318 sysctl_pagesize
 319 (__unused struct sysctl_oid *oidp, __unused void *arg1, __unused int arg2, struct sysctl_req *req)
 320 {
 321         long long l = page_size;
 322         return sysctl_io_number(req, l, sizeof(l), NULL, NULL);
 323 }
 324
 325 static int
 326 sysctl_tbfrequency
 327 (__unused struct sysctl_oid *oidp, __unused void *arg1, __unused int arg2, struct sysctl_req *req)
 328 {
 329         long long l = gPEClockFrequencyInfo.timebase_frequency_hz;
 330         return sysctl_io_number(req, l, sizeof(l), NULL, NULL);
 331 }
 332
 333 /*
 334  * hw.* MIB variables.
 335  */
 336 SYSCTL_PROC    (_hw, HW_NCPU, ncpu, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_NCPU, sysctl_hw_generic, "I", "");
 337 SYSCTL_PROC    (_hw, HW_AVAILCPU, activecpu, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_AVAILCPU, sysctl_hw_generic, "I", "");
 338 SYSCTL_PROC    (_hw, OID_AUTO, physicalcpu, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_LOCAL_PHYSICALCPU, sysctl_hw_generic, "I", "");
 339 SYSCTL_PROC    (_hw, OID_AUTO, physicalcpu_max, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_LOCAL_PHYSICALCPUMAX, sysctl_hw_generic, "I", "");
 340 SYSCTL_PROC    (_hw, OID_AUTO, logicalcpu, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_LOCAL_LOGICALCPU, sysctl_hw_generic, "I", "");
 341 SYSCTL_PROC    (_hw, OID_AUTO, logicalcpu_max, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_LOCAL_LOGICALCPUMAX, sysctl_hw_generic, "I", "");
 342 SYSCTL_INT     (_hw, HW_BYTEORDER, byteorder, CTLFLAG_RD | CTLFLAG_KERN, NULL, BYTE_ORDER, "");
 343 SYSCTL_INT     (_hw, OID_AUTO, cputype, CTLFLAG_RD | CTLFLAG_KERN, &cputype, 0, "");
 344 SYSCTL_INT     (_hw, OID_AUTO, cpusubtype, CTLFLAG_RD | CTLFLAG_KERN, &cpusubtype, 0, "");
 345 SYSCTL_INT     (_hw, OID_AUTO, cpu64bit_capable, CTLFLAG_RD | CTLFLAG_KERN, &cpu64bit, 0, "");
 346 SYSCTL_INT     (_hw, OID_AUTO, cpufamily, CTLFLAG_RD | CTLFLAG_KERN, &cpufamily, 0, "");
 347 SYSCTL_OPAQUE  (_hw, OID_AUTO, cacheconfig, CTLFLAG_RD, &cacheconfig, sizeof(cacheconfig), "Q", "");
 348 SYSCTL_OPAQUE  (_hw, OID_AUTO, cachesize, CTLFLAG_RD, &cachesize, sizeof(cachesize), "Q", "");
 349 SYSCTL_PROC        (_hw, OID_AUTO, pagesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, 0, sysctl_pagesize, "Q", "");
 350 SYSCTL_QUAD    (_hw, OID_AUTO, busfrequency, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.bus_frequency_hz, "");
 351 SYSCTL_QUAD    (_hw, OID_AUTO, busfrequency_min, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.bus_frequency_min_hz, "");
 352 SYSCTL_QUAD    (_hw, OID_AUTO, busfrequency_max, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.bus_frequency_max_hz, "");
 353 SYSCTL_QUAD    (_hw, OID_AUTO, cpufrequency, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.cpu_frequency_hz, "");
 354 SYSCTL_QUAD    (_hw, OID_AUTO, cpufrequency_min, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.cpu_frequency_min_hz, "");
 355 SYSCTL_QUAD    (_hw, OID_AUTO, cpufrequency_max, CTLFLAG_RD | CTLFLAG_KERN, &gPEClockFrequencyInfo.cpu_frequency_max_hz, "");
 356 SYSCTL_PROC    (_hw, OID_AUTO, cachelinesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_CACHELINE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
 357 SYSCTL_PROC    (_hw, OID_AUTO, l1icachesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_L1ICACHESIZE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
 358 SYSCTL_PROC    (_hw, OID_AUTO, l1dcachesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_L1DCACHESIZE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
 359 SYSCTL_PROC    (_hw, OID_AUTO, l2cachesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_L2CACHESIZE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
 360 SYSCTL_PROC    (_hw, OID_AUTO, l3cachesize, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, HW_L3CACHESIZE | CTLHW_RETQUAD, sysctl_hw_generic, "Q", "");
 361 SYSCTL_PROC(_hw, OID_AUTO, tbfrequency, CTLTYPE_QUAD | CTLFLAG_RD | CTLFLAG_KERN, 0, 0, sysctl_tbfrequency, "Q", "");
 362 SYSCTL_QUAD    (_hw, HW_MEMSIZE, memsize, CTLFLAG_RD | CTLFLAG_KERN, &max_mem, "");
 363 SYSCTL_INT     (_hw, OID_AUTO, packages, CTLFLAG_RD | CTLFLAG_KERN, &packages, 0, "");
 364
 365 /*
 366  * Optional features can register nodes below hw.optional.
 367  *
 368  * If the feature is not present, the node should either not be registered,
 369  * or it should return -1.  If the feature is present, the node should return
 370  * 0.  If the feature is present and its use is advised, the node should
 371  * return 1.
 372  */
 373 SYSCTL_NODE(_hw, OID_AUTO, optional, CTLFLAG_RW|CTLFLAG_LOCKED, NULL, "optional features");
 374
 375 SYSCTL_INT(_hw_optional, OID_AUTO, floatingpoint, CTLFLAG_RD | CTLFLAG_KERN, 0, 1, ""); /* always set */
 376
 377 /*
 378  * Deprecated variables.  These are supported for backwards compatibility
 379  * purposes only.  The MASKED flag requests that the variables not be
 380  * printed by sysctl(8) and similar utilities.
 381  *
 382  * The variables named *_compat here are int-sized versions of variables
 383  * that are now exported as quads.  The int-sized versions are normally
 384  * looked up only by number, wheras the quad-sized versions should be
 385  * looked up by name.
 386  *
 387  * The *_compat nodes are *NOT* visible within the kernel.
 388  */
 389 SYSCTL_INT (_hw, HW_PAGESIZE,     pagesize_compat, CTLFLAG_RD | CTLFLAG_MASKED, &page_size, 0, "");
 390 SYSCTL_INT (_hw, HW_BUS_FREQ,     busfrequency_compat, CTLFLAG_RD | CTLFLAG_MASKED, &gPEClockFrequencyInfo.bus_clock_rate_hz, 0, "");
 391 SYSCTL_INT (_hw, HW_CPU_FREQ,     cpufrequency_compat, CTLFLAG_RD | CTLFLAG_MASKED, &gPEClockFrequencyInfo.cpu_clock_rate_hz, 0, "");
 392 SYSCTL_PROC(_hw, HW_CACHELINE,    cachelinesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_CACHELINE, sysctl_hw_generic, "I", "");
 393 SYSCTL_PROC(_hw, HW_L1ICACHESIZE, l1icachesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L1ICACHESIZE, sysctl_hw_generic, "I", "");
 394 SYSCTL_PROC(_hw, HW_L1DCACHESIZE, l1dcachesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L1DCACHESIZE, sysctl_hw_generic, "I", "");
 395 SYSCTL_PROC(_hw, HW_L2CACHESIZE,  l2cachesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L2CACHESIZE, sysctl_hw_generic, "I", "");
 396 SYSCTL_PROC(_hw, HW_L3CACHESIZE,  l3cachesize_compat, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L3CACHESIZE, sysctl_hw_generic, "I", "");
 397 SYSCTL_INT (_hw, HW_TB_FREQ,      tbfrequency_compat, CTLFLAG_RD | CTLFLAG_MASKED, &gPEClockFrequencyInfo.timebase_frequency_hz, 0, "");
 398 SYSCTL_PROC(_hw, HW_MACHINE,      machine, CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_MACHINE, sysctl_hw_generic, "A", "");
 399 SYSCTL_PROC(_hw, HW_MODEL,        model, CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_MODEL, sysctl_hw_generic, "A", "");
 400 SYSCTL_UINT(_hw, HW_PHYSMEM,      physmem, CTLFLAG_RD | CTLFLAG_MASKED, &mem_size, 0, "");
 401 SYSCTL_PROC(_hw, HW_USERMEM,      usermem, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_USERMEM,    sysctl_hw_generic, "I", "");
 402 SYSCTL_PROC(_hw, HW_EPOCH,        epoch, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_EPOCH, sysctl_hw_generic, "I", "");
 403 SYSCTL_PROC(_hw, HW_VECTORUNIT,   vectorunit, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_VECTORUNIT, sysctl_hw_generic, "I", "");
 404 SYSCTL_PROC(_hw, HW_L2SETTINGS,   l2settings, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L2SETTINGS, sysctl_hw_generic, "I", "");
 405 SYSCTL_PROC(_hw, HW_L3SETTINGS,   l3settings, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MASKED, 0, HW_L3SETTINGS, sysctl_hw_generic, "I", "");
 406 SYSCTL_INT (_hw, OID_AUTO, cputhreadtype, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &cputhreadtype, 0, "");
 407
 408 #ifdef __ppc__
 409 int altivec_flag = -1;
 410 int graphicsops_flag = -1;
 411 int x64bitops_flag = -1;
 412 int fsqrt_flag = -1;
 413 int stfiwx_flag = -1;
 414 int dcba_flag = -1;
 415 int datastreams_flag = -1;
 416 int dcbtstreams_flag = -1;
 417
 418 SYSCTL_INT(_hw_optional, OID_AUTO, altivec, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &altivec_flag, 0, "");
 419 SYSCTL_INT(_hw_optional, OID_AUTO, graphicsops, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &graphicsops_flag, 0, "");
 420 SYSCTL_INT(_hw_optional, OID_AUTO, 64bitops, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &x64bitops_flag, 0, "");
 421 SYSCTL_INT(_hw_optional, OID_AUTO, fsqrt, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &fsqrt_flag, 0, "");
 422 SYSCTL_INT(_hw_optional, OID_AUTO, stfiwx, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &stfiwx_flag, 0, "");
 423 SYSCTL_INT(_hw_optional, OID_AUTO, dcba, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &dcba_flag, 0, "");
 424 SYSCTL_INT(_hw_optional, OID_AUTO, datastreams, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &datastreams_flag, 0, "");
 425 SYSCTL_INT(_hw_optional, OID_AUTO, dcbtstreams, CTLFLAG_RD | CTLFLAG_NOAUTO | CTLFLAG_KERN, &dcbtstreams_flag, 0, "");
 426 #elif defined (__i386__)
 427 int mmx_flag = -1;
 428 int sse_flag = -1;
 429 int sse2_flag = -1;
 430 int sse3_flag = -1;
 431 int sse4_1_flag = -1;
 432 int sse4_2_flag = -1;
 433 int x86_64_flag = -1;
 434 int supplementalsse3_flag = -1;
 435
 436 SYSCTL_INT(_hw_optional, OID_AUTO, mmx, CTLFLAG_RD | CTLFLAG_KERN, &mmx_flag, 0, "");
 437 SYSCTL_INT(_hw_optional, OID_AUTO, sse, CTLFLAG_RD | CTLFLAG_KERN, &sse_flag, 0, "");
 438 SYSCTL_INT(_hw_optional, OID_AUTO, sse2, CTLFLAG_RD | CTLFLAG_KERN, &sse2_flag, 0, "");
 439 SYSCTL_INT(_hw_optional, OID_AUTO, sse3, CTLFLAG_RD | CTLFLAG_KERN, &sse3_flag, 0, "");
 440 SYSCTL_INT(_hw_optional, OID_AUTO, supplementalsse3, CTLFLAG_RD | CTLFLAG_KERN, &supplementalsse3_flag, 0, "");
 441 SYSCTL_INT(_hw_optional, OID_AUTO, sse4_1, CTLFLAG_RD | CTLFLAG_KERN, &sse4_1_flag, 0, "");
 442 SYSCTL_INT(_hw_optional, OID_AUTO, sse4_2, CTLFLAG_RD | CTLFLAG_KERN, &sse4_2_flag, 0, "");
 443 SYSCTL_INT(_hw_optional, OID_AUTO, x86_64, CTLFLAG_RD | CTLFLAG_KERN, &x86_64_flag, 0, "");
 444 #endif /* __ppc__ */
 445
 446 /*
 447  * Debugging interface to the CPU power management code.
 448  */
 449 static int
 450 pmsSysctl(__unused struct sysctl_oid *oidp, __unused void *arg1,
 451           __unused int arg2, struct sysctl_req *req)
 452 {
 453         pmsctl_t        ctl;
 454         int             error;
 455         boolean_t       intr;
 456
 457         if ((error = SYSCTL_IN(req, &ctl, sizeof(ctl))))
 458                 return(error);
 459
 460         intr = ml_set_interrupts_enabled(FALSE);                /* No interruptions in here */
 461         error = pmsControl(ctl.request, (user_addr_t)(unsigned long)ctl.reqaddr, ctl.reqsize);
 462         (void)ml_set_interrupts_enabled(intr);                  /* Restore interruptions */
 463
 464         return(error);
 465 }
 466
 467 SYSCTL_PROC(_hw, OID_AUTO, pms, CTLTYPE_STRUCT | CTLFLAG_WR, 0, 0, pmsSysctl, "S", "Processor Power Management");
 468
 469
 470
 471 /******************************************************************************
 472  * Generic MIB initialisation.
 473  *
 474  * This is a hack, and should be replaced with SYSINITs
 475  * at some point.
 476  */
 477 void
 478 sysctl_mib_init(void)
 479 {
 480         cputype = cpu_type();
 481         cpusubtype = cpu_subtype();
 482         cputhreadtype = cpu_threadtype();
 483 #if defined(__ppc__)
 484     cpu64bit = (_cpu_capabilities & k64Bit) == k64Bit;
 485 #elif defined(__i386__)
 486     cpu64bit = (_get_cpu_capabilities() & k64Bit) == k64Bit;
 487 #endif
 488
 489         /*
 490          * Populate the optional portion of the hw.* MIB.
 491          *
 492          * XXX This could be broken out into parts of the code
 493          *     that actually directly relate to the functions in
 494          *     question.
 495          */
 496
 497         if (cputhreadtype != CPU_THREADTYPE_NONE) {
 498                 sysctl_register_oid(&sysctl__hw_cputhreadtype);
 499         }
 500
 501 #ifdef __ppc__
 502 /*
 503  * The convention for these is as follows:
 504  * If the sysctl does not exist, the functionality is not present in the CPU.
 505  * If the sysctl exists, it will not crash, and should otherwise function
 506  *   corectly.
 507  * If the sysctl exists and returns 0, we advise against using this feature.
 508  * If the sysctl exists and returns 1, we advise it's use.
 509  */
 510
 511         if (_cpu_capabilities & kHasAltivec) {
 512                 altivec_flag = 1;
 513                 sysctl_register_oid(&sysctl__hw_optional_altivec);
 514         }
 515         if (_cpu_capabilities & kHasGraphicsOps) {
 516                 graphicsops_flag = 1;
 517                 sysctl_register_oid(&sysctl__hw_optional_graphicsops);
 518         }
 519         if (_cpu_capabilities & k64Bit) {
 520                 x64bitops_flag = 1;
 521                 sysctl_register_oid(&sysctl__hw_optional_64bitops);
 522         }
 523         if (_cpu_capabilities & kHasFsqrt) {
 524                 fsqrt_flag = 1;
 525                 sysctl_register_oid(&sysctl__hw_optional_fsqrt);
 526         }
 527         if (_cpu_capabilities & kHasStfiwx) {
 528                 stfiwx_flag = 1;
 529                 sysctl_register_oid(&sysctl__hw_optional_stfiwx);
 530         }
 531         if (_cpu_capabilities & kDcbaAvailable)
 532                 dcba_flag = 0;
 533         if (_cpu_capabilities & kDcbaRecommended)
 534                 dcba_flag = 1;
 535         if (dcba_flag >= 0)
 536                 sysctl_register_oid(&sysctl__hw_optional_dcba);
 537         if (_cpu_capabilities & kDataStreamsAvailable)
 538                 datastreams_flag = 0;
 539         if (_cpu_capabilities & kDataStreamsRecommended)
 540                 datastreams_flag = 1;
 541         if (datastreams_flag >= 0)
 542                 sysctl_register_oid(&sysctl__hw_optional_datastreams);
 543         if (_cpu_capabilities & kDcbtStreamsAvailable)
 544                 dcbtstreams_flag = 0;
 545         if (_cpu_capabilities & kDcbtStreamsRecommended)
 546                 dcbtstreams_flag = 1;
 547         if (dcbtstreams_flag >= 0)
 548                 sysctl_register_oid(&sysctl__hw_optional_dcbtstreams);
 549
 550         /* hw.cpufamily */
 551         switch (cpusubtype) {
 552         case CPU_SUBTYPE_POWERPC_750:
 553                 cpufamily = CPUFAMILY_POWERPC_G3;
 554                 break;
 555         case CPU_SUBTYPE_POWERPC_7400:
 556         case CPU_SUBTYPE_POWERPC_7450:
 557                 cpufamily = CPUFAMILY_POWERPC_G4;
 558                 break;
 559         case CPU_SUBTYPE_POWERPC_970:
 560                 cpufamily = CPUFAMILY_POWERPC_G5;
 561                 break;
 562         default:
 563                 cpufamily = CPUFAMILY_UNKNOWN;
 564         }
 565
 566         ml_cpu_info_t cpu_info;
 567         ml_cpu_get_info(&cpu_info);
 568
 569         host_basic_info_data_t hinfo;
 570         mach_msg_type_number_t count = HOST_BASIC_INFO_COUNT;
 571         kern_return_t kret = host_info((host_t)BSD_HOST, HOST_BASIC_INFO, (host_info_t)&hinfo, &count);
 572         if(kret != KERN_SUCCESS)
 573         {
 574                 hinfo.max_cpus = 1;
 575         }
 576
 577         /* hw.cachesize */
 578         cachesize[0] = max_mem;
 579         cachesize[1] = cpu_info.l1_dcache_size;
 580         cachesize[2] = cpu_info.l2_settings ? cpu_info.l2_cache_size : 0;
 581         cachesize[3] = cpu_info.l3_settings ? cpu_info.l3_cache_size : 0;
 582         cachesize[4] = 0;
 583
 584         /* hw.cacheconfig */
 585         cacheconfig[0] = hinfo.max_cpus;
 586         cacheconfig[1] = 1;
 587         cacheconfig[2] = cachesize[2] ? 1 : 0;
 588         cacheconfig[3] = cachesize[3] ? 1 : 0;
 589         cacheconfig[4] = 0;
 590
 591         /* hw.packages */
 592         if (cpusubtype == CPU_SUBTYPE_POWERPC_970 &&
 593             cpu_info.l2_cache_size == 1 * 1024 * 1024)
 594                 /* The signature of the dual-core G5 */
 595                 packages = hinfo.max_cpus / 2;
 596         else
 597                 packages = hinfo.max_cpus;
 598
 599 #elif defined (__i386__)
 600         mmx_flag = ((_get_cpu_capabilities() & kHasMMX) == kHasMMX)? 1 : 0;
 601         sse_flag = ((_get_cpu_capabilities() & kHasSSE) == kHasSSE)? 1 : 0;
 602         sse2_flag = ((_get_cpu_capabilities() & kHasSSE2) == kHasSSE2)? 1 : 0;
 603         sse3_flag = ((_get_cpu_capabilities() & kHasSSE3) == kHasSSE3)? 1 : 0;
 604         supplementalsse3_flag = ((_get_cpu_capabilities() & kHasSupplementalSSE3) == kHasSupplementalSSE3)? 1 : 0;
 605         sse4_1_flag = ((_get_cpu_capabilities() & kHasSSE4_1) == kHasSSE4_1)? 1 : 0;
 606         sse4_2_flag = ((_get_cpu_capabilities() & kHasSSE4_2) == kHasSSE4_2)? 1 : 0;
 607         x86_64_flag = ((_get_cpu_capabilities() & k64Bit) == k64Bit)? 1 : 0;
 608
 609         /* hw.cpufamily */
 610         switch (cpuid_info()->cpuid_family) {
 611         case 6:
 612                 switch (cpuid_info()->cpuid_model) {
 613                 case 13:
 614                         cpufamily = CPUFAMILY_INTEL_6_13;
 615                         break;
 616                 case 14:
 617                         cpufamily = CPUFAMILY_INTEL_6_14; /* Core Solo/Duo */
 618                         break;
 619                 case 15:
 620                         cpufamily = CPUFAMILY_INTEL_6_15; /* Core 2 */
 621                         break;
 622                 case 23:
 623                         cpufamily = CPUFAMILY_INTEL_6_23;
 624                         break;
 625                 case 26:
 626                         cpufamily = CPUFAMILY_INTEL_6_26;
 627                         break;
 628                 default:
 629                         cpufamily = CPUFAMILY_UNKNOWN;
 630                 }
 631                 break;
 632         default:
 633                 cpufamily = CPUFAMILY_UNKNOWN;
 634         }
 635         /* hw.cacheconfig */
 636         cacheconfig[0] = ml_cpu_cache_sharing(0);
 637         cacheconfig[1] = ml_cpu_cache_sharing(1);
 638         cacheconfig[2] = ml_cpu_cache_sharing(2);
 639         cacheconfig[3] = ml_cpu_cache_sharing(3);
 640         cacheconfig[4] = 0;
 641
 642         /* hw.cachesize */
 643         cachesize[0] = ml_cpu_cache_size(0);
 644         cachesize[1] = ml_cpu_cache_size(1);
 645         cachesize[2] = ml_cpu_cache_size(2);
 646         cachesize[3] = ml_cpu_cache_size(3);
 647         cachesize[4] = 0;
 648
 649         /* hw.packages */
 650         packages = ml_cpu_cache_sharing(0) /
 651                         cpuid_info()->cpuid_cores_per_package;
 652
 653 #else /* end __arm__ */
 654 # warning we do not support this platform yet
 655 #endif /* __ppc__ */
 656
 657
 658 }
 659