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1 /*
2 * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
7 *
8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * file.
14 *
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
22 *
23 * @APPLE_LICENSE_HEADER_END@
24 */
25
26 #ifndef _PPC_CPU_CAPABILITIES_H
27 #define _PPC_CPU_CAPABILITIES_H
28
29 /* Sadly, some clients of this interface misspell __APPLE_API_PRIVATE.
30 * To avoid breaking them, we accept the incorrect _APPLE_API_PRIVATE.
31 */
32 #ifdef _APPLE_API_PRIVATE
33 #ifndef __APPLE_API_PRIVATE
34 #define __APPLE_API_PRIVATE
35 #endif /* __APPLE_API_PRIVATE */
36 #endif /* _APPLE_API_PRIVATE */
37
38 #ifndef __APPLE_API_PRIVATE
39 #error cpu_capabilities.h is for Apple Internal use only
40 #else /* __APPLE_API_PRIVATE */
41
42 /* _cpu_capabilities
43 *
44 * This is the authoritative way to determine from user mode what
45 * implementation-specific processor features are available.
46 * This API only supported for Apple internal use.
47 *
48 */
49
50 #ifndef __ASSEMBLER__
51
52 extern int _cpu_capabilities;
53
54 #endif /* __ASSEMBLER__ */
55
56 /* Bit definitions for _cpu_capabilities: */
57
58 #define kHasAltivec 0x00000001
59 #define k64Bit 0x00000002 // 64-bit GPRs
60 #define kCache32 0x00000004 // cache line size is 32 bytes
61 #define kCache64 0x00000008
62 #define kCache128 0x00000010
63 #define kDcbaRecommended 0x00000020 // PPC: dcba is available and recommended
64 #define kDcbaAvailable 0x00000040 // PPC: dcba is available but is not recommended
65 #define kDataStreamsRecommended 0x00000080 // PPC: dst, dstt, dstst, dss, and dssall instructions available and recommended
66 #define kDataStreamsAvailable 0x00000100 // PPC: dst, dstt, dstst, dss, and dssall instructions available but not recommended
67 #define kDcbtStreamsRecommended 0x00000200 // PPC: enhanced dcbt instruction available and recommended
68 #define kDcbtStreamsAvailable 0x00000400 // PPC: enhanced dcbt instruction available and recommended
69
70 #define kUP 0x00008000 // set if (kNumCPUs == 1)
71 #define kNumCPUs 0x00FF0000 // number of CPUs (see _NumCPUs() below)
72
73 #define kNumCPUsShift 16 // see _NumCPUs() below
74
75 #define kHasGraphicsOps 0x08000000 // PPC: has fres, frsqrte, and fsel instructions
76 #define kHasStfiwx 0x10000000 // PPC: has stfiwx instruction
77 #define kHasFsqrt 0x20000000 // PPC: has fsqrt and fsqrts instructions
78
79 #ifndef __ASSEMBLER__
80
81 static __inline__ int _NumCPUs( void ) { return (_cpu_capabilities & kNumCPUs) >> kNumCPUsShift; }
82
83 #endif /* __ASSEMBLER__ */
84
85
86 /*
87 * The shared kernel/user "comm page(s)":
88 *
89 * The last eight pages of every address space are reserved for the kernel/user
90 * "comm area". Because they can be addressed via a sign-extended 16-bit field,
91 * it is particularly efficient to access code or data in the comm area with
92 * absolute branches (ba, bla, bca) or absolute load/stores ("lwz r0,-4096(0)").
93 * Because the comm area can be reached from anywhere, dyld is not needed.
94 * Although eight pages are reserved, presently only two are populated and mapped.
95 *
96 * Routines on the comm page(s) can be thought of as the firmware for extended processor
97 * instructions, whose opcodes are special forms of "bla". Ie, they are cpu
98 * capabilities. During system initialization, the kernel populates the comm page with
99 * code customized for the particular processor and platform.
100 *
101 * Because Mach VM cannot map the last page of an address space, the max length of
102 * the comm area is seven pages.
103 */
104
105 #define _COMM_PAGE_BASE_ADDRESS (-8*4096) // start at page -8, ie 0xFFFF8000
106 #define _COMM_PAGE_AREA_LENGTH ( 7*4096) // reserved length of entire comm area
107 #define _COMM_PAGE_AREA_USED ( 2*4096) // we use two pages so far
108
109 /* data in the comm page */
110
111 #define _COMM_PAGE_SIGNATURE (_COMM_PAGE_BASE_ADDRESS+0x000) // first few bytes are a signature
112 #define _COMM_PAGE_VERSION (_COMM_PAGE_BASE_ADDRESS+0x01E) // 16-bit version#
113 #define _COMM_PAGE_THIS_VERSION 1 // this is version 1 of the commarea format
114
115 #define _COMM_PAGE_CPU_CAPABILITIES (_COMM_PAGE_BASE_ADDRESS+0x020) // mirror of extern int _cpu_capabilities
116 #define _COMM_PAGE_NCPUS (_COMM_PAGE_BASE_ADDRESS+0x021) // number of configured CPUs
117 #define _COMM_PAGE_ALTIVEC (_COMM_PAGE_BASE_ADDRESS+0x024) // nonzero if Altivec available
118 #define _COMM_PAGE_64_BIT (_COMM_PAGE_BASE_ADDRESS+0x025) // nonzero if 64-bit processor
119 #define _COMM_PAGE_CACHE_LINESIZE (_COMM_PAGE_BASE_ADDRESS+0x026) // cache line size (16-bit field)
120
121 #define _COMM_PAGE_UNUSED1 (_COMM_PAGE_BASE_ADDRESS+0x030) // 16 unused bytes
122
123 #define _COMM_PAGE_2_TO_52 (_COMM_PAGE_BASE_ADDRESS+0x040) // double float constant 2**52
124 #define _COMM_PAGE_10_TO_6 (_COMM_PAGE_BASE_ADDRESS+0x048) // double float constant 10**6
125
126 #define _COMM_PAGE_UNUSED2 (_COMM_PAGE_BASE_ADDRESS+0x050) // 16 unused bytes
127
128 #define _COMM_PAGE_TIMEBASE (_COMM_PAGE_BASE_ADDRESS+0x060) // used by gettimeofday()
129 #define _COMM_PAGE_TIMESTAMP (_COMM_PAGE_BASE_ADDRESS+0x068) // used by gettimeofday()
130 #define _COMM_PAGE_SEC_PER_TICK (_COMM_PAGE_BASE_ADDRESS+0x070) // used by gettimeofday()
131
132 #define _COMM_PAGE_UNUSED3 (_COMM_PAGE_BASE_ADDRESS+0x080) // 384 unused bytes
133
134 /* jump table (bla to this address, which may be a branch to the actual code somewhere else) */
135
136 #define _COMM_PAGE_ABSOLUTE_TIME (_COMM_PAGE_BASE_ADDRESS+0x200) // mach_absolute_time()
137 #define _COMM_PAGE_SPINLOCK_TRY (_COMM_PAGE_BASE_ADDRESS+0x220) // spinlock_try()
138 #define _COMM_PAGE_SPINLOCK_LOCK (_COMM_PAGE_BASE_ADDRESS+0x260) // spinlock_lock()
139 #define _COMM_PAGE_SPINLOCK_UNLOCK (_COMM_PAGE_BASE_ADDRESS+0x2a0) // spinlock_unlock()
140 #define _COMM_PAGE_PTHREAD_GETSPECIFIC (_COMM_PAGE_BASE_ADDRESS+0x2c0) // pthread_getspecific()
141 #define _COMM_PAGE_GETTIMEOFDAY (_COMM_PAGE_BASE_ADDRESS+0x2e0) // used by gettimeofday()
142 #define _COMM_PAGE_FLUSH_DCACHE (_COMM_PAGE_BASE_ADDRESS+0x4e0) // sys_dcache_flush()
143 #define _COMM_PAGE_FLUSH_ICACHE (_COMM_PAGE_BASE_ADDRESS+0x520) // sys_icache_invalidate()
144 #define _COMM_PAGE_PTHREAD_SELF (_COMM_PAGE_BASE_ADDRESS+0x580) // pthread_self()
145 #define _COMM_PAGE_UNUSED4 (_COMM_PAGE_BASE_ADDRESS+0x5a0) // 32 unused bytes
146 #define _COMM_PAGE_RELINQUISH (_COMM_PAGE_BASE_ADDRESS+0x5c0) // used by spinlocks
147
148 #define _COMM_PAGE_UNUSED5 (_COMM_PAGE_BASE_ADDRESS+0x5e0) // 32 unused bytes
149
150 #define _COMM_PAGE_BZERO (_COMM_PAGE_BASE_ADDRESS+0x600) // bzero()
151 #define _COMM_PAGE_BCOPY (_COMM_PAGE_BASE_ADDRESS+0x780) // bcopy()
152 #define _COMM_PAGE_MEMCPY (_COMM_PAGE_BASE_ADDRESS+0x7a0) // memcpy()
153 #define _COMM_PAGE_MEMMOVE (_COMM_PAGE_BASE_ADDRESS+0x7a0) // memmove()
154
155 #define _COMM_PAGE_UNUSED6 (_COMM_PAGE_BASE_ADDRESS+0xF80) // 128 unused bytes
156
157 #define _COMM_PAGE_BIGCOPY (_COMM_PAGE_BASE_ADDRESS+0x1000)// very-long-operand copies
158
159 #endif /* __APPLE_API_PRIVATE */
160 #endif /* _PPC_CPU_CAPABILITIES_H */