2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
4 * @APPLE_LICENSE_HEADER_START@
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
20 * @APPLE_LICENSE_HEADER_END@
27 #include <mach_ldebug.h>
31 #include <kern/misc_protos.h>
32 #include <kern/thread.h>
33 #include <kern/processor.h>
34 #include <machine/machine_routines.h>
36 #include <ppc/proc_reg.h>
37 #include <ppc/misc_protos.h>
39 #include <ppc/new_screen.h>
40 #include <ppc/exception.h>
41 #include <ppc/Firmware.h>
42 #include <ppc/savearea.h>
43 #include <ppc/low_trace.h>
44 #include <ppc/Diagnostics.h>
46 #include <ppc/mappings.h>
48 #include <pexpert/pexpert.h>
50 extern unsigned int intstack_top_ss
; /* declared in start.s */
51 extern unsigned int debstackptr
; /* declared in start.s */
52 extern unsigned int debstack_top_ss
; /* declared in start.s */
54 int pc_trace_buf
[1024] = {0};
55 int pc_trace_cnt
= 1024;
57 extern unsigned int extPatchMCK
;
58 extern unsigned int extPatch32
;
59 extern unsigned int hwulckPatch_isync
;
60 extern unsigned int hwulckPatch_eieio
;
61 extern unsigned int hwulckbPatch_isync
;
62 extern unsigned int hwulckbPatch_eieio
;
63 extern unsigned int mulckPatch_isync
;
64 extern unsigned int mulckPatch_eieio
;
65 extern unsigned int sulckPatch_isync
;
66 extern unsigned int sulckPatch_eieio
;
67 extern unsigned int retfsectPatch_eieio
;
68 extern unsigned int retfsectPatch_isync
;
72 patch_entry_t patch_table
[PATCH_TABLE_SIZE
] = {
73 &extPatch32
, 0x60000000, PATCH_FEATURE
, PatchExt32
,
74 &extPatchMCK
, 0x60000000, PATCH_PROCESSOR
, CPU_SUBTYPE_POWERPC_970
,
75 &hwulckPatch_isync
, 0x60000000, PATCH_FEATURE
, PatchLwsync
,
76 &hwulckPatch_eieio
, 0x7c2004ac, PATCH_FEATURE
, PatchLwsync
,
77 &hwulckbPatch_isync
, 0x60000000, PATCH_FEATURE
, PatchLwsync
,
78 &hwulckbPatch_eieio
, 0x7c2004ac, PATCH_FEATURE
, PatchLwsync
,
79 &mulckPatch_isync
, 0x60000000, PATCH_FEATURE
, PatchLwsync
,
80 &mulckPatch_eieio
, 0x7c2004ac, PATCH_FEATURE
, PatchLwsync
,
81 &sulckPatch_isync
, 0x60000000, PATCH_FEATURE
, PatchLwsync
,
82 &sulckPatch_eieio
, 0x7c2004ac, PATCH_FEATURE
, PatchLwsync
,
84 &retfsectPatch_isync
, 0x60000000, PATCH_FEATURE
, PatchLwsync
,
85 &retfsectPatch_eieio
, 0x7c2004ac, PATCH_FEATURE
, PatchLwsync
87 0, 0, PATCH_INVALID
, 0,
88 0, 0, PATCH_INVALID
, 0
92 void ppc_init(boot_args
*args
)
95 unsigned long *src
,*dst
;
97 unsigned long addr
, videoAddr
;
99 uint64_t xmaxmem
, newhid
;
100 unsigned int cputrace
;
101 unsigned int novmx
, fhrdl1
;
102 extern vm_offset_t static_memory_end
;
107 * Setup per_proc info for first cpu.
110 per_proc_info
[0].cpu_number
= 0;
111 per_proc_info
[0].cpu_flags
= 0;
112 per_proc_info
[0].istackptr
= 0; /* we're on the interrupt stack */
113 per_proc_info
[0].intstack_top_ss
= intstack_top_ss
;
114 per_proc_info
[0].debstackptr
= debstackptr
;
115 per_proc_info
[0].debstack_top_ss
= debstack_top_ss
;
116 per_proc_info
[0].interrupts_enabled
= 0;
117 per_proc_info
[0].pp_preemption_count
= -1;
118 per_proc_info
[0].pp_simple_lock_count
= 0;
119 per_proc_info
[0].pp_interrupt_level
= 0;
120 per_proc_info
[0].need_ast
= (unsigned int)&need_ast
[0];
121 per_proc_info
[0].FPU_owner
= 0;
122 per_proc_info
[0].VMX_owner
= 0;
123 mp
= (mapping
*)per_proc_info
[0].ppCIOmp
;
124 mp
->mpFlags
= 0x01000000 | mpSpecial
| 1;
125 mp
->mpSpace
= invalSpace
;
127 machine_slot
[0].is_cpu
= TRUE
;
131 thread
= current_act();
132 thread
->mact
.curctx
= &thread
->mact
.facctx
;
133 thread
->mact
.facctx
.facAct
= thread
;
134 thread
->mact
.cioSpace
= invalSpace
; /* Initialize copyin/out space to invalid */
135 thread
->mact
.preemption_count
= 1;
140 * Setup some processor related structures to satisfy funnels.
141 * Must be done before using unparallelized device drivers.
143 processor_ptr
[0] = &processor_array
[0];
145 master_processor
= cpu_to_processor(master_cpu
);
147 static_memory_end
= round_page_32(args
->topOfKernelData
);;
149 PE_init_platform(FALSE
, args
); /* Get platform expert set up */
151 if (!PE_parse_boot_arg("novmx", &novmx
)) novmx
=0; /* Special run without VMX? */
152 if(novmx
) { /* Yeah, turn it off */
153 for(i
= 0; i
< NCPUS
; i
++) { /* Cycle through all potential processors */
154 per_proc_info
[i
].pf
.Available
&= ~pfAltivec
; /* Turn off Altivec available */
156 __asm__
volatile("mtsprg 2,%0" : : "r" (per_proc_info
[0].pf
.Available
)); /* Set live value */
159 if (!PE_parse_boot_arg("fn", &forcenap
)) forcenap
= 0; /* If force nap not set, make 0 */
161 if(forcenap
< 2) forcenap
= forcenap
+ 1; /* Else set 1 for off, 2 for on */
162 else forcenap
= 0; /* Clear for error case */
165 if (!PE_parse_boot_arg("diag", &dgWork
.dgFlags
)) dgWork
.dgFlags
=0; /* Set diagnostic flags */
166 if(dgWork
.dgFlags
& enaExpTrace
) trcWork
.traceMask
= 0xFFFFFFFF; /* If tracing requested, enable it */
168 if(PE_parse_boot_arg("ctrc", &cputrace
)) { /* See if tracing is limited to a specific cpu */
169 trcWork
.traceMask
= (trcWork
.traceMask
& 0xFFFFFFF0) | (cputrace
& 0xF); /* Limit to 4 */
172 if(!PE_parse_boot_arg("tb", &trcWork
.traceSize
)) { /* See if non-default trace buffer size */
174 trcWork
.traceSize
= 32; /* Default 32 page trace table for DEBUG */
176 trcWork
.traceSize
= 8; /* Default 8 page trace table for RELEASE */
180 if(trcWork
.traceSize
< 1) trcWork
.traceSize
= 1; /* Minimum size of 1 page */
181 if(trcWork
.traceSize
> 256) trcWork
.traceSize
= 256; /* Maximum size of 256 pages */
182 trcWork
.traceSize
= trcWork
.traceSize
* 4096; /* Change page count to size */
184 if (!PE_parse_boot_arg("maxmem", &maxmem
))
187 xmaxmem
= (uint64_t)maxmem
* (1024 * 1024);
190 * VM initialization, after this we're using page tables...
193 ppc_vm_init(xmaxmem
, args
);
195 if(per_proc_info
[0].pf
.Available
& pf64Bit
) { /* Are we on a 64-bit machine */
196 if(PE_parse_boot_arg("fhrdl1", &fhrdl1
)) { /* Have they supplied "Force Hardware Recovery of Data cache level 1 errors? */
197 newhid
= per_proc_info
[0].pf
.pfHID5
; /* Get the old HID5 */
199 newhid
&= 0xFFFFFFFFFFFFDFFFULL
; /* Clear the old one */
200 newhid
|= (fhrdl1
^ 1) << 13; /* Set new value to enable machine check recovery */
201 for(i
= 0; i
< NCPUS
; i
++) per_proc_info
[i
].pf
.pfHID5
= newhid
; /* Set all shadows */
202 hid5set64(newhid
); /* Set the hid for this processir */
208 PE_init_platform(TRUE
, args
);
210 machine_startup(args
);
214 struct per_proc_info
*proc_info
)
218 proc_info
->cpu_flags
&= ~SleepState
;
220 if(!(proc_info
->next_savearea
)) /* Do we have a savearea set up already? */
221 proc_info
->next_savearea
= (uint64_t)save_get_init(); /* Get a savearea */
225 ppc_vm_cpu_init(proc_info
);
227 ml_thrm_init(); /* Start thermal monitoring on this processor */