osfmk/ppc/chud/chud_cpu_asm.s

   1 /*
   2  * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22
  23 #define ASSEMBLER
  24 #include <ppc/chud/chud_spr.h>
  25 #include <ppc/asm.h>
  26 #include <mach/kern_return.h>
  27
  28                         .text
  29             .align  5
  30             .globl  EXT(chudxnu_mfsrr0_64)
  31 EXT(chudxnu_mfsrr0_64):
  32             mfspr       r5,chud_ppc_srr0
  33             std         r5,0(r3)
  34             blr
  35
  36             .align  5
  37             .globl  EXT(chudxnu_mfsrr1_64)
  38 EXT(chudxnu_mfsrr1_64):
  39             mfspr       r5,chud_ppc_srr1
  40             std         r5,0(r3)
  41             blr
  42
  43             .align  5
  44             .globl  EXT(chudxnu_mfdar_64)
  45 EXT(chudxnu_mfdar_64):
  46             mfspr       r5,chud_ppc_dar
  47             std         r5,0(r3)
  48             blr
  49
  50             .align  5
  51             .globl  EXT(chudxnu_mfsdr1_64)
  52 EXT(chudxnu_mfsdr1_64):
  53             mfspr       r5,chud_ppc_sdr1
  54             std         r5,0(r3)
  55             blr
  56
  57             .align  5
  58             .globl  EXT(chudxnu_mfsprg0_64)
  59 EXT(chudxnu_mfsprg0_64):
  60             mfspr       r5,chud_ppc_sprg0
  61             std         r5,0(r3)
  62             blr
  63
  64             .align  5
  65             .globl  EXT(chudxnu_mfsprg1_64)
  66 EXT(chudxnu_mfsprg1_64):
  67             mfspr       r5,chud_ppc_sprg1
  68             std         r5,0(r3)
  69             blr
  70
  71             .align  5
  72             .globl  EXT(chudxnu_mfsprg2_64)
  73 EXT(chudxnu_mfsprg2_64):
  74             mfspr       r5,chud_ppc_sprg2
  75             std         r5,0(r3)
  76             blr
  77
  78             .align  5
  79             .globl  EXT(chudxnu_mfsprg3_64)
  80 EXT(chudxnu_mfsprg3_64):
  81             mfspr       r5,chud_ppc_sprg3
  82             std         r5,0(r3)
  83             blr
  84
  85             .align  5
  86             .globl  EXT(chudxnu_mfasr_64)
  87 EXT(chudxnu_mfasr_64):
  88             mfspr       r5,chud_ppc64_asr
  89             std         r5,0(r3)
  90             blr
  91
  92             .align  5
  93             .globl  EXT(chudxnu_mfdabr_64)
  94 EXT(chudxnu_mfdabr_64):
  95             mfspr       r5,chud_ppc_dabr
  96             std         r5,0(r3)
  97             blr
  98
  99             .align  5
 100             .globl  EXT(chudxnu_mfhid0_64)
 101 EXT(chudxnu_mfhid0_64):
 102             mfspr       r5,chud_970_hid0
 103             std         r5,0(r3)
 104             blr
 105
 106             .align  5
 107             .globl  EXT(chudxnu_mfhid1_64)
 108 EXT(chudxnu_mfhid1_64):
 109             mfspr       r5,chud_970_hid1
 110             std         r5,0(r3)
 111             blr
 112
 113             .align  5
 114             .globl  EXT(chudxnu_mfhid4_64)
 115 EXT(chudxnu_mfhid4_64):
 116             mfspr       r5,chud_970_hid4
 117             std         r5,0(r3)
 118             blr
 119
 120             .align  5
 121             .globl  EXT(chudxnu_mfhid5_64)
 122 EXT(chudxnu_mfhid5_64):
 123             mfspr       r5,chud_970_hid5
 124             std         r5,0(r3)
 125             blr
 126
 127             .align  5
 128             .globl  EXT(chudxnu_mfmmcr0_64)
 129 EXT(chudxnu_mfmmcr0_64):
 130             mfspr       r5,chud_970_mmcr0
 131             std         r5,0(r3)
 132             blr
 133
 134             .align  5
 135             .globl  EXT(chudxnu_mfmmcr1_64)
 136 EXT(chudxnu_mfmmcr1_64):
 137             mfspr       r5,chud_970_mmcr1
 138             std         r5,0(r3)
 139             blr
 140
 141             .align  5
 142             .globl  EXT(chudxnu_mfmmcra_64)
 143 EXT(chudxnu_mfmmcra_64):
 144             mfspr       r5,chud_970_mmcra
 145             std         r5,0(r3)
 146             blr
 147
 148             .align  5
 149             .globl  EXT(chudxnu_mfsiar_64)
 150 EXT(chudxnu_mfsiar_64):
 151             mfspr       r5,chud_970_siar
 152             std         r5,0(r3)
 153             blr
 154
 155             .align  5
 156             .globl  EXT(chudxnu_mfsdar_64)
 157 EXT(chudxnu_mfsdar_64):
 158             mfspr       r5,chud_970_sdar
 159             std         r5,0(r3)
 160             blr
 161
 162             .align  5
 163             .globl  EXT(chudxnu_mfimc_64)
 164 EXT(chudxnu_mfimc_64):
 165             mfspr       r5,chud_970_imc
 166             std         r5,0(r3)
 167             blr
 168
 169             .align  5
 170             .globl  EXT(chudxnu_mfrmor_64)
 171 EXT(chudxnu_mfrmor_64):
 172             mfspr       r5,chud_970_rmor
 173             std         r5,0(r3)
 174             blr
 175
 176             .align  5
 177             .globl  EXT(chudxnu_mfhrmor_64)
 178 EXT(chudxnu_mfhrmor_64):
 179             mfspr       r5,chud_970_hrmor
 180             std         r5,0(r3)
 181             blr
 182
 183             .align  5
 184             .globl  EXT(chudxnu_mfhior_64)
 185 EXT(chudxnu_mfhior_64):
 186             mfspr       r5,chud_970_hior
 187             std         r5,0(r3)
 188             blr
 189
 190             .align  5
 191             .globl  EXT(chudxnu_mflpidr_64)
 192 EXT(chudxnu_mflpidr_64):
 193             mfspr       r5,chud_970_lpidr
 194             std         r5,0(r3)
 195             blr
 196
 197             .align  5
 198             .globl  EXT(chudxnu_mflpcr_64)
 199 EXT(chudxnu_mflpcr_64):
 200             mfspr       r5,chud_970_lpcr
 201             std         r5,0(r3)
 202             blr
 203
 204             .align  5
 205             .globl  EXT(chudxnu_mfdabrx_64)
 206 EXT(chudxnu_mfdabrx_64):
 207             mfspr       r5,chud_970_dabrx
 208             std         r5,0(r3)
 209             blr
 210
 211             .align  5
 212             .globl  EXT(chudxnu_mfhsprg0_64)
 213 EXT(chudxnu_mfhsprg0_64):
 214             mfspr       r5,chud_970_hsprg0
 215             std         r5,0(r3)
 216             blr
 217
 218             .align  5
 219             .globl  EXT(chudxnu_mfhsprg1_64)
 220 EXT(chudxnu_mfhsprg1_64):
 221             mfspr       r5,chud_970_hsprg1
 222             std         r5,0(r3)
 223             blr
 224
 225             .align  5
 226             .globl  EXT(chudxnu_mfhsrr0_64)
 227 EXT(chudxnu_mfhsrr0_64):
 228             mfspr       r5,chud_970_hsrr0
 229             std         r5,0(r3)
 230             blr
 231
 232             .align  5
 233             .globl  EXT(chudxnu_mfhsrr1_64)
 234 EXT(chudxnu_mfhsrr1_64):
 235             mfspr       r5,chud_970_hsrr1
 236             std         r5,0(r3)
 237             blr
 238
 239             .align  5
 240             .globl  EXT(chudxnu_mfhdec_64)
 241 EXT(chudxnu_mfhdec_64):
 242             mfspr       r5,chud_970_hdec
 243             std         r5,0(r3)
 244             blr
 245
 246             .align  5
 247             .globl  EXT(chudxnu_mftrig0_64)
 248 EXT(chudxnu_mftrig0_64):
 249             mfspr       r5,chud_970_trig0
 250             std         r5,0(r3)
 251             blr
 252
 253             .align  5
 254             .globl  EXT(chudxnu_mftrig1_64)
 255 EXT(chudxnu_mftrig1_64):
 256             mfspr       r5,chud_970_trig1
 257             std         r5,0(r3)
 258             blr
 259
 260             .align  5
 261             .globl  EXT(chudxnu_mftrig2_64)
 262 EXT(chudxnu_mftrig2_64):
 263             mfspr       r5,chud_970_trig2
 264             std         r5,0(r3)
 265             blr
 266
 267             .align  5
 268             .globl  EXT(chudxnu_mfaccr_64)
 269 EXT(chudxnu_mfaccr_64):
 270             mfspr       r5,chud_ppc64_accr
 271             std         r5,0(r3)
 272             blr
 273
 274             .align  5
 275             .globl  EXT(chudxnu_mfscomc_64)
 276 EXT(chudxnu_mfscomc_64):
 277             mfspr       r5,chud_970_scomc
 278             std         r5,0(r3)
 279             blr
 280
 281             .align  5
 282             .globl  EXT(chudxnu_mfscomd_64)
 283 EXT(chudxnu_mfscomd_64):
 284             mfspr       r5,chud_970_scomd
 285             std         r5,0(r3)
 286             blr
 287
 288             .align  5
 289             .globl  EXT(chudxnu_mtsrr0_64)
 290 EXT(chudxnu_mtsrr0_64):
 291             ld          r5,0(r4)
 292             mtspr       chud_ppc_srr0,r5
 293             blr
 294
 295             .align  5
 296             .globl  EXT(chudxnu_mtsrr1_64)
 297 EXT(chudxnu_mtsrr1_64):
 298             ld          r5,0(r4)
 299             mtspr       chud_ppc_srr1,r5
 300             blr
 301
 302             .align  5
 303             .globl  EXT(chudxnu_mtdar_64)
 304 EXT(chudxnu_mtdar_64):
 305             ld          r5,0(r4)
 306             mtspr       chud_ppc_dar,r5
 307             blr
 308
 309             .align  5
 310             .globl  EXT(chudxnu_mtsdr1_64)
 311 EXT(chudxnu_mtsdr1_64):
 312             ld          r5,0(r4)
 313             mtspr       chud_ppc_sdr1,r5
 314             blr
 315
 316             .align  5
 317             .globl  EXT(chudxnu_mtsprg0_64)
 318 EXT(chudxnu_mtsprg0_64):
 319             ld          r5,0(r4)
 320             mtspr       chud_ppc_sprg0,r5
 321             blr
 322
 323             .align  5
 324             .globl  EXT(chudxnu_mtsprg1_64)
 325 EXT(chudxnu_mtsprg1_64):
 326             ld          r5,0(r4)
 327             mtspr       chud_ppc_sprg1,r5
 328             blr
 329
 330             .align  5
 331             .globl  EXT(chudxnu_mtsprg2_64)
 332 EXT(chudxnu_mtsprg2_64):
 333             ld          r5,0(r4)
 334             mtspr       chud_ppc_sprg2,r5
 335             blr
 336
 337             .align  5
 338             .globl  EXT(chudxnu_mtsprg3_64)
 339 EXT(chudxnu_mtsprg3_64):
 340             ld          r5,0(r4)
 341             mtspr       chud_ppc_sprg3,r5
 342             blr
 343
 344             .align  5
 345             .globl  EXT(chudxnu_mtasr_64)
 346 EXT(chudxnu_mtasr_64):
 347             ld          r5,0(r4)
 348             mtspr       chud_ppc64_asr,r5
 349             blr
 350
 351             .align  5
 352             .globl  EXT(chudxnu_mtdabr_64)
 353 EXT(chudxnu_mtdabr_64):
 354             ld          r5,0(r4)
 355             mtspr       chud_ppc_dabr,r5
 356             blr
 357
 358             .align  5
 359             .globl  EXT(chudxnu_mthid0_64)
 360 EXT(chudxnu_mthid0_64):
 361             ld          r5,0(r4)
 362             sync
 363             mtspr       chud_970_hid0,r5
 364             mfspr       r5,chud_970_hid0        /* syncronization requirements */
 365             mfspr       r5,chud_970_hid0
 366             mfspr       r5,chud_970_hid0
 367             mfspr       r5,chud_970_hid0
 368             mfspr       r5,chud_970_hid0
 369             mfspr       r5,chud_970_hid0
 370             blr
 371
 372             .align  5
 373             .globl  EXT(chudxnu_mthid1_64)
 374 EXT(chudxnu_mthid1_64):
 375             ld          r5,0(r4)
 376             mtspr       chud_970_hid1,r5        /* tell you twice */
 377             mtspr       chud_970_hid1,r5
 378             isync
 379             blr
 380
 381             .align  5
 382             .globl  EXT(chudxnu_mthid4_64)
 383 EXT(chudxnu_mthid4_64):
 384             ld          r5,0(r4)
 385             sync                                /* syncronization requirements */
 386             mtspr       chud_970_hid4,r5
 387             isync
 388             blr
 389
 390             .align  5
 391             .globl  EXT(chudxnu_mthid5_64)
 392 EXT(chudxnu_mthid5_64):
 393             ld          r5,0(r4)
 394             mtspr       chud_970_hid5,r5
 395             blr
 396
 397             .align  5
 398             .globl  EXT(chudxnu_mtmmcr0_64)
 399 EXT(chudxnu_mtmmcr0_64):
 400             ld          r5,0(r4)
 401             mtspr       chud_970_mmcr0,r5
 402             blr
 403
 404             .align  5
 405             .globl  EXT(chudxnu_mtmmcr1_64)
 406 EXT(chudxnu_mtmmcr1_64):
 407             ld          r5,0(r4)
 408             mtspr       chud_970_mmcr1,r5
 409             blr
 410
 411             .align  5
 412             .globl  EXT(chudxnu_mtmmcra_64)
 413 EXT(chudxnu_mtmmcra_64):
 414             ld          r5,0(r4)
 415             mtspr       chud_970_mmcra,r5
 416             blr
 417
 418             .align  5
 419             .globl  EXT(chudxnu_mtsiar_64)
 420 EXT(chudxnu_mtsiar_64):
 421             ld          r5,0(r4)
 422             mtspr       chud_970_siar,r5
 423             blr
 424
 425             .align  5
 426             .globl  EXT(chudxnu_mtsdar_64)
 427 EXT(chudxnu_mtsdar_64):
 428             ld          r5,0(r4)
 429             mtspr       chud_970_sdar,r5
 430             blr
 431
 432             .align  5
 433             .globl  EXT(chudxnu_mtimc_64)
 434 EXT(chudxnu_mtimc_64):
 435             ld          r5,0(r4)
 436             mtspr       chud_970_imc,r5
 437             blr
 438
 439             .align  5
 440             .globl  EXT(chudxnu_mtrmor_64)
 441 EXT(chudxnu_mtrmor_64):
 442             ld          r5,0(r4)
 443             mtspr       chud_970_rmor,r5
 444             blr
 445
 446             .align  5
 447             .globl  EXT(chudxnu_mthrmor_64)
 448 EXT(chudxnu_mthrmor_64):
 449             ld          r5,0(r4)
 450             mtspr       chud_970_hrmor,r5
 451             blr
 452
 453             .align  5
 454             .globl  EXT(chudxnu_mthior_64)
 455 EXT(chudxnu_mthior_64):
 456             ld          r5,0(r4)
 457             mtspr       chud_970_hior,r5
 458             blr
 459
 460             .align  5
 461             .globl  EXT(chudxnu_mtlpidr_64)
 462 EXT(chudxnu_mtlpidr_64):
 463             ld          r5,0(r4)
 464             mtspr       chud_970_lpidr,r5
 465             blr
 466
 467             .align  5
 468             .globl  EXT(chudxnu_mtlpcr_64)
 469 EXT(chudxnu_mtlpcr_64):
 470             ld          r5,0(r4)
 471             mtspr       chud_970_lpcr,r5
 472             blr
 473
 474             .align  5
 475             .globl  EXT(chudxnu_mtdabrx_64)
 476 EXT(chudxnu_mtdabrx_64):
 477             ld          r5,0(r4)
 478             mtspr       chud_970_lpcr,r5
 479             blr
 480
 481             .align  5
 482             .globl  EXT(chudxnu_mthsprg0_64)
 483 EXT(chudxnu_mthsprg0_64):
 484             ld          r5,0(r4)
 485             mtspr       chud_970_hsprg0,r5
 486             blr
 487
 488             .align  5
 489             .globl  EXT(chudxnu_mthsprg1_64)
 490 EXT(chudxnu_mthsprg1_64):
 491             ld          r5,0(r4)
 492             mtspr       chud_970_hsprg1,r5
 493             blr
 494
 495             .align  5
 496             .globl  EXT(chudxnu_mthsrr0_64)
 497 EXT(chudxnu_mthsrr0_64):
 498             ld          r5,0(r4)
 499             mtspr       chud_970_hsrr0,r5
 500             blr
 501
 502             .align  5
 503             .globl  EXT(chudxnu_mthsrr1_64)
 504 EXT(chudxnu_mthsrr1_64):
 505             ld          r5,0(r4)
 506             mtspr       chud_970_hsrr1,r5
 507             blr
 508
 509             .align  5
 510             .globl  EXT(chudxnu_mthdec_64)
 511 EXT(chudxnu_mthdec_64):
 512             ld          r5,0(r4)
 513             mtspr       chud_970_hdec,r5
 514             blr
 515
 516             .align  5
 517             .globl  EXT(chudxnu_mttrig0_64)
 518 EXT(chudxnu_mttrig0_64):
 519             ld          r5,0(r4)
 520             mtspr       chud_970_trig0,r5
 521             blr
 522
 523             .align  5
 524             .globl  EXT(chudxnu_mttrig1_64)
 525 EXT(chudxnu_mttrig1_64):
 526             ld          r5,0(r4)
 527             mtspr       chud_970_trig1,r5
 528             blr
 529
 530             .align  5
 531             .globl  EXT(chudxnu_mttrig2_64)
 532 EXT(chudxnu_mttrig2_64):
 533             ld          r5,0(r4)
 534             mtspr       chud_970_trig2,r5
 535             blr
 536
 537             .align  5
 538             .globl  EXT(chudxnu_mtaccr_64)
 539 EXT(chudxnu_mtaccr_64):
 540             ld          r5,0(r4)
 541             mtspr       chud_ppc64_accr,r5
 542             blr
 543
 544             .align  5
 545             .globl  EXT(chudxnu_mtscomc_64)
 546 EXT(chudxnu_mtscomc_64):
 547             ld          r5,0(r4)
 548             mtspr       chud_970_scomc,r5
 549             blr
 550
 551             .align  5
 552             .globl  EXT(chudxnu_mtscomd_64)
 553 EXT(chudxnu_mtscomd_64):
 554             ld          r5,0(r4)
 555             mtspr       chud_970_scomd,r5
 556
 557             .align  5
 558             .globl  EXT(chudxnu_mfmsr_64)
 559 EXT(chudxnu_mfmsr_64):
 560             mfmsr       r5
 561             std         r5,0(r3)
 562             blr
 563
 564             .align  5
 565             .globl  EXT(chudxnu_mtmsr_64)
 566 EXT(chudxnu_mtmsr_64):
 567             ld          r5,0(r3)
 568             mtmsrd      r5
 569             blr
 570
 571 .L_end: