]> git.saurik.com Git - apple/xnu.git/blob - osfmk/ppc/ppc_init.c
xnu-792.2.4.tar.gz
[apple/xnu.git] / osfmk / ppc / ppc_init.c
1 /*
2 * Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25
26 #include <debug.h>
27 #include <mach_ldebug.h>
28 #include <mach_kdb.h>
29 #include <mach_kdp.h>
30
31 #include <kern/misc_protos.h>
32 #include <kern/thread.h>
33 #include <kern/processor.h>
34 #include <kern/startup.h>
35 #include <machine/machine_routines.h>
36 #include <ppc/boot.h>
37 #include <ppc/proc_reg.h>
38 #include <ppc/misc_protos.h>
39 #include <ppc/pmap.h>
40 #include <ppc/new_screen.h>
41 #include <ppc/exception.h>
42 #include <ppc/asm.h>
43 #include <ppc/Firmware.h>
44 #include <ppc/savearea.h>
45 #include <ppc/low_trace.h>
46 #include <ppc/Diagnostics.h>
47 #include <ppc/cpu_internal.h>
48 #include <ppc/mem.h>
49 #include <ppc/mappings.h>
50 #include <ppc/locks.h>
51
52 #include <pexpert/pexpert.h>
53
54 extern unsigned int mckFlags;
55 extern vm_offset_t intstack;
56 extern vm_offset_t debstack;
57
58 int pc_trace_buf[1024] = {0};
59 int pc_trace_cnt = 1024;
60
61 extern unsigned int extPatchMCK;
62 extern unsigned int extPatch32;
63 extern unsigned int hwulckPatch_isync;
64 extern unsigned int hwulckPatch_eieio;
65 extern unsigned int hwulckbPatch_isync;
66 extern unsigned int hwulckbPatch_eieio;
67 extern unsigned int mulckPatch_isync;
68 extern unsigned int mulckPatch_eieio;
69 extern unsigned int mulckePatch_isync;
70 extern unsigned int mulckePatch_eieio;
71 extern unsigned int sulckPatch_isync;
72 extern unsigned int sulckPatch_eieio;
73 extern unsigned int rwlesPatch_isync;
74 extern unsigned int rwlesPatch_eieio;
75 extern unsigned int rwldPatch_isync;
76 extern unsigned int rwldPatch_eieio;
77 extern unsigned int retfsectPatch_eieio;
78 extern unsigned int retfsectPatch_isync;
79 extern unsigned int bcopy_nop_if_32bit;
80 extern unsigned int bcopy_nc_nop_if_32bit;
81 extern unsigned int memcpy_nop_if_32bit;
82 extern unsigned int xsum_nop_if_32bit;
83 extern unsigned int uft_nop_if_32bit;
84 extern unsigned int uft_uaw_nop_if_32bit;
85 extern unsigned int uft_cuttrace;
86
87 int forcenap = 0;
88 int wcte = 0; /* Non-cache gather timer disabled */
89
90 patch_entry_t patch_table[] = {
91 {&extPatch32, 0x60000000, PATCH_FEATURE, PatchExt32},
92 {&extPatchMCK, 0x60000000, PATCH_PROCESSOR, CPU_SUBTYPE_POWERPC_970},
93 {&hwulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
94 {&hwulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
95 {&hwulckbPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
96 {&hwulckbPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
97 {&mulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
98 {&mulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
99 {&mulckePatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
100 {&mulckePatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
101 {&sulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
102 {&sulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
103 {&rwlesPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
104 {&rwlesPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
105 {&rwldPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
106 {&rwldPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
107 {&bcopy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
108 {&bcopy_nc_nop_if_32bit,0x60000000, PATCH_FEATURE, PatchExt32},
109 {&memcpy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
110 #if !MACH_LDEBUG
111 {&retfsectPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
112 {&retfsectPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
113 #endif
114 {&xsum_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
115 {&uft_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
116 {&uft_uaw_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
117 {&uft_cuttrace, 0x60000000, PATCH_FEATURE, PatchExt32},
118 {NULL, 0x00000000, PATCH_END_OF_TABLE, 0}
119 };
120
121 /*
122 * Forward definition
123 */
124 void ppc_init(
125 boot_args *args);
126
127 void ppc_init_cpu(
128 struct per_proc_info *proc_info);
129
130 /*
131 * Routine: ppc_init
132 * Function:
133 */
134 void
135 ppc_init(
136 boot_args *args)
137 {
138 unsigned int maxmem;
139 uint64_t xmaxmem;
140 uint64_t newhid;
141 unsigned int cputrace;
142 unsigned int novmx;
143 unsigned int mcksoft;
144 thread_t thread;
145 mapping_t *mp;
146 uint64_t scdata;
147
148
149
150 /*
151 * Setup per_proc info for first cpu.
152 */
153
154 BootProcInfo.cpu_number = 0;
155 BootProcInfo.cpu_flags = 0;
156 BootProcInfo.istackptr = 0; /* we're on the interrupt stack */
157 BootProcInfo.intstack_top_ss = (vm_offset_t)&intstack + INTSTACK_SIZE - FM_SIZE;
158 BootProcInfo.debstack_top_ss = (vm_offset_t)&debstack + KERNEL_STACK_SIZE - FM_SIZE;
159 BootProcInfo.debstackptr = BootProcInfo.debstack_top_ss;
160 BootProcInfo.interrupts_enabled = 0;
161 BootProcInfo.pending_ast = AST_NONE;
162 BootProcInfo.FPU_owner = 0;
163 BootProcInfo.VMX_owner = 0;
164 BootProcInfo.pp_cbfr = console_per_proc_alloc(TRUE);
165 BootProcInfo.rtcPop = 0xFFFFFFFFFFFFFFFFULL;
166 mp = (mapping_t *)BootProcInfo.ppUMWmp;
167 mp->mpFlags = 0x01000000 | mpLinkage | mpPerm | 1;
168 mp->mpSpace = invalSpace;
169
170 thread_bootstrap();
171
172 thread = current_thread();
173 thread->machine.curctx = &thread->machine.facctx;
174 thread->machine.facctx.facAct = thread;
175 thread->machine.umwSpace = invalSpace; /* Initialize user memory window space to invalid */
176 thread->machine.preemption_count = 1;
177
178 cpu_bootstrap();
179 cpu_init();
180
181 master_cpu = 0;
182 processor_bootstrap();
183
184 timer_switch((uint32_t)mach_absolute_time(), &thread->system_timer);
185
186 static_memory_end = round_page(args->topOfKernelData);;
187
188 PE_init_platform(FALSE, args); /* Get platform expert set up */
189
190 if (!PE_parse_boot_arg("novmx", &novmx)) novmx=0; /* Special run without VMX? */
191 if(novmx) { /* Yeah, turn it off */
192 BootProcInfo.pf.Available &= ~pfAltivec; /* Turn off Altivec available */
193 __asm__ volatile("mtsprg 2,%0" : : "r" (BootProcInfo.pf.Available)); /* Set live value */
194 }
195
196 if (!PE_parse_boot_arg("fn", &forcenap)) forcenap = 0; /* If force nap not set, make 0 */
197 else {
198 if(forcenap < 2) forcenap = forcenap + 1; /* Else set 1 for off, 2 for on */
199 else forcenap = 0; /* Clear for error case */
200 }
201
202 if (!PE_parse_boot_arg("diag", &dgWork.dgFlags)) dgWork.dgFlags=0; /* Set diagnostic flags */
203 if (!PE_parse_boot_arg("lcks", &LcksOpts)) LcksOpts=0; /* Set lcks options */
204 if(dgWork.dgFlags & enaExpTrace) trcWork.traceMask = 0xFFFFFFFF; /* If tracing requested, enable it */
205
206 if(PE_parse_boot_arg("ctrc", &cputrace)) { /* See if tracing is limited to a specific cpu */
207 trcWork.traceMask = (trcWork.traceMask & 0xFFFFFFF0) | (cputrace & 0xF); /* Limit to 4 */
208 }
209
210 if(!PE_parse_boot_arg("tb", &trcWork.traceSize)) { /* See if non-default trace buffer size */
211 #if DEBUG
212 trcWork.traceSize = 32; /* Default 32 page trace table for DEBUG */
213 #else
214 trcWork.traceSize = 8; /* Default 8 page trace table for RELEASE */
215 #endif
216 }
217
218 if(trcWork.traceSize < 1) trcWork.traceSize = 1; /* Minimum size of 1 page */
219 if(trcWork.traceSize > 256) trcWork.traceSize = 256; /* Maximum size of 256 pages */
220 trcWork.traceSize = trcWork.traceSize * 4096; /* Change page count to size */
221
222 if (!PE_parse_boot_arg("maxmem", &maxmem))
223 xmaxmem=0;
224 else
225 xmaxmem = (uint64_t)maxmem * (1024 * 1024);
226
227 if (!PE_parse_boot_arg("wcte", &wcte)) wcte = 0; /* If write combine timer enable not supplied, make 1 */
228 else wcte = (wcte != 0); /* Force to 0 or 1 */
229
230 if (!PE_parse_boot_arg("mcklog", &mckFlags)) mckFlags = 0; /* If machine check flags not specified, clear */
231 else if(mckFlags > 1) mckFlags = 0; /* If bogus, clear */
232
233 if (!PE_parse_boot_arg("ht_shift", &hash_table_shift)) /* should we use a non-default hash table size? */
234 hash_table_shift = 0; /* no, use default size */
235
236 /*
237 * VM initialization, after this we're using page tables...
238 */
239
240 ppc_vm_init(xmaxmem, args);
241
242 if(BootProcInfo.pf.Available & pf64Bit) { /* Are we on a 64-bit machine */
243
244 if(!wcte) {
245 (void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */
246 scdata = scdata | GUSMstgttoff; /* Disable the NCU store gather timer */
247 (void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */
248 }
249
250 if(PE_parse_boot_arg("mcksoft", &mcksoft)) { /* Have they supplied "machine check software recovery? */
251 newhid = BootProcInfo.pf.pfHID5; /* Get the old HID5 */
252 if(mcksoft < 2) {
253 newhid &= 0xFFFFFFFFFFFFDFFFULL; /* Clear the old one */
254 newhid |= (mcksoft & 1) << 13; /* Set new value to enable machine check recovery */
255 BootProcInfo.pf.pfHID5 = newhid; /* Set the new one */
256 hid5set64(newhid); /* Set the hid for this processir */
257 }
258 }
259 }
260
261 PE_init_platform(TRUE, args);
262
263 machine_startup(args);
264 }
265
266 /*
267 * Routine: ppc_init_cpu
268 * Function:
269 */
270 void
271 ppc_init_cpu(
272 struct per_proc_info *proc_info)
273 {
274 uint64_t scdata;
275
276 proc_info->cpu_flags &= ~SleepState;
277
278 if((BootProcInfo.pf.Available & pf64Bit) && !wcte) { /* Should we disable the store gather timer? */
279 (void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */
280 scdata = scdata | GUSMstgttoff; /* Disable the NCU store gather timer */
281 (void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */
282 }
283
284 cpu_init();
285
286 slave_main();
287 }