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git.saurik.com Git - apple/xnu.git/blob - pexpert/pexpert/arm64/board_config.h
2 * Copyright (c) 2007-2017 Apple Inc. All rights reserved.
3 * Copyright (c) 2005-2006 Apple Computer, Inc. All rights reserved.
5 #ifndef _PEXPERT_ARM_BOARD_CONFIG_H
6 #define _PEXPERT_ARM_BOARD_CONFIG_H
8 #ifdef ARM64_BOARD_CONFIG_S5L8960X
9 #define APPLE_ARM64_ARCH_FAMILY 1
11 #define ARM_ARCH_TIMER
12 #include <pexpert/arm64/S5L8960X.h>
13 #define __ARM_L2CACHE_SIZE_LOG__ 20
14 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
15 #define ARM_BOARD_CLASS_S5L8960X
16 #define KERNEL_INTEGRITY_WT 1
17 #endif /* ARM64_BOARD_CONFIG_S5L8960X */
19 #ifdef ARM64_BOARD_CONFIG_T7000
20 #define APPLE_ARM64_ARCH_FAMILY 1
22 #define ARM_ARCH_TIMER
23 #include <pexpert/arm64/T7000.h>
24 #define __ARM_L2CACHE_SIZE_LOG__ 20
25 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
26 #define ARM_BOARD_CLASS_T7000
27 #define PEXPERT_3X_IMAGES 1
28 #define KERNEL_INTEGRITY_WT 1
29 #endif /* ARM64_BOARD_CONFIG_T7000 */
31 #ifdef ARM64_BOARD_CONFIG_T7001
32 #define APPLE_ARM64_ARCH_FAMILY 1
34 #define ARM_ARCH_TIMER
35 #include <pexpert/arm64/T7000.h>
36 #define __ARM_L2CACHE_SIZE_LOG__ 21
37 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
38 #define ARM_BOARD_CLASS_T7000
39 #define PEXPERT_3X_IMAGES 1
40 #define KERNEL_INTEGRITY_WT 1
42 #endif /* ARM64_BOARD_CONFIG_T7001 */
44 #ifdef ARM64_BOARD_CONFIG_S8000
46 * The L2 size for twister is in fact 3MB, not 4MB; we round up due
47 * to the code being architected for power of 2 cache sizes, and rely
48 * on the expected behavior that out of bounds operations will be
51 #define APPLE_ARM64_ARCH_FAMILY 1
53 #define ARM_ARCH_TIMER
54 #include <pexpert/arm64/S8000.h>
55 #define __ARM_L2CACHE_SIZE_LOG__ 22
56 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
57 #define ARM_BOARD_CLASS_S8000
58 #define KERNEL_INTEGRITY_WT 1
59 #endif /* ARM64_BOARD_CONFIG_S8000 */
61 #ifdef ARM64_BOARD_CONFIG_S8001
63 * The L2 size for twister is in fact 3MB, not 4MB; we round up due
64 * to the code being architected for power of 2 cache sizes, and rely
65 * on the expect behavior that out of bounds operations will be
68 #define APPLE_ARM64_ARCH_FAMILY 1
70 #define ARM_ARCH_TIMER
71 #include <pexpert/arm64/S8000.h>
72 #define __ARM_L2CACHE_SIZE_LOG__ 22
73 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
74 #define ARM_BOARD_CLASS_S8000
75 #define KERNEL_INTEGRITY_WT 1
76 #endif /* ARM64_BOARD_CONFIG_S8001 */
78 #ifdef ARM64_BOARD_CONFIG_T8010
80 * The L2 size for hurricane/zephyr is in fact 3MB, not 4MB; we round up due
81 * to the code being architected for power of 2 cache sizes, and rely
82 * on the expect behavior that out of bounds operations will be
85 #define APPLE_ARM64_ARCH_FAMILY 1
86 #define APPLEHURRICANE
87 #define ARM_ARCH_TIMER
88 #include <pexpert/arm64/T8010.h>
89 #define __ARM_L2CACHE_SIZE_LOG__ 22
90 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
91 #define ARM_BOARD_CLASS_T8010
92 #endif /* ARM64_BOARD_CONFIG_T8010 */
94 #ifdef ARM64_BOARD_CONFIG_T8011
95 #define APPLE_ARM64_ARCH_FAMILY 1
96 #define APPLEHURRICANE
97 #define ARM_ARCH_TIMER
98 #include <pexpert/arm64/T8010.h>
99 #define __ARM_L2CACHE_SIZE_LOG__ 23
100 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
101 #define ARM_BOARD_CLASS_T8011
103 #endif /* ARM64_BOARD_CONFIG_T8011 */
110 #endif /* ! _PEXPERT_ARM_BOARD_CONFIG_H */