osfmk/ppc/exception.h

   1 /*
   2  * Copyright (c) 2000-2008 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 /*
  29  * @OSF_COPYRIGHT@
  30  */
  31
  32 /* Miscellaneous constants and structures used by the exception
  33  * handlers
  34  */
  35
  36 #ifndef _PPC_EXCEPTION_H_
  37 #define _PPC_EXCEPTION_H_
  38
  39 #include <ppc/savearea.h>
  40
  41 #ifndef ASSEMBLER
  42
  43 #include <mach_kdb.h>
  44 #include <mach_kdp.h>
  45
  46 #include <mach/machine/vm_types.h>
  47 #include <mach/boolean.h>
  48 #include <kern/ast.h>
  49 #include <kern/cpu_data.h>
  50 #include <kern/pms.h>
  51 #include <pexpert/pexpert.h>
  52 #include <IOKit/IOInterrupts.h>
  53 #include <ppc/machine_routines.h>
  54 #include <ppc/rtclock.h>
  55
  56 /*      Per processor CPU features */
  57 #pragma pack(4)                                                 /* Make sure the structure stays as we defined it */
  58 struct procFeatures {
  59         unsigned int    Available;                      /* 0x000 */
  60 #define pfFloat         0x80000000
  61 #define pfFloatb        0
  62 #define pfAltivec       0x40000000
  63 #define pfAltivecb      1
  64 #define pfAvJava        0x20000000
  65 #define pfAvJavab       2
  66 #define pfSMPcap        0x10000000
  67 #define pfSMPcapb       3
  68 #define pfCanSleep      0x08000000
  69 #define pfCanSleepb     4
  70 #define pfCanNap        0x04000000
  71 #define pfCanNapb       5
  72 #define pfCanDoze       0x02000000
  73 #define pfCanDozeb      6
  74 #define pfSlowNap       0x00400000
  75 #define pfSlowNapb      9
  76 #define pfNoMuMMCK      0x00200000
  77 #define pfNoMuMMCKb     10
  78 #define pfNoL2PFNap     0x00100000
  79 #define pfNoL2PFNapb    11
  80 #define pfSCOMFixUp     0x00080000
  81 #define pfSCOMFixUpb    12
  82 #define pfHasDcba       0x00040000
  83 #define pfHasDcbab      13
  84 #define pfL1fa          0x00010000
  85 #define pfL1fab         15
  86 #define pfL2            0x00008000
  87 #define pfL2b           16
  88 #define pfL2fa          0x00004000
  89 #define pfL2fab         17
  90 #define pfL2i           0x00002000
  91 #define pfL2ib          18
  92 #define pfLClck         0x00001000
  93 #define pfLClckb        19
  94 #define pfWillNap       0x00000800
  95 #define pfWillNapb      20
  96 #define pfNoMSRir       0x00000400
  97 #define pfNoMSRirb      21
  98 #define pfL3pdet        0x00000200
  99 #define pfL3pdetb       22
 100 #define pf128Byte       0x00000080
 101 #define pf128Byteb      24
 102 #define pf32Byte        0x00000020
 103 #define pf32Byteb       26
 104 #define pf64Bit         0x00000010
 105 #define pf64Bitb        27
 106 #define pfL3            0x00000004
 107 #define pfL3b           29
 108 #define pfL3fa          0x00000002
 109 #define pfL3fab         30
 110 #define pfValid         0x00000001
 111 #define pfValidb        31
 112         unsigned short  rptdProc;                       /* 0x004 */
 113         unsigned short  lineSize;                       /* 0x006 */
 114         unsigned int    l1iSize;                        /* 0x008 */
 115         unsigned int    l1dSize;                        /* 0x00C */
 116         unsigned int    l2cr;                           /* 0x010 */
 117         unsigned int    l2Size;                         /* 0x014 */
 118         unsigned int    l3cr;                           /* 0x018 */
 119         unsigned int    l3Size;                         /* 0x01C */
 120         unsigned int    pfMSSCR0;                       /* 0x020 */
 121         unsigned int    pfMSSCR1;                       /* 0x024 */
 122         unsigned int    pfICTRL;                        /* 0x028 */
 123         unsigned int    pfLDSTCR;                       /* 0x02C */
 124         unsigned int    pfLDSTDB;                       /* 0x030 */
 125         unsigned int    pfMaxVAddr;                     /* 0x034 */
 126         unsigned int    pfMaxPAddr;                     /* 0x038 */
 127         unsigned int    pfPTEG;                         /* 0x03C */
 128         uint64_t                pfHID0;                         /* 0x040 */
 129         uint64_t                pfHID1;                         /* 0x048 */
 130         uint64_t                pfHID2;                         /* 0x050 */
 131         uint64_t                pfHID3;                         /* 0x058 */
 132         uint64_t                pfHID4;                         /* 0x060 */
 133         uint64_t                pfHID5;                         /* 0x068 */
 134         unsigned int    l2crOriginal;           /* 0x070 */
 135         unsigned int    l3crOriginal;           /* 0x074 */
 136         unsigned int    pfBootConfig;           /* 0x078 */
 137         unsigned int    pfPowerModes;           /* 0x07C */
 138 #define pmDPLLVmin              0x00010000
 139 #define pmDPLLVminb             15
 140 #define pmType                  0x000000FF
 141 #define pmPowerTune             0x00000003
 142 #define pmDFS                   0x00000002
 143 #define pmDualPLL               0x00000001
 144         unsigned int    pfPowerTune0;           /* 0x080 */
 145         unsigned int    pfPowerTune1;           /* 0x084 */
 146         unsigned int    rsrvd88[6];                     /* 0x088 */
 147 };
 148 #pragma pack()
 149
 150 typedef struct procFeatures procFeatures;
 151
 152
 153 /*
 154  *
 155  *              Various performance counters
 156  */
 157 #pragma pack(4)                                                 /* Make sure the structure stays as we defined it */
 158 struct hwCtrs {
 159
 160         unsigned int    hwInVains;                              /* In vain */
 161         unsigned int    hwResets;                               /* Reset */
 162         unsigned int    hwMachineChecks;                /* Machine check */
 163         unsigned int    hwDSIs;                                 /* DSIs */
 164         unsigned int    hwISIs;                                 /* ISIs */
 165         unsigned int    hwExternals;                    /* Externals */
 166         unsigned int    hwAlignments;                   /* Alignment */
 167         unsigned int    hwPrograms;                     /* Program */
 168         unsigned int    hwFloatPointUnavailable;        /* Floating point */
 169         unsigned int    hwDecrementers;                 /* Decrementer */
 170         unsigned int    hwIOErrors;                     /* I/O error */
 171         unsigned int    hwrsvd0;                                /* Reserved */
 172         unsigned int    hwSystemCalls;                  /* System call */
 173         unsigned int    hwTraces;                               /* Trace */
 174         unsigned int    hwFloatingPointAssists; /* Floating point assist */
 175         unsigned int    hwPerformanceMonitors;  /* Performance monitor */
 176         unsigned int    hwAltivecs;                     /* VMX */
 177         unsigned int    hwrsvd1;                                /* Reserved */
 178         unsigned int    hwrsvd2;                                /* Reserved */
 179         unsigned int    hwrsvd3;                                /* Reserved */
 180         unsigned int    hwInstBreakpoints;              /* Instruction breakpoint */
 181         unsigned int    hwSystemManagements;    /* System management */
 182         unsigned int    hwAltivecAssists;               /* Altivec Assist */
 183         unsigned int    hwThermal;                              /* Thermals */
 184         unsigned int    hwrsvd5;                                /* Reserved */
 185         unsigned int    hwrsvd6;                                /* Reserved */
 186         unsigned int    hwrsvd7;                                /* Reserved */
 187         unsigned int    hwrsvd8;                                /* Reserved */
 188         unsigned int    hwrsvd9;                                /* Reserved */
 189         unsigned int    hwrsvd10;                               /* Reserved */
 190         unsigned int    hwrsvd11;                               /* Reserved */
 191         unsigned int    hwrsvd12;                               /* Reserved */
 192         unsigned int    hwrsvd13;                               /* Reserved */
 193         unsigned int    hwTrace601;                             /* Trace */
 194         unsigned int    hwSIGPs;                                /* SIGP */
 195         unsigned int    hwPreemptions;                  /* Preemption */
 196         unsigned int    hwContextSwitchs;               /* Context switch */
 197         unsigned int    hwShutdowns;                    /* Shutdowns */
 198         unsigned int    hwChokes;                               /* System ABENDs */
 199         unsigned int    hwDataSegments;                 /* Data Segment Interruptions */
 200         unsigned int    hwInstructionSegments;  /* Instruction Segment Interruptions */
 201         unsigned int    hwSoftPatches;                  /* Soft Patch interruptions */
 202         unsigned int    hwMaintenances;                 /* Maintenance interruptions */
 203         unsigned int    hwInstrumentations;             /* Instrumentation interruptions */
 204         unsigned int    hwrsvd14;                               /* Reserved */
 205         unsigned int    hwhdec;                                 /* 0B4 Hypervisor decrementer */
 206
 207         unsigned int    hwspare0[11];                   /* 0B8 Reserved */
 208         unsigned int    hwspare0a;                              /* 0E4 Reserved */
 209         unsigned int    hwspare0b;                              /* 0E8 Reserved */
 210         unsigned int    hwspare0c;                              /* 0EC Reserved */
 211         unsigned int    hwspare0d;                              /* 0F0 Reserved */
 212         unsigned int    hwIgnored;                              /* 0F4 Interruptions ignored */
 213         unsigned int    hwRedrives;                             /* 0F8 Number of redriven interrupts */
 214         unsigned int    hwSteals;                               /* 0FC Steals */
 215 /*                                                                                         100 */
 216
 217         unsigned int    hwMckHang;                              /* ? */
 218         unsigned int    hwMckSLBPE;                             /* ? */
 219         unsigned int    hwMckTLBPE;                             /* ? */
 220         unsigned int    hwMckERCPE;                             /* ? */
 221         unsigned int    hwMckL1DPE;                             /* ? */
 222         unsigned int    hwMckL1TPE;                             /* ? */
 223         unsigned int    hwMckUE;                                /* ? */
 224         unsigned int    hwMckIUE;                               /* ? */
 225         unsigned int    hwMckIUEr;                              /* ? */
 226         unsigned int    hwMckDUE;                               /* ? */
 227         unsigned int    hwMckDTW;                               /* ? */
 228         unsigned int    hwMckUnk;                               /* ? */
 229         unsigned int    hwMckExt;                               /* ? */
 230         unsigned int    hwMckICachePE;                  /* ? */
 231         unsigned int    hwMckITagPE;                    /* ? */
 232         unsigned int    hwMckIEratPE;                   /* ? */
 233         unsigned int    hwMckDEratPE;                   /* ? */
 234         unsigned int    hwspare2[15];                   /* Pad to next 128 bndry */
 235 /*                                                                                      0x180 */
 236
 237         unsigned int    napStamp[2];                    /* Time base when we napped */
 238         unsigned int    napTotal[2];                    /* Total nap time in ticks */
 239         unsigned int    numSIGPast;                             /* Number of SIGP asts recieved */
 240         unsigned int    numSIGPcpureq;                  /* Number of SIGP cpu requests recieved */
 241         unsigned int    numSIGPdebug;                   /* Number of SIGP debugs recieved */
 242         unsigned int    numSIGPwake;                    /* Number of SIGP wakes recieved */
 243         unsigned int    numSIGPtimo;                    /* Number of SIGP send timeouts */
 244         unsigned int    numSIGPmast;                    /* Number of SIGPast messages merged */
 245         unsigned int    numSIGPmwake;                   /* Number of SIGPwake messages merged */
 246
 247         unsigned int    hwWalkPhys;                             /* Number of entries to hw_walk_phys */
 248         unsigned int    hwWalkFull;                             /* Full purge of connected PTE's */
 249         unsigned int    hwWalkMerge;                    /* RC merge of connected PTE's */
 250         unsigned int    hwWalkQuick;                    /* Quick scan of connected PTE's */
 251         unsigned int    numSIGPcall;                    /* Number of SIGPcall messages received */
 252
 253         unsigned int    hwspare3[16];                   /* Pad to 512 */
 254
 255 };
 256 #pragma pack()
 257
 258 typedef struct hwCtrs hwCtrs;
 259
 260 struct patch_entry {
 261         unsigned int    *addr;
 262         unsigned int    data;
 263         unsigned int    type;
 264         unsigned int    value;
 265 };
 266
 267 typedef struct patch_entry patch_entry_t;
 268
 269 #define PATCH_INVALID           0
 270 #define PATCH_PROCESSOR         1
 271 #define PATCH_FEATURE           2
 272 #define PATCH_END_OF_TABLE  3
 273
 274 #define PatchExt32              0x80000000
 275 #define PatchExt32b             0
 276 #define PatchLwsync             0x40000000
 277 #define PatchLwsyncb    1
 278
 279 /* When an exception is taken, this info is accessed via sprg0 */
 280 /* We should always have this one on a cache line boundary */
 281
 282 #pragma pack(4)                                                 /* Make sure the structure stays as we defined it */
 283 struct per_proc_info {
 284         unsigned short  cpu_number;
 285         unsigned short  cpu_flags;                      /* Various low-level flags */
 286         vm_offset_t     istackptr;
 287         vm_offset_t     intstack_top_ss;
 288
 289         vm_offset_t     debstackptr;
 290         vm_offset_t     debstack_top_ss;
 291
 292         unsigned int    spcFlags;                       /* Special thread flags */
 293         unsigned int    old_thread;
 294         ast_t                   pending_ast;            /* mask of pending ast(s) */
 295
 296         /* PPC cache line boundary here - 020 */
 297
 298         int                             cpu_type;
 299         int                             cpu_subtype;
 300         int                             cpu_threadtype;
 301 /*
 302  *      Note: the following two pairs of words need to stay in order and each pair must
 303  *      be in the same reservation (line) granule
 304  */
 305         struct facility_context *FPU_owner;     /* Owner of the FPU on this cpu */
 306         unsigned int    liveVRSave;                     /* VRSave assiciated with live vector registers */
 307         struct facility_context *VMX_owner;     /* Owner of the VMX on this cpu */
 308         unsigned int    spcTRc;                         /* Special trace count */
 309         unsigned int    spcTRp;                         /* Special trace buffer pointer */
 310
 311         /* PPC cache line boundary here - 040 */
 312         addr64_t                quickfret;                      /* List of saveareas to release */
 313         addr64_t                lclfree;                        /* Pointer to local savearea list */
 314         unsigned int    lclfreecnt;                     /* Entries in local savearea list */
 315         unsigned int    holdQFret;                      /* Hold off releasing quickfret list */
 316         uint64_t                rtcPop;                         /* Real Time Clock pop */
 317
 318         /* PPC cache line boundary here - 060 */
 319         boolean_t               interrupts_enabled;
 320         IOInterruptHandler      interrupt_handler;
 321         void *                  interrupt_nub;
 322         unsigned int    interrupt_source;
 323         void *                  interrupt_target;
 324         void *                  interrupt_refCon;
 325         uint64_t                next_savearea;                  /* pointer to the next savearea */
 326
 327         /* PPC cache line boundary here - 080 */
 328         unsigned int    MPsigpStat;                     /* Signal Processor status (interlocked update for this one) */
 329 #define MPsigpMsgp              0xC0000000              /* Message pending (busy + pass ) */
 330 #define MPsigpBusy              0x80000000              /* Processor area busy, i.e., locked */
 331 #define MPsigpPass              0x40000000              /* Busy lock passed to receiving processor */
 332 #define MPsigpAck               0x20000000              /* Ack Busy lock passed to receiving processor */
 333 #define MPsigpSrc               0x000000FF              /* Processor that owns busy, i.e., the ID of */
 334                                                                                 /*   whomever set busy. When a busy is passed, */
 335                                                                                 /*   this is the requestor of the function. */
 336 #define MPsigpFunc              0x0000FF00              /* Current function */
 337 #define MPsigpIdle              0x00                    /* No function pending */
 338 #define MPsigpSigp              0x04                    /* Signal a processor */
 339         unsigned int    MPsigpParm0;            /* SIGP parm 0 */
 340         unsigned int    MPsigpParm1;            /* SIGP parm 1 */
 341         unsigned int    MPsigpParm2;            /* SIGP parm 2 */
 342         cpu_id_t                cpu_id;
 343         vm_offset_t             start_paddr;
 344         unsigned int    ruptStamp[2];           /* Timebase at last interruption */
 345
 346         /* PPC cache line boundary here - 0A0 */
 347         procFeatures    pf;                                     /* Processor features */
 348
 349         /* PPC cache line boundary here - 140 */
 350         void *                  pp_cbfr;
 351         void *                  pp_chud;
 352         rtclock_timer_t rtclock_timer;
 353         unsigned int    ppbbTaskEnv;            /* BlueBox Task Environment */
 354
 355         /* PPC cache line boundary here - 160 */
 356         struct savearea *       db_saved_state;
 357         time_base_enable_t      time_base_enable;
 358         uint32_t                ppXFlags;
 359         int                             running;
 360         int                             debugger_is_slave;
 361         int                             debugger_active;
 362         int                             debugger_pending;
 363         uint32_t                debugger_holdoff;
 364
 365         /* PPC cache line boundary here - 180 */
 366     uint64_t        Uassist;            /* User Assist DoubleWord */
 367         uint64_t                validSegs;                      /* Valid SR/STB slots */
 368         addr64_t                ppUserPmap;                     /* Current user state pmap (physical address) */
 369         unsigned int    ppUserPmapVirt;         /* Current user state pmap (virtual address) */
 370         unsigned int    ppMapFlags;                     /* Mapping flags */
 371
 372         /* PPC cache line boundary here - 1A0 */
 373         unsigned short  ppInvSeg;                       /* Forces complete invalidate of SRs/SLB (this must stay with ppInvSeg) */
 374         unsigned short  ppCurSeg;                       /* Set to 1 if user segments, 0 if kernel (this must stay with ppInvSeg) */
 375         unsigned int    ppSegSteal;                     /* Count of segment slot steals */
 376         ppnum_t                 VMMareaPhys;            /* vmm state page physical addr */
 377         unsigned int    VMMXAFlgs;                      /* vmm extended flags */
 378         unsigned int    FAMintercept;           /* vmm FAM Exceptions to intercept */
 379         unsigned int    hibernate;                      /* wake from hibernate */
 380         uint32_t                save_tbl;
 381         uint32_t                save_tbu;
 382
 383         /* PPC cache line boundary here - 1C0 */
 384         unsigned int    ppUMWmp[16];            /* Linkage mapping for user memory window - 64 bytes */
 385
 386         /* PPC cache line boundary here - 200 */
 387         uint64_t                tempr0;                         /* temporary savearea */
 388         uint64_t                tempr1;
 389         uint64_t                tempr2;
 390         uint64_t                tempr3;
 391
 392         uint64_t                tempr4;
 393         uint64_t                tempr5;
 394         uint64_t                tempr6;
 395         uint64_t                tempr7;
 396
 397         uint64_t                tempr8;
 398         uint64_t                tempr9;
 399         uint64_t                tempr10;
 400         uint64_t                tempr11;
 401
 402         uint64_t                tempr12;
 403         uint64_t                tempr13;
 404         uint64_t                tempr14;
 405         uint64_t                tempr15;
 406
 407         uint64_t                tempr16;
 408         uint64_t                tempr17;
 409         uint64_t                tempr18;
 410         uint64_t                tempr19;
 411
 412         uint64_t                tempr20;
 413         uint64_t                tempr21;
 414         uint64_t                tempr22;
 415         uint64_t                tempr23;
 416
 417         uint64_t                tempr24;
 418         uint64_t                tempr25;
 419         uint64_t                tempr26;
 420         uint64_t                tempr27;
 421
 422         uint64_t                tempr28;
 423         uint64_t                tempr29;
 424         uint64_t                tempr30;
 425         uint64_t                tempr31;
 426
 427
 428         /* PPC cache line boundary here - 300 */
 429         double                  emfp0;                          /* Copies of floating point registers */
 430         double                  emfp1;                          /* Used for emulation purposes */
 431         double                  emfp2;
 432         double                  emfp3;
 433
 434         double                  emfp4;
 435         double                  emfp5;
 436         double                  emfp6;
 437         double                  emfp7;
 438
 439         double                  emfp8;
 440         double                  emfp9;
 441         double                  emfp10;
 442         double                  emfp11;
 443
 444         double                  emfp12;
 445         double                  emfp13;
 446         double                  emfp14;
 447         double                  emfp15;
 448
 449         double                  emfp16;
 450         double                  emfp17;
 451         double                  emfp18;
 452         double                  emfp19;
 453
 454         double                  emfp20;
 455         double                  emfp21;
 456         double                  emfp22;
 457         double                  emfp23;
 458
 459         double                  emfp24;
 460         double                  emfp25;
 461         double                  emfp26;
 462         double                  emfp27;
 463
 464         double                  emfp28;
 465         double                  emfp29;
 466         double                  emfp30;
 467         double                  emfp31;
 468
 469 /*                                                                 - 400 */
 470         unsigned int    emfpscr_pad;
 471         unsigned int    emfpscr;
 472         unsigned int    empadfp[6];
 473
 474 /*                                                                 - 420 */
 475         unsigned int    emvr0[4];                       /* Copies of vector registers used both */
 476         unsigned int    emvr1[4];                       /* for full vector emulation or */
 477         unsigned int    emvr2[4];                       /* as saveareas while assisting denorms */
 478         unsigned int    emvr3[4];
 479         unsigned int    emvr4[4];
 480         unsigned int    emvr5[4];
 481         unsigned int    emvr6[4];
 482         unsigned int    emvr7[4];
 483         unsigned int    emvr8[4];
 484         unsigned int    emvr9[4];
 485         unsigned int    emvr10[4];
 486         unsigned int    emvr11[4];
 487         unsigned int    emvr12[4];
 488         unsigned int    emvr13[4];
 489         unsigned int    emvr14[4];
 490         unsigned int    emvr15[4];
 491         unsigned int    emvr16[4];
 492         unsigned int    emvr17[4];
 493         unsigned int    emvr18[4];
 494         unsigned int    emvr19[4];
 495         unsigned int    emvr20[4];
 496         unsigned int    emvr21[4];
 497         unsigned int    emvr22[4];
 498         unsigned int    emvr23[4];
 499         unsigned int    emvr24[4];
 500         unsigned int    emvr25[4];
 501         unsigned int    emvr26[4];
 502         unsigned int    emvr27[4];
 503         unsigned int    emvr28[4];
 504         unsigned int    emvr29[4];
 505         unsigned int    emvr30[4];
 506         unsigned int    emvr31[4];
 507         unsigned int    emvscr[4];
 508         unsigned int    empadvr[4];
 509 /*                                                                 - 640 */
 510 /* note implicit dependence on kSkipListMaxLists, which must be <= 28 */
 511     addr64_t            skipListPrev[28];       /* prev ptrs saved as side effect of calling mapSearchFull() */
 512
 513 /*                                                                 - 720 */
 514
 515         unsigned int    patcharea[56];
 516 /*                                                                 - 800 */
 517
 518         hwCtrs                  hwCtr;                                  /* Hardware exception counters */
 519 /*                                                                 - A00 */
 520         addr64_t                pp2ndPage;                              /* Physical address of the second page of the per_proc */
 521         addr64_t                ijsave;                                 /* Pointer to original savearea for injected code */
 522         uint32_t                pprsvd0A10[4];
 523 /*                                                                 - A20 */
 524         pmsd                    pms;                                    /* Power Management Stepper control */
 525         unsigned int    pprsvd0A40[16];                 /* Reserved */
 526 /*                                                                 - A80 */
 527         uint32_t                pprsvd0A80[16];                 /* Reserved */
 528
 529         unsigned int    pprsvd0AC0[336];                /* Reserved out to next page boundary */
 530 /*                                                                 - 1000 */
 531
 532 /*
 533  *      This is the start of the second page of the per_proc block.  Because we do not
 534  *      allocate physically contiguous memory, it may be physically discontiguous from the
 535  *      first page.  Currently there isn't anything here that is accessed translation off,
 536  *      but if we need it, pp2ndPage contains the physical address.
 537  *
 538  *      Note that the boot processor's per_proc is statically allocated, so it will be a
 539  *      V=R contiguous area.  That allows access during early boot before we turn translation on
 540  *      for the first time.
 541  */
 542
 543         unsigned int    processor[384];                 /* processor structure */
 544
 545         unsigned int    pprsvd1[640];                   /* Reserved out to next page boundary */
 546 /*                                                                 - 2000 */
 547
 548 };
 549
 550 #pragma pack()
 551
 552
 553 /*
 554  * Macro to convert a processor_t processor to its attached per_proc_info_t per_proc
 555  */
 556 #define PROCESSOR_TO_PER_PROC(x)                                                                                \
 557                         ((struct per_proc_info*)((unsigned int)(x)                                      \
 558                         - (unsigned int)(((struct per_proc_info *)0)->processor)))
 559
 560 extern struct per_proc_info BootProcInfo;
 561
 562 #define MAX_CPUS        256
 563
 564 struct per_proc_entry {
 565         addr64_t                                ppe_paddr;              /* Physical address of the first page of per_proc, 2nd is in pp2ndPage. */
 566         unsigned int                    ppe_pad4[1];
 567         struct per_proc_info    *ppe_vaddr;             /* Virtual address of the per_proc */
 568 };
 569
 570 extern  struct per_proc_entry PerProcTable[MAX_CPUS-1];
 571
 572
 573 extern const char *trap_type[];
 574
 575 #endif /* ndef ASSEMBLER */                                     /* with this savearea should be redriven */
 576
 577 /* cpu_flags defs */
 578 #define SIGPactive      0x8000
 579 #define needSRload      0x4000
 580 #define turnEEon        0x2000
 581 #define SleepState      0x0800
 582 #define SleepStateb     4
 583 #define mcountOff       0x0400
 584 #define SignalReady     0x0200
 585 #define BootDone        0x0100
 586 #define loadMSR         0x7FF4
 587
 588 /* ppXFlags defs */
 589 #define SignalReadyWait 0x00000001
 590
 591 #define T_VECTOR_SIZE   4                                       /* function pointer size */
 592
 593 /* Hardware exceptions */
 594
 595 #define T_IN_VAIN                               (0x00 * T_VECTOR_SIZE)
 596 #define T_RESET                                 (0x01 * T_VECTOR_SIZE)
 597 #define T_MACHINE_CHECK                 (0x02 * T_VECTOR_SIZE)
 598 #define T_DATA_ACCESS                   (0x03 * T_VECTOR_SIZE)
 599 #define T_INSTRUCTION_ACCESS    (0x04 * T_VECTOR_SIZE)
 600 #define T_INTERRUPT                             (0x05 * T_VECTOR_SIZE)
 601 #define T_ALIGNMENT                             (0x06 * T_VECTOR_SIZE)
 602 #define T_PROGRAM                               (0x07 * T_VECTOR_SIZE)
 603 #define T_FP_UNAVAILABLE                (0x08 * T_VECTOR_SIZE)
 604 #define T_DECREMENTER                   (0x09 * T_VECTOR_SIZE)
 605 #define T_IO_ERROR                              (0x0a * T_VECTOR_SIZE)
 606 #define T_RESERVED                              (0x0b * T_VECTOR_SIZE)
 607 #define T_SYSTEM_CALL                   (0x0c * T_VECTOR_SIZE)
 608 #define T_TRACE                                 (0x0d * T_VECTOR_SIZE)
 609 #define T_FP_ASSIST                             (0x0e * T_VECTOR_SIZE)
 610 #define T_PERF_MON                              (0x0f * T_VECTOR_SIZE)
 611 #define T_VMX                                   (0x10 * T_VECTOR_SIZE)
 612 #define T_INVALID_EXCP0                 (0x11 * T_VECTOR_SIZE)
 613 #define T_INVALID_EXCP1                 (0x12 * T_VECTOR_SIZE)
 614 #define T_INVALID_EXCP2                 (0x13 * T_VECTOR_SIZE)
 615 #define T_INSTRUCTION_BKPT              (0x14 * T_VECTOR_SIZE)
 616 #define T_SYSTEM_MANAGEMENT             (0x15 * T_VECTOR_SIZE)
 617 #define T_ALTIVEC_ASSIST                (0x16 * T_VECTOR_SIZE)
 618 #define T_THERMAL                               (0x17 * T_VECTOR_SIZE)
 619 #define T_INVALID_EXCP5                 (0x18 * T_VECTOR_SIZE)
 620 #define T_INVALID_EXCP6                 (0x19 * T_VECTOR_SIZE)
 621 #define T_INVALID_EXCP7                 (0x1A * T_VECTOR_SIZE)
 622 #define T_INVALID_EXCP8                 (0x1B * T_VECTOR_SIZE)
 623 #define T_INVALID_EXCP9                 (0x1C * T_VECTOR_SIZE)
 624 #define T_INVALID_EXCP10                (0x1D * T_VECTOR_SIZE)
 625 #define T_INVALID_EXCP11                (0x1E * T_VECTOR_SIZE)
 626 #define T_INVALID_EXCP12                (0x1F * T_VECTOR_SIZE)
 627 #define T_EMULATE                               (0x20 * T_VECTOR_SIZE)
 628
 629 #define T_RUNMODE_TRACE                 (0x21 * T_VECTOR_SIZE) /* 601 only */
 630
 631 #define T_SIGP                                  (0x22 * T_VECTOR_SIZE)
 632 #define T_PREEMPT                               (0x23 * T_VECTOR_SIZE)
 633 #define T_CSWITCH                               (0x24 * T_VECTOR_SIZE)
 634 #define T_SHUTDOWN                              (0x25 * T_VECTOR_SIZE)
 635 #define T_CHOKE                                 (0x26 * T_VECTOR_SIZE)
 636
 637 #define T_DATA_SEGMENT                  (0x27 * T_VECTOR_SIZE)
 638 #define T_INSTRUCTION_SEGMENT   (0x28 * T_VECTOR_SIZE)
 639
 640 #define T_SOFT_PATCH                    (0x29 * T_VECTOR_SIZE)
 641 #define T_MAINTENANCE                   (0x2A * T_VECTOR_SIZE)
 642 #define T_INSTRUMENTATION               (0x2B * T_VECTOR_SIZE)
 643 #define T_ARCHDEP0                              (0x2C * T_VECTOR_SIZE)
 644 #define T_HDEC                                  (0x2D * T_VECTOR_SIZE)
 645 #define T_INJECT_EXIT                   (0x2E * T_VECTOR_SIZE)
 646 #define T_DTRACE_RET                    T_INJECT_EXIT
 647
 648 #define T_AST                                   (0x100 * T_VECTOR_SIZE)
 649 #define T_MAX                                   T_CHOKE          /* Maximum exception no */
 650
 651 #define T_FAM                                   0x00004000
 652
 653 #define EXCEPTION_VECTOR(exception)     (exception * 0x100 / T_VECTOR_SIZE )
 654
 655 /*
 656  *              System choke (failure) codes
 657  */
 658
 659 #define failDebug 0
 660 #define failStack 1
 661 #define failMapping 2
 662 #define failContext 3
 663 #define failNoSavearea 4
 664 #define failSaveareaCorr 5
 665 #define failBadLiveContext 6
 666 #define failSkipLists 7
 667 #define failUnalignedStk 8
 668 #define failPmap 9
 669 #define failTimeout 10
 670
 671 /* Always must be last - update failNames table in model_dep.c as well */
 672 #define failUnknown 11
 673
 674 #ifndef ASSEMBLER
 675
 676 #pragma pack(4)                                                 /* Make sure the structure stays as we defined it */
 677 typedef struct resethandler {
 678         unsigned int    type;
 679         vm_offset_t     call_paddr;
 680         vm_offset_t     arg__paddr;
 681 } resethandler_t;
 682 #pragma pack()
 683
 684 extern resethandler_t ResetHandler;
 685
 686 #endif
 687
 688 #define RESET_HANDLER_NULL      0x0
 689 #define RESET_HANDLER_START     0x1
 690 #define RESET_HANDLER_BUPOR     0x2
 691 #define RESET_HANDLER_IGNORE    0x3
 692
 693 #endif /* _PPC_EXCEPTION_H_ */