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1 /*
2 * Copyright (c) 2017-2019 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
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25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 #ifndef ARM64_MONOTONIC_H
29 #define ARM64_MONOTONIC_H
30
31 #include <sys/cdefs.h>
32
33 #if MONOTONIC
34
35 #include <pexpert/arm64/board_config.h>
36
37 #if KERNEL_PRIVATE
38
39 __BEGIN_DECLS
40
41 #if MONOTONIC && !CPMU_AIC_PMI
42 #define MONOTONIC_FIQ 1
43 #endif /* MONOTONIC && !CPMU_AIC_PMI */
44
45 #include <stdint.h>
46
47 #if HAS_UNCORE_CTRS
48 #define MT_NDEVS 2
49 #else /* HAS_UNCORE_CTRS */
50 #define MT_NDEVS 1
51 #endif /* !HAS_UNCORE_CTRS */
52
53 #define MT_CORE_CYCLES 0
54 #define MT_CORE_INSTRS 1
55 #define MT_CORE_NFIXED 2
56 #define MT_CORE_MAXVAL ((UINT64_C(1) << 48) - 1)
57
58 __END_DECLS
59
60 #endif /* KERNEL_PRIVATE */
61
62 #if MACH_KERNEL_PRIVATE
63
64 #include <stdbool.h>
65
66 __BEGIN_DECLS
67
68 #define PMCR0 "s3_1_c15_c0_0"
69
70 /* set by hardware if a PMI was delivered */
71 #define PMCR0_PMAI (UINT64_C(1) << 11)
72 #define PMCR0_PMI(REG) ((REG) & PMCR0_PMAI)
73
74 #if HAS_UNCORE_CTRS
75
76 #define UPMSR "s3_7_c15_c6_4"
77 #define UPMSR_PMI(REG) ((REG) & 0x1)
78
79 #endif /* HAS_UNCORE_CTRS */
80
81 static inline bool
82 mt_pmi_pending(uint64_t * restrict pmcr0_out,
83 uint64_t * restrict upmsr_out)
84 {
85 uint64_t pmcr0 = __builtin_arm_rsr64(PMCR0);
86 bool pmi = PMCR0_PMI(pmcr0);
87 if (pmi) {
88 /*
89 * Acknowledge the PMI by clearing the pmai bit.
90 */
91 __builtin_arm_wsr64(PMCR0, pmcr0 & ~PMCR0_PMAI);
92 }
93 *pmcr0_out = pmcr0;
94
95 #if HAS_UNCORE_CTRS
96 extern bool mt_uncore_enabled;
97 if (mt_uncore_enabled) {
98 uint64_t upmsr = __builtin_arm_rsr64(UPMSR);
99 if (UPMSR_PMI(upmsr)) {
100 pmi = true;
101 }
102 *upmsr_out = upmsr;
103 }
104 #else /* HAS_UNCORE_CTRS */
105 #pragma unused(upmsr_out)
106 #endif /* !HAS_UNCORE_CTRS */
107
108 return pmi;
109 }
110
111 void mt_fiq(void *cpu, uint64_t pmcr0, uint64_t upmsr);
112
113 #if CPMU_AIC_PMI
114 void mt_cpmu_aic_pmi(void *source);
115 #endif /* CPMU_AIC_PMI */
116
117 __END_DECLS
118
119 #endif /* MACH_KERNEL_PRIVATE */
120
121 #endif /* MONOTONIC */
122
123 #endif /* !defined(ARM64_MONOTONIC_H) */