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28 #ifndef ARM64_MONOTONIC_H
29 #define ARM64_MONOTONIC_H
31 #include <sys/cdefs.h>
35 #include <pexpert/arm64/board_config.h>
41 #if MONOTONIC && !CPMU_AIC_PMI
42 #define MONOTONIC_FIQ 1
43 #endif /* MONOTONIC && !CPMU_AIC_PMI */
49 #else /* HAS_UNCORE_CTRS */
51 #endif /* !HAS_UNCORE_CTRS */
53 #define MT_CORE_CYCLES 0
54 #define MT_CORE_INSTRS 1
55 #define MT_CORE_NFIXED 2
56 #define MT_CORE_MAXVAL ((UINT64_C(1) << 48) - 1)
60 #endif /* KERNEL_PRIVATE */
62 #if MACH_KERNEL_PRIVATE
68 #define PMCR0 "s3_1_c15_c0_0"
70 /* set by hardware if a PMI was delivered */
71 #define PMCR0_PMAI (UINT64_C(1) << 11)
72 #define PMCR0_PMI(REG) ((REG) & PMCR0_PMAI)
76 #define UPMSR "s3_7_c15_c6_4"
77 #define UPMSR_PMI(REG) ((REG) & 0x1)
79 #endif /* HAS_UNCORE_CTRS */
82 mt_pmi_pending(uint64_t * restrict pmcr0_out
,
83 uint64_t * restrict upmsr_out
)
85 uint64_t pmcr0
= __builtin_arm_rsr64(PMCR0
);
86 bool pmi
= PMCR0_PMI(pmcr0
);
89 * Acknowledge the PMI by clearing the pmai bit.
91 __builtin_arm_wsr64(PMCR0
, pmcr0
& ~PMCR0_PMAI
);
96 extern bool mt_uncore_enabled
;
97 if (mt_uncore_enabled
) {
98 uint64_t upmsr
= __builtin_arm_rsr64(UPMSR
);
99 if (UPMSR_PMI(upmsr
)) {
104 #else /* HAS_UNCORE_CTRS */
105 #pragma unused(upmsr_out)
106 #endif /* !HAS_UNCORE_CTRS */
111 void mt_fiq(void *cpu
, uint64_t pmcr0
, uint64_t upmsr
);
114 void mt_cpmu_aic_pmi(void *source
);
115 #endif /* CPMU_AIC_PMI */
119 #endif /* MACH_KERNEL_PRIVATE */
121 #endif /* MONOTONIC */
123 #endif /* !defined(ARM64_MONOTONIC_H) */