osfmk/arm64/dwarf_unwind.h

   1 /*
   2  * Copyright (c) 2019 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28
  29
  30 #ifndef _ARM64_DWARF_UNWIND_H_
  31 #define _ARM64_DWARF_UNWIND_H_
  32
  33 /*
  34  * This file contains the architecture specific DWARF definitions needed for unwind
  35  * information added to trap handlers.
  36  */
  37
  38 /* DWARF Register numbers for ARM64 registers contained in the saved state */
  39
  40 #define DWARF_ARM64_X0 0
  41 #define DWARF_ARM64_X1 1
  42 #define DWARF_ARM64_X2 2
  43 #define DWARF_ARM64_X3 3
  44 #define DWARF_ARM64_X4 4
  45 #define DWARF_ARM64_X5 5
  46 #define DWARF_ARM64_X6 6
  47 #define DWARF_ARM64_X7 7
  48 #define DWARF_ARM64_X8 8
  49 #define DWARF_ARM64_X9 9
  50 #define DWARF_ARM64_X10 10
  51 #define DWARF_ARM64_X11 11
  52 #define DWARF_ARM64_X12 12
  53 #define DWARF_ARM64_X13 13
  54 #define DWARF_ARM64_X14 14
  55 #define DWARF_ARM64_X15 15
  56 #define DWARF_ARM64_X16 16
  57 #define DWARF_ARM64_X17 17
  58 #define DWARF_ARM64_X18 18
  59 #define DWARF_ARM64_X19 19
  60 #define DWARF_ARM64_X20 20
  61 #define DWARF_ARM64_X21 21
  62 #define DWARF_ARM64_X22 22
  63 #define DWARF_ARM64_X23 23
  64 #define DWARF_ARM64_X24 24
  65 #define DWARF_ARM64_X25 25
  66 #define DWARF_ARM64_X26 26
  67 #define DWARF_ARM64_X27 27
  68 #define DWARF_ARM64_X28 28
  69
  70 #define DWARF_ARM64_FP 29
  71 #define DWARF_ARM64_LR 30
  72 #define DWARF_ARM64_SP 31
  73 #define DWARF_ARM64_PC 32
  74 #define DWARF_ARM64_CPSR 33
  75
  76 #define DW_OP_breg21      0x85
  77 #define DW_CFA_expression 0x10
  78
  79 #define DW_FORM_LEN_ONE_BYTE_SLEB 2
  80 #define DW_FORM_LEN_TWO_BYTE_SLEB 3
  81
  82 #define DWARF_ARM64_X0_OFFSET 8
  83 #define DWARF_ARM64_X1_OFFSET 16
  84 #define DWARF_ARM64_X2_OFFSET 24
  85 #define DWARF_ARM64_X3_OFFSET 32
  86 #define DWARF_ARM64_X4_OFFSET 40
  87 #define DWARF_ARM64_X5_OFFSET 48
  88 #define DWARF_ARM64_X6_OFFSET 56
  89 #define DWARF_ARM64_X7_OFFSET 0xc0, 0x00
  90 #define DWARF_ARM64_X8_OFFSET 0xc8, 0x00
  91 #define DWARF_ARM64_X9_OFFSET 0xd0, 0x00
  92 #define DWARF_ARM64_X10_OFFSET 0xd8, 0x00
  93 #define DWARF_ARM64_X11_OFFSET 0xe0, 0x00
  94 #define DWARF_ARM64_X12_OFFSET 0xe8, 0x00
  95 #define DWARF_ARM64_X13_OFFSET 0xf0, 0x00
  96 #define DWARF_ARM64_X14_OFFSET 0xf8, 0x00
  97 #define DWARF_ARM64_X15_OFFSET 0x80, 0x01
  98 #define DWARF_ARM64_X16_OFFSET 0x88, 0x01
  99 #define DWARF_ARM64_X17_OFFSET 0x90, 0x01
 100 #define DWARF_ARM64_X18_OFFSET 0x98, 0x01
 101 #define DWARF_ARM64_X19_OFFSET 0xa0, 0x01
 102
 103 #define DWARF_ARM64_X20_OFFSET 0xa8, 0x01
 104 #define DWARF_ARM64_X21_OFFSET 0xb0, 0x01
 105 #define DWARF_ARM64_X22_OFFSET 0xb8, 0x01
 106 #define DWARF_ARM64_X23_OFFSET 0xc0, 0x01
 107 #define DWARF_ARM64_X24_OFFSET 0xc8, 0x01
 108 #define DWARF_ARM64_X25_OFFSET 0xd0, 0x01
 109 #define DWARF_ARM64_X26_OFFSET 0xd8, 0x01
 110 #define DWARF_ARM64_X27_OFFSET 0xe0, 0x01
 111 #define DWARF_ARM64_X28_OFFSET 0xe8, 0x01
 112
 113 #define DWARF_ARM64_FP_OFFSET 0xf0, 0x01
 114 #define DWARF_ARM64_LR_OFFSET 0xf8, 0x01
 115 #define DWARF_ARM64_SP_OFFSET 0x80, 0x02
 116 #define DWARF_ARM64_PC_OFFSET 0x88, 0x02
 117 #define DWARF_ARM64_CPSR_OFFSET 0x90, 0x02
 118
 119 /* The actual unwind directives added to trap handlers to let the debugger know where the register state is stored */
 120
 121 /* Unwind Prologue added to each function to indicate the start of the unwind information. */
 122
 123 #define UNWIND_PROLOGUE \
 124 .cfi_sections .eh_frame %%\
 125 .cfi_startproc          %%\
 126 .cfi_signal_frame       %%\
 127
 128
 129 /* Unwind Epilogue added to each function to indicate the end of the unwind information */
 130
 131 #define UNWIND_EPILOGUE .cfi_endproc
 132
 133
 134 #define UNWIND_DIRECTIVES \
 135 .cfi_escape DW_CFA_expression, DWARF_ARM64_X0, DW_FORM_LEN_ONE_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X0_OFFSET %%\
 136 .cfi_escape DW_CFA_expression, DWARF_ARM64_X1, DW_FORM_LEN_ONE_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X1_OFFSET %%\
 137 .cfi_escape DW_CFA_expression, DWARF_ARM64_X2, DW_FORM_LEN_ONE_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X2_OFFSET %%\
 138 .cfi_escape DW_CFA_expression, DWARF_ARM64_X3, DW_FORM_LEN_ONE_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X3_OFFSET %%\
 139 .cfi_escape DW_CFA_expression, DWARF_ARM64_X4, DW_FORM_LEN_ONE_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X4_OFFSET %%\
 140 .cfi_escape DW_CFA_expression, DWARF_ARM64_X5, DW_FORM_LEN_ONE_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X5_OFFSET %%\
 141 .cfi_escape DW_CFA_expression, DWARF_ARM64_X6, DW_FORM_LEN_ONE_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X6_OFFSET %%\
 142 .cfi_escape DW_CFA_expression, DWARF_ARM64_X7, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X7_OFFSET %%\
 143 .cfi_escape DW_CFA_expression, DWARF_ARM64_X8, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X8_OFFSET %%\
 144 .cfi_escape DW_CFA_expression, DWARF_ARM64_X9, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X9_OFFSET %%\
 145 .cfi_escape DW_CFA_expression, DWARF_ARM64_X10, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X10_OFFSET %%\
 146 .cfi_escape DW_CFA_expression, DWARF_ARM64_X11, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X11_OFFSET %%\
 147 .cfi_escape DW_CFA_expression, DWARF_ARM64_X12, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X12_OFFSET %%\
 148 .cfi_escape DW_CFA_expression, DWARF_ARM64_X13, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X13_OFFSET %%\
 149 .cfi_escape DW_CFA_expression, DWARF_ARM64_X14, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X14_OFFSET %%\
 150 .cfi_escape DW_CFA_expression, DWARF_ARM64_X15, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X15_OFFSET %%\
 151 .cfi_escape DW_CFA_expression, DWARF_ARM64_X16, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X16_OFFSET %%\
 152 .cfi_escape DW_CFA_expression, DWARF_ARM64_X17, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X17_OFFSET %%\
 153 .cfi_escape DW_CFA_expression, DWARF_ARM64_X18, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X18_OFFSET %%\
 154 .cfi_escape DW_CFA_expression, DWARF_ARM64_X19, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X19_OFFSET %%\
 155 .cfi_escape DW_CFA_expression, DWARF_ARM64_X20, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X20_OFFSET %%\
 156 .cfi_escape DW_CFA_expression, DWARF_ARM64_X21, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X21_OFFSET %%\
 157 .cfi_escape DW_CFA_expression, DWARF_ARM64_X22, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X22_OFFSET %%\
 158 .cfi_escape DW_CFA_expression, DWARF_ARM64_X23, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X23_OFFSET %%\
 159 .cfi_escape DW_CFA_expression, DWARF_ARM64_X24, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X24_OFFSET %%\
 160 .cfi_escape DW_CFA_expression, DWARF_ARM64_X25, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X25_OFFSET %%\
 161 .cfi_escape DW_CFA_expression, DWARF_ARM64_X26, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X26_OFFSET %%\
 162 .cfi_escape DW_CFA_expression, DWARF_ARM64_X27, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X27_OFFSET %%\
 163 .cfi_escape DW_CFA_expression, DWARF_ARM64_X28, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_X28_OFFSET %%\
 164 .cfi_escape DW_CFA_expression, DWARF_ARM64_FP, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_FP_OFFSET %%\
 165 .cfi_escape DW_CFA_expression, DWARF_ARM64_LR, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_LR_OFFSET %%\
 166 .cfi_escape DW_CFA_expression, DWARF_ARM64_SP, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_SP_OFFSET %%\
 167 .cfi_escape DW_CFA_expression, DWARF_ARM64_PC, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_PC_OFFSET %%\
 168 .cfi_escape DW_CFA_expression, DWARF_ARM64_CPSR, DW_FORM_LEN_TWO_BYTE_SLEB, DW_OP_breg21, DWARF_ARM64_CPSR_OFFSET %%\
 169
 170 #endif /* _ARM64_DWARF_UNWIND_H_ */