2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
32 * Mach Operating System
33 * Copyright (c) 1991,1990 Carnegie Mellon University
34 * All Rights Reserved.
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
46 * Carnegie Mellon requests users of this software to return to
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
59 #include <platforms.h>
62 #include <i386/proc_reg.h>
63 #include <i386/postcode.h>
66 #define CX(addr,reg) addr(,reg,4)
68 #include <i386/acpi.h>
69 #include <i386/cpuid.h>
72 * Interrupt and bootup stack for initial processor.
75 /* in the __HIB section since the hibernate restore code uses this stack. */
76 .section __HIB, __data
79 .globl EXT(low_intstack)
81 .globl EXT(gIOHibernateRestoreStack)
82 EXT(gIOHibernateRestoreStack):
86 .globl EXT(low_eintstack)
88 .globl EXT(gIOHibernateRestoreStackEnd)
89 EXT(gIOHibernateRestoreStackEnd):
92 * Pointers to GDT and IDT. These contain linear addresses.
96 /* align below properly */
99 .word Times(8,GDTSZ)-1
100 .long EXT(master_gdt)
102 /* back to the regular __DATA section. */
104 .section __DATA, __data
107 * Stack for last-gasp double-fault handler.
110 .globl EXT(df_task_stack)
113 .globl EXT(df_task_stack_end)
114 EXT(df_task_stack_end):
118 * Stack for machine-check handler.
121 .globl EXT(mc_task_stack)
124 .globl EXT(mc_task_stack_end)
125 EXT(mc_task_stack_end):
128 * BSP CPU start here.
129 * eax points to kernbootstruct
132 * protected mode, no paging, flat 32-bit address space.
133 * (Code/data/stack segments have base == 0, limit == 4G)
141 mov %eax, %ebp /* Move kernbootstruct to ebp */
142 mov %eax, %ebx /* get pointer to kernbootstruct */
144 mov $EXT(low_eintstack),%esp /* switch to the bootup stack */
146 POSTCODE(PSTART_ENTRY)
148 lgdt EXT(gdtptr) /* load GDT */
150 mov $(KERNEL_DS),%ax /* set kernel data segment */
154 xor %ax, %ax /* fs must be zeroed; */
155 mov %ax, %fs /* some bootstrappers don`t do this */
159 /* "The Aussie Maneuver" ("Myria" variant) */
160 pushl $(0xcb<<24)|KERNEL32_CS /* reload CS */
164 andl $0xfffffff0, %esp /* align stack */
166 pushl %ebp /* push boot args addr */
167 xorl %ebp, %ebp /* zero frame pointer */
169 POSTCODE(PSTART_BEFORE_PAGING)
174 movl $EXT(IdlePDPT), %eax /* CR3 */
176 movl %cr4, %eax /* PAE */
179 movl %cr0,%eax /* paging */
180 orl $(CR0_PG|CR0_WP),%eax
183 POSTCODE(PSTART_VSTART)
185 call EXT(vstart) /* run C code */
190 * AP (slave) CPUs enter here.
193 * protected mode, no paging, flat 32-bit address space.
194 * (Code/data/stack segments have base == 0, limit == 4G)
197 .globl EXT(slave_pstart)
199 cli /* disable interrupts, so we don`t */
200 /* need IDT for a while */
201 xor %ebp, %ebp // zero boot cpu
202 mov $EXT(mp_slave_stack)+PAGE_SIZE, %esp;
206 /* Code to get from real mode to protected mode */
208 #define operand_size_prefix .byte 0x66
209 #define address_size_prefix .byte 0x67
210 #define cs_base_prefix .byte 0x2e
213 #define LJMP(segment,address) \
214 operand_size_prefix ;\
216 .long address-EXT(real_mode_bootstrap_base) ;\
219 #define LGDT(address) \
221 address_size_prefix ;\
222 operand_size_prefix ;\
225 .long address-EXT(real_mode_bootstrap_base)
227 .section __HIB,__text
228 .align 12 /* Page align for single bcopy_phys() */
230 Entry(real_mode_bootstrap_base)
233 LGDT(EXT(protected_mode_gdtr))
235 /* set the PE bit of CR0 */
240 /* reload CS register */
241 LJMP(KERNEL32_CS, 1f + REAL_MODE_BOOTSTRAP_OFFSET)
244 /* we are in protected mode now */
245 /* set up the segment registers */
254 POSTCODE(SLAVE_STARTPROG_ENTRY);
256 mov PROT_MODE_START+REAL_MODE_BOOTSTRAP_OFFSET, %ecx
259 Entry(protected_mode_gdtr)
260 .short 160 /* limit (8*6 segs) */
261 .long EXT(master_gdt)
263 Entry(real_mode_bootstrap_end)
265 .section __HIB,__text
267 .globl EXT(hibernate_machine_entrypoint)
268 LEXT(hibernate_machine_entrypoint)
269 mov %eax, %edi // save header pointer
271 lgdt EXT(protected_mode_gdtr)
273 /* setup the protected mode segment registers */
278 mov $0,%ax /* fs must be zeroed; */
282 /* set up the page tables to use BootstrapPTD
283 * as done in idle_pt.c, but this must be done programatically */
284 mov $EXT(IdlePDPT), %eax
285 mov $EXT(BootPTD) + (INTEL_PTE_VALID), %ecx
287 mov %ecx, (0*8+0)(%eax)
288 mov %edx, (0*8+4)(%eax)
289 add $(PAGE_SIZE), %ecx
290 mov %ecx, (1*8+0)(%eax)
291 mov %edx, (1*8+4)(%eax)
292 add $(PAGE_SIZE), %ecx
293 mov %ecx, (2*8+0)(%eax)
294 mov %edx, (2*8+4)(%eax)
295 add $(PAGE_SIZE), %ecx
296 mov %ecx, (3*8+0)(%eax)
297 mov %edx, (3*8+4)(%eax)
303 movl %eax,%cr4 /* enable page size extensions */
305 movl $(MSR_IA32_EFER), %ecx /* MSR number in ecx */
306 rdmsr /* MSR value return in edx: eax */
307 orl $(MSR_IA32_EFER_NXE), %eax /* Set NXE bit in low 32-bits */
308 wrmsr /* Update Extended Feature Enable reg */
311 orl $(CR0_PG|CR0_WP), %eax
312 movl %eax, %cr0 /* ready paging */
314 mov $EXT(gIOHibernateRestoreStackEnd), %esp /* setup stack */
315 xorl %ebp, %ebp /* zero frame pointer */
317 ljmpl $(KERNEL32_CS), $Ltemp
319 xorl %eax, %eax /* Video memory - N/A */
323 mov %edi, %eax /* Pointer to hibernate header */
325 call EXT(hibernate_kernel_entrypoint)