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1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27 #include <sys/fasttrap_isa.h>
28 #include <sys/fasttrap_impl.h>
29 #include <sys/dtrace.h>
30 #include <sys/dtrace_impl.h>
31 extern dtrace_id_t dtrace_probeid_error;
32
33 #include "fasttrap_regset.h"
34
35 #include <sys/dtrace_ptss.h>
36 #include <kern/debug.h>
37
38 #include <machine/pal_routines.h>
39
40 /* Solaris proc_t is the struct. Darwin's proc_t is a pointer to it. */
41 #define proc_t struct proc /* Steer clear of the Darwin typedef for proc_t */
42
43 /*
44 * Lossless User-Land Tracing on x86
45 * ---------------------------------
46 *
47 * The execution of most instructions is not dependent on the address; for
48 * these instructions it is sufficient to copy them into the user process's
49 * address space and execute them. To effectively single-step an instruction
50 * in user-land, we copy out the following sequence of instructions to scratch
51 * space in the user thread's ulwp_t structure.
52 *
53 * We then set the program counter (%eip or %rip) to point to this scratch
54 * space. Once execution resumes, the original instruction is executed and
55 * then control flow is redirected to what was originally the subsequent
56 * instruction. If the kernel attemps to deliver a signal while single-
57 * stepping, the signal is deferred and the program counter is moved into the
58 * second sequence of instructions. The second sequence ends in a trap into
59 * the kernel where the deferred signal is then properly handled and delivered.
60 *
61 * For instructions whose execute is position dependent, we perform simple
62 * emulation. These instructions are limited to control transfer
63 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle
64 * of %rip-relative addressing that means that almost any instruction can be
65 * position dependent. For all the details on how we emulate generic
66 * instructions included %rip-relative instructions, see the code in
67 * fasttrap_pid_probe() below where we handle instructions of type
68 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing).
69 */
70
71 #define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3)
72 #define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7)
73 #define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7)
74 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm))
75
76 #define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3)
77 #define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7)
78 #define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7)
79
80 #define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1)
81 #define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1)
82 #define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1)
83 #define FASTTRAP_REX_B(rex) ((rex) & 1)
84 #define FASTTRAP_REX(w, r, x, b) \
85 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b))
86
87 /*
88 * Single-byte op-codes.
89 */
90 #define FASTTRAP_PUSHL_EBP 0x55
91
92 #define FASTTRAP_JO 0x70
93 #define FASTTRAP_JNO 0x71
94 #define FASTTRAP_JB 0x72
95 #define FASTTRAP_JAE 0x73
96 #define FASTTRAP_JE 0x74
97 #define FASTTRAP_JNE 0x75
98 #define FASTTRAP_JBE 0x76
99 #define FASTTRAP_JA 0x77
100 #define FASTTRAP_JS 0x78
101 #define FASTTRAP_JNS 0x79
102 #define FASTTRAP_JP 0x7a
103 #define FASTTRAP_JNP 0x7b
104 #define FASTTRAP_JL 0x7c
105 #define FASTTRAP_JGE 0x7d
106 #define FASTTRAP_JLE 0x7e
107 #define FASTTRAP_JG 0x7f
108
109 #define FASTTRAP_NOP 0x90
110
111 #define FASTTRAP_MOV_EAX 0xb8
112 #define FASTTRAP_MOV_ECX 0xb9
113
114 #define FASTTRAP_RET16 0xc2
115 #define FASTTRAP_RET 0xc3
116
117 #define FASTTRAP_LOOPNZ 0xe0
118 #define FASTTRAP_LOOPZ 0xe1
119 #define FASTTRAP_LOOP 0xe2
120 #define FASTTRAP_JCXZ 0xe3
121
122 #define FASTTRAP_CALL 0xe8
123 #define FASTTRAP_JMP32 0xe9
124 #define FASTTRAP_JMP8 0xeb
125
126 #define FASTTRAP_INT3 0xcc
127 #define FASTTRAP_INT 0xcd
128 #define T_DTRACE_RET 0x7f
129
130 #define FASTTRAP_2_BYTE_OP 0x0f
131 #define FASTTRAP_GROUP5_OP 0xff
132
133 /*
134 * Two-byte op-codes (second byte only).
135 */
136 #define FASTTRAP_0F_JO 0x80
137 #define FASTTRAP_0F_JNO 0x81
138 #define FASTTRAP_0F_JB 0x82
139 #define FASTTRAP_0F_JAE 0x83
140 #define FASTTRAP_0F_JE 0x84
141 #define FASTTRAP_0F_JNE 0x85
142 #define FASTTRAP_0F_JBE 0x86
143 #define FASTTRAP_0F_JA 0x87
144 #define FASTTRAP_0F_JS 0x88
145 #define FASTTRAP_0F_JNS 0x89
146 #define FASTTRAP_0F_JP 0x8a
147 #define FASTTRAP_0F_JNP 0x8b
148 #define FASTTRAP_0F_JL 0x8c
149 #define FASTTRAP_0F_JGE 0x8d
150 #define FASTTRAP_0F_JLE 0x8e
151 #define FASTTRAP_0F_JG 0x8f
152
153 #define FASTTRAP_EFLAGS_OF 0x800
154 #define FASTTRAP_EFLAGS_DF 0x400
155 #define FASTTRAP_EFLAGS_SF 0x080
156 #define FASTTRAP_EFLAGS_ZF 0x040
157 #define FASTTRAP_EFLAGS_AF 0x010
158 #define FASTTRAP_EFLAGS_PF 0x004
159 #define FASTTRAP_EFLAGS_CF 0x001
160
161 /*
162 * Instruction prefixes.
163 */
164 #define FASTTRAP_PREFIX_OPERAND 0x66
165 #define FASTTRAP_PREFIX_ADDRESS 0x67
166 #define FASTTRAP_PREFIX_CS 0x2E
167 #define FASTTRAP_PREFIX_DS 0x3E
168 #define FASTTRAP_PREFIX_ES 0x26
169 #define FASTTRAP_PREFIX_FS 0x64
170 #define FASTTRAP_PREFIX_GS 0x65
171 #define FASTTRAP_PREFIX_SS 0x36
172 #define FASTTRAP_PREFIX_LOCK 0xF0
173 #define FASTTRAP_PREFIX_REP 0xF3
174 #define FASTTRAP_PREFIX_REPNE 0xF2
175
176 #define FASTTRAP_NOREG 0xff
177
178 /*
179 * Map between instruction register encodings and the kernel constants which
180 * correspond to indicies into struct regs.
181 */
182
183 /*
184 * APPLE NOTE: We are cheating here. The regmap is used to decode which register
185 * a given instruction is trying to reference. OS X does not have extended registers
186 * for 32 bit apps, but the *order* is the same. So for 32 bit state, we will return:
187 *
188 * REG_RAX -> EAX
189 * REG_RCX -> ECX
190 * REG_RDX -> EDX
191 * REG_RBX -> EBX
192 * REG_RSP -> UESP
193 * REG_RBP -> EBP
194 * REG_RSI -> ESI
195 * REG_RDI -> EDI
196 *
197 * The fasttrap_getreg function knows how to make the correct transformation.
198 */
199 static const uint8_t regmap[16] = {
200 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI,
201 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15,
202 };
203
204 static user_addr_t fasttrap_getreg(x86_saved_state_t *, uint_t);
205
206 static uint64_t
207 fasttrap_anarg(x86_saved_state_t *regs, int function_entry, int argno)
208 {
209 uint64_t value;
210 int shift = function_entry ? 1 : 0;
211
212 x86_saved_state64_t *regs64;
213 x86_saved_state32_t *regs32;
214 unsigned int p_model;
215
216 if (is_saved_state64(regs)) {
217 regs64 = saved_state64(regs);
218 regs32 = NULL;
219 p_model = DATAMODEL_LP64;
220 } else {
221 regs64 = NULL;
222 regs32 = saved_state32(regs);
223 p_model = DATAMODEL_ILP32;
224 }
225
226 if (p_model == DATAMODEL_LP64) {
227 user_addr_t stack;
228
229 /*
230 * In 64-bit mode, the first six arguments are stored in
231 * registers.
232 */
233 if (argno < 6)
234 return ((&regs64->rdi)[argno]);
235
236 stack = regs64->isf.rsp + sizeof(uint64_t) * (argno - 6 + shift);
237 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
238 value = dtrace_fuword64(stack);
239 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
240 } else {
241 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp);
242 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
243 value = dtrace_fuword32((user_addr_t)(unsigned long)&stack[argno + shift]);
244 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
245 }
246
247 return (value);
248 }
249
250 /*ARGSUSED*/
251 int
252 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, user_addr_t pc,
253 fasttrap_probe_type_t type)
254 {
255 #pragma unused(type)
256 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10];
257 size_t len = FASTTRAP_MAX_INSTR_SIZE;
258 size_t first = MIN(len, PAGE_SIZE - (pc & PAGE_MASK));
259 uint_t start = 0;
260 size_t size;
261 int rmindex;
262 uint8_t seg, rex = 0;
263 unsigned int p_model = (p->p_flag & P_LP64) ? DATAMODEL_LP64 : DATAMODEL_ILP32;
264
265 /*
266 * Read the instruction at the given address out of the process's
267 * address space. We don't have to worry about a debugger
268 * changing this instruction before we overwrite it with our trap
269 * instruction since P_PR_LOCK is set. Since instructions can span
270 * pages, we potentially read the instruction in two parts. If the
271 * second part fails, we just zero out that part of the instruction.
272 */
273 /*
274 * APPLE NOTE: Of course, we do not have a P_PR_LOCK, so this is racey...
275 */
276 if (uread(p, &instr[0], first, pc) != 0)
277 return (-1);
278 if (len > first &&
279 uread(p, &instr[first], len - first, pc + first) != 0) {
280 bzero(&instr[first], len - first);
281 len = first;
282 }
283
284 /*
285 * If the disassembly fails, then we have a malformed instruction.
286 */
287 if ((size = dtrace_instr_size_isa(instr, p_model, &rmindex)) <= 0)
288 return (-1);
289
290 /*
291 * Make sure the disassembler isn't completely broken.
292 */
293 ASSERT(-1 <= rmindex && rmindex < (int)size);
294
295 /*
296 * If the computed size is greater than the number of bytes read,
297 * then it was a malformed instruction possibly because it fell on a
298 * page boundary and the subsequent page was missing or because of
299 * some malicious user.
300 */
301 if (size > len)
302 return (-1);
303
304 tp->ftt_size = (uint8_t)size;
305 tp->ftt_segment = FASTTRAP_SEG_NONE;
306
307 /*
308 * Find the start of the instruction's opcode by processing any
309 * legacy prefixes.
310 */
311 for (;;) {
312 seg = 0;
313 switch (instr[start]) {
314 case FASTTRAP_PREFIX_SS:
315 seg++;
316 /*FALLTHRU*/
317 case FASTTRAP_PREFIX_GS:
318 seg++;
319 /*FALLTHRU*/
320 case FASTTRAP_PREFIX_FS:
321 seg++;
322 /*FALLTHRU*/
323 case FASTTRAP_PREFIX_ES:
324 seg++;
325 /*FALLTHRU*/
326 case FASTTRAP_PREFIX_DS:
327 seg++;
328 /*FALLTHRU*/
329 case FASTTRAP_PREFIX_CS:
330 seg++;
331 /*FALLTHRU*/
332 case FASTTRAP_PREFIX_OPERAND:
333 case FASTTRAP_PREFIX_ADDRESS:
334 case FASTTRAP_PREFIX_LOCK:
335 case FASTTRAP_PREFIX_REP:
336 case FASTTRAP_PREFIX_REPNE:
337 if (seg != 0) {
338 /*
339 * It's illegal for an instruction to specify
340 * two segment prefixes -- give up on this
341 * illegal instruction.
342 */
343 if (tp->ftt_segment != FASTTRAP_SEG_NONE)
344 return (-1);
345
346 tp->ftt_segment = seg;
347 }
348 start++;
349 continue;
350 }
351 break;
352 }
353
354 /*
355 * Identify the REX prefix on 64-bit processes.
356 */
357 if (p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40)
358 rex = instr[start++];
359
360 /*
361 * Now that we're pretty sure that the instruction is okay, copy the
362 * valid part to the tracepoint.
363 */
364 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE);
365
366 tp->ftt_type = FASTTRAP_T_COMMON;
367 if (instr[start] == FASTTRAP_2_BYTE_OP) {
368 switch (instr[start + 1]) {
369 case FASTTRAP_0F_JO:
370 case FASTTRAP_0F_JNO:
371 case FASTTRAP_0F_JB:
372 case FASTTRAP_0F_JAE:
373 case FASTTRAP_0F_JE:
374 case FASTTRAP_0F_JNE:
375 case FASTTRAP_0F_JBE:
376 case FASTTRAP_0F_JA:
377 case FASTTRAP_0F_JS:
378 case FASTTRAP_0F_JNS:
379 case FASTTRAP_0F_JP:
380 case FASTTRAP_0F_JNP:
381 case FASTTRAP_0F_JL:
382 case FASTTRAP_0F_JGE:
383 case FASTTRAP_0F_JLE:
384 case FASTTRAP_0F_JG:
385 tp->ftt_type = FASTTRAP_T_JCC;
386 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO;
387 tp->ftt_dest = pc + tp->ftt_size +
388 /* LINTED - alignment */
389 *(int32_t *)&instr[start + 2];
390 break;
391 }
392 } else if (instr[start] == FASTTRAP_GROUP5_OP) {
393 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]);
394 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]);
395 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]);
396
397 if (reg == 2 || reg == 4) {
398 uint_t i, sz;
399
400 if (reg == 2)
401 tp->ftt_type = FASTTRAP_T_CALL;
402 else
403 tp->ftt_type = FASTTRAP_T_JMP;
404
405 if (mod == 3)
406 tp->ftt_code = 2;
407 else
408 tp->ftt_code = 1;
409
410 ASSERT(p_model == DATAMODEL_LP64 || rex == 0);
411
412 /*
413 * See AMD x86-64 Architecture Programmer's Manual
414 * Volume 3, Section 1.2.7, Table 1-12, and
415 * Appendix A.3.1, Table A-15.
416 */
417 if (mod != 3 && rm == 4) {
418 uint8_t sib = instr[start + 2];
419 uint_t index = FASTTRAP_SIB_INDEX(sib);
420 uint_t base = FASTTRAP_SIB_BASE(sib);
421
422 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib);
423
424 tp->ftt_index = (index == 4) ?
425 FASTTRAP_NOREG :
426 regmap[index | (FASTTRAP_REX_X(rex) << 3)];
427 tp->ftt_base = (mod == 0 && base == 5) ?
428 FASTTRAP_NOREG :
429 regmap[base | (FASTTRAP_REX_B(rex) << 3)];
430
431 i = 3;
432 sz = mod == 1 ? 1 : 4;
433 } else {
434 /*
435 * In 64-bit mode, mod == 0 and r/m == 5
436 * denotes %rip-relative addressing; in 32-bit
437 * mode, the base register isn't used. In both
438 * modes, there is a 32-bit operand.
439 */
440 if (mod == 0 && rm == 5) {
441 if (p_model == DATAMODEL_LP64)
442 tp->ftt_base = REG_RIP;
443 else
444 tp->ftt_base = FASTTRAP_NOREG;
445 sz = 4;
446 } else {
447 uint8_t base = rm |
448 (FASTTRAP_REX_B(rex) << 3);
449
450 tp->ftt_base = regmap[base];
451 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0;
452 }
453 tp->ftt_index = FASTTRAP_NOREG;
454 i = 2;
455 }
456
457 if (sz == 1) {
458 tp->ftt_dest = *(int8_t *)&instr[start + i];
459 } else if (sz == 4) {
460 /* LINTED - alignment */
461 tp->ftt_dest = *(int32_t *)&instr[start + i];
462 } else {
463 tp->ftt_dest = 0;
464 }
465 }
466 } else {
467 switch (instr[start]) {
468 case FASTTRAP_RET:
469 tp->ftt_type = FASTTRAP_T_RET;
470 break;
471
472 case FASTTRAP_RET16:
473 tp->ftt_type = FASTTRAP_T_RET16;
474 /* LINTED - alignment */
475 tp->ftt_dest = *(uint16_t *)&instr[start + 1];
476 break;
477
478 case FASTTRAP_JO:
479 case FASTTRAP_JNO:
480 case FASTTRAP_JB:
481 case FASTTRAP_JAE:
482 case FASTTRAP_JE:
483 case FASTTRAP_JNE:
484 case FASTTRAP_JBE:
485 case FASTTRAP_JA:
486 case FASTTRAP_JS:
487 case FASTTRAP_JNS:
488 case FASTTRAP_JP:
489 case FASTTRAP_JNP:
490 case FASTTRAP_JL:
491 case FASTTRAP_JGE:
492 case FASTTRAP_JLE:
493 case FASTTRAP_JG:
494 tp->ftt_type = FASTTRAP_T_JCC;
495 tp->ftt_code = instr[start];
496 tp->ftt_dest = pc + tp->ftt_size +
497 (int8_t)instr[start + 1];
498 break;
499
500 case FASTTRAP_LOOPNZ:
501 case FASTTRAP_LOOPZ:
502 case FASTTRAP_LOOP:
503 tp->ftt_type = FASTTRAP_T_LOOP;
504 tp->ftt_code = instr[start];
505 tp->ftt_dest = pc + tp->ftt_size +
506 (int8_t)instr[start + 1];
507 break;
508
509 case FASTTRAP_JCXZ:
510 tp->ftt_type = FASTTRAP_T_JCXZ;
511 tp->ftt_dest = pc + tp->ftt_size +
512 (int8_t)instr[start + 1];
513 break;
514
515 case FASTTRAP_CALL:
516 tp->ftt_type = FASTTRAP_T_CALL;
517 tp->ftt_dest = pc + tp->ftt_size +
518 /* LINTED - alignment */
519 *(int32_t *)&instr[start + 1];
520 tp->ftt_code = 0;
521 break;
522
523 case FASTTRAP_JMP32:
524 tp->ftt_type = FASTTRAP_T_JMP;
525 tp->ftt_dest = pc + tp->ftt_size +
526 /* LINTED - alignment */
527 *(int32_t *)&instr[start + 1];
528 break;
529 case FASTTRAP_JMP8:
530 tp->ftt_type = FASTTRAP_T_JMP;
531 tp->ftt_dest = pc + tp->ftt_size +
532 (int8_t)instr[start + 1];
533 break;
534
535 case FASTTRAP_PUSHL_EBP:
536 if (start == 0)
537 tp->ftt_type = FASTTRAP_T_PUSHL_EBP;
538 break;
539
540 case FASTTRAP_NOP:
541 ASSERT(p_model == DATAMODEL_LP64 || rex == 0);
542
543 /*
544 * On sol64 we have to be careful not to confuse a nop
545 * (actually xchgl %eax, %eax) with an instruction using
546 * the same opcode, but that does something different
547 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax).
548 */
549 if (FASTTRAP_REX_B(rex) == 0)
550 tp->ftt_type = FASTTRAP_T_NOP;
551 break;
552
553 case FASTTRAP_INT3:
554 /*
555 * The pid provider shares the int3 trap with debugger
556 * breakpoints so we can't instrument them.
557 */
558 ASSERT(instr[start] == FASTTRAP_INSTR);
559 return (-1);
560
561 case FASTTRAP_INT:
562 /*
563 * Interrupts seem like they could be traced with
564 * no negative implications, but it's possible that
565 * a thread could be redirected by the trap handling
566 * code which would eventually return to the
567 * instruction after the interrupt. If the interrupt
568 * were in our scratch space, the subsequent
569 * instruction might be overwritten before we return.
570 * Accordingly we refuse to instrument any interrupt.
571 */
572 return (-1);
573 }
574 }
575
576 if (p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) {
577 /*
578 * If the process is 64-bit and the instruction type is still
579 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an
580 * execute it -- we need to watch for %rip-relative
581 * addressing mode. See the portion of fasttrap_pid_probe()
582 * below where we handle tracepoints with type
583 * FASTTRAP_T_COMMON for how we emulate instructions that
584 * employ %rip-relative addressing.
585 */
586 if (rmindex != -1) {
587 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]);
588 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]);
589 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]);
590
591 ASSERT(rmindex > (int)start);
592
593 if (mod == 0 && rm == 5) {
594 /*
595 * We need to be sure to avoid other
596 * registers used by this instruction. While
597 * the reg field may determine the op code
598 * rather than denoting a register, assuming
599 * that it denotes a register is always safe.
600 * We leave the REX field intact and use
601 * whatever value's there for simplicity.
602 */
603 if (reg != 0) {
604 tp->ftt_ripmode = FASTTRAP_RIP_1 |
605 (FASTTRAP_RIP_X *
606 FASTTRAP_REX_B(rex));
607 rm = 0;
608 } else {
609 tp->ftt_ripmode = FASTTRAP_RIP_2 |
610 (FASTTRAP_RIP_X *
611 FASTTRAP_REX_B(rex));
612 rm = 1;
613 }
614
615 tp->ftt_modrm = tp->ftt_instr[rmindex];
616 tp->ftt_instr[rmindex] =
617 FASTTRAP_MODRM(2, reg, rm);
618 }
619 }
620 }
621
622 return (0);
623 }
624
625 int
626 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp)
627 {
628 fasttrap_instr_t instr = FASTTRAP_INSTR;
629
630 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0)
631 return (-1);
632
633 tp->ftt_installed = 1;
634
635 return (0);
636 }
637
638 int
639 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp)
640 {
641 uint8_t instr;
642
643 /*
644 * Distinguish between read or write failures and a changed
645 * instruction.
646 */
647 if (uread(p, &instr, 1, tp->ftt_pc) != 0)
648 goto end;
649 if (instr != FASTTRAP_INSTR)
650 goto end;
651 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0)
652 return (-1);
653 end:
654 tp->ftt_installed = 0;
655
656 return (0);
657 }
658
659 static void
660 fasttrap_return_common(x86_saved_state_t *regs, user_addr_t pc, pid_t pid,
661 user_addr_t new_pc)
662 {
663 x86_saved_state64_t *regs64;
664 x86_saved_state32_t *regs32;
665 unsigned int p_model;
666 int retire_tp = 1;
667
668 dtrace_icookie_t cookie;
669
670 if (is_saved_state64(regs)) {
671 regs64 = saved_state64(regs);
672 regs32 = NULL;
673 p_model = DATAMODEL_LP64;
674 } else {
675 regs64 = NULL;
676 regs32 = saved_state32(regs);
677 p_model = DATAMODEL_ILP32;
678 }
679
680 fasttrap_tracepoint_t *tp;
681 fasttrap_bucket_t *bucket;
682 fasttrap_id_t *id;
683 lck_mtx_t *pid_mtx;
684
685 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
686 lck_mtx_lock(pid_mtx);
687 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
688
689 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
690 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
691 tp->ftt_proc->ftpc_acount != 0)
692 break;
693 }
694
695 /*
696 * Don't sweat it if we can't find the tracepoint again; unlike
697 * when we're in fasttrap_pid_probe(), finding the tracepoint here
698 * is not essential to the correct execution of the process.
699 */
700 if (tp == NULL) {
701 lck_mtx_unlock(pid_mtx);
702 return;
703 }
704
705 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) {
706 fasttrap_probe_t *probe = id->fti_probe;
707 /*
708 * If there's a branch that could act as a return site, we
709 * need to trace it, and check here if the program counter is
710 * external to the function.
711 */
712 if (tp->ftt_type != FASTTRAP_T_RET &&
713 tp->ftt_type != FASTTRAP_T_RET16 &&
714 new_pc - probe->ftp_faddr < probe->ftp_fsize)
715 continue;
716
717 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) {
718 if (os_atomic_xchg(&probe->ftp_triggered, 1, relaxed)) {
719 /* already triggered */
720 continue;
721 }
722 }
723 /*
724 * If we have at least one probe associated that
725 * is not a oneshot probe, don't remove the
726 * tracepoint
727 */
728 else {
729 retire_tp = 0;
730 }
731 /*
732 * Provide a hint to the stack trace functions to add the
733 * following pc to the top of the stack since it's missing
734 * on a return probe yet highly desirable for consistency.
735 */
736 cookie = dtrace_interrupt_disable();
737 cpu_core[CPU->cpu_id].cpuc_missing_tos = pc;
738 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) {
739 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id,
740 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV);
741 } else if (p_model == DATAMODEL_LP64) {
742 dtrace_probe(probe->ftp_id,
743 pc - id->fti_probe->ftp_faddr,
744 regs64->rax, regs64->rdx, 0, 0);
745 } else {
746 dtrace_probe(probe->ftp_id,
747 pc - id->fti_probe->ftp_faddr,
748 regs32->eax, regs32->edx, 0, 0);
749 }
750 /* remove the hint */
751 cpu_core[CPU->cpu_id].cpuc_missing_tos = 0;
752 dtrace_interrupt_enable(cookie);
753 }
754
755 lck_mtx_unlock(pid_mtx);
756 }
757
758 static void
759 fasttrap_sigsegv(proc_t *p, uthread_t t, user_addr_t addr)
760 {
761 proc_lock(p);
762
763 /* Set fault address and mark signal */
764 t->uu_code = addr;
765 t->uu_siglist |= sigmask(SIGSEGV);
766
767 /*
768 * XXX These two line may be redundant; if not, then we need
769 * XXX to potentially set the data address in the machine
770 * XXX specific thread state structure to indicate the address.
771 */
772 t->uu_exception = KERN_INVALID_ADDRESS; /* SIGSEGV */
773 t->uu_subcode = 0; /* XXX pad */
774
775 proc_unlock(p);
776
777 /* raise signal */
778 signal_setast(t->uu_context.vc_thread);
779 }
780
781 static void
782 fasttrap_usdt_args64(fasttrap_probe_t *probe, x86_saved_state64_t *regs64, int argc,
783 uint64_t *argv)
784 {
785 int i, x, cap = MIN(argc, probe->ftp_nargs);
786 user_addr_t stack = (user_addr_t)regs64->isf.rsp;
787
788 for (i = 0; i < cap; i++) {
789 x = probe->ftp_argmap[i];
790
791 if (x < 6) {
792 /* FIXME! This may be broken, needs testing */
793 argv[i] = (&regs64->rdi)[x];
794 } else {
795 fasttrap_fuword64_noerr(stack + (x * sizeof(uint64_t)), &argv[i]);
796 }
797 }
798
799 for (; i < argc; i++) {
800 argv[i] = 0;
801 }
802 }
803
804 static void
805 fasttrap_usdt_args32(fasttrap_probe_t *probe, x86_saved_state32_t *regs32, int argc,
806 uint32_t *argv)
807 {
808 int i, x, cap = MIN(argc, probe->ftp_nargs);
809 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp);
810
811 for (i = 0; i < cap; i++) {
812 x = probe->ftp_argmap[i];
813
814 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[x], &argv[i]);
815 }
816
817 for (; i < argc; i++) {
818 argv[i] = 0;
819 }
820 }
821
822 /*
823 * FIXME!
824 */
825 static int
826 fasttrap_do_seg(fasttrap_tracepoint_t *tp, x86_saved_state_t *rp, user_addr_t *addr) // 64 bit
827 {
828 #pragma unused(tp, rp, addr)
829 printf("fasttrap_do_seg() called while unimplemented.\n");
830 #if 0
831 proc_t *p = curproc;
832 user_desc_t *desc;
833 uint16_t sel, ndx, type;
834 uintptr_t limit;
835
836 switch (tp->ftt_segment) {
837 case FASTTRAP_SEG_CS:
838 sel = rp->r_cs;
839 break;
840 case FASTTRAP_SEG_DS:
841 sel = rp->r_ds;
842 break;
843 case FASTTRAP_SEG_ES:
844 sel = rp->r_es;
845 break;
846 case FASTTRAP_SEG_FS:
847 sel = rp->r_fs;
848 break;
849 case FASTTRAP_SEG_GS:
850 sel = rp->r_gs;
851 break;
852 case FASTTRAP_SEG_SS:
853 sel = rp->r_ss;
854 break;
855 }
856
857 /*
858 * Make sure the given segment register specifies a user priority
859 * selector rather than a kernel selector.
860 */
861 if (!SELISUPL(sel))
862 return (-1);
863
864 ndx = SELTOIDX(sel);
865
866 /*
867 * Check the bounds and grab the descriptor out of the specified
868 * descriptor table.
869 */
870 if (SELISLDT(sel)) {
871 if (ndx > p->p_ldtlimit)
872 return (-1);
873
874 desc = p->p_ldt + ndx;
875
876 } else {
877 if (ndx >= NGDT)
878 return (-1);
879
880 desc = cpu_get_gdt() + ndx;
881 }
882
883 /*
884 * The descriptor must have user privilege level and it must be
885 * present in memory.
886 */
887 if (desc->usd_dpl != SEL_UPL || desc->usd_p != 1)
888 return (-1);
889
890 type = desc->usd_type;
891
892 /*
893 * If the S bit in the type field is not set, this descriptor can
894 * only be used in system context.
895 */
896 if ((type & 0x10) != 0x10)
897 return (-1);
898
899 limit = USEGD_GETLIMIT(desc) * (desc->usd_gran ? PAGESIZE : 1);
900
901 if (tp->ftt_segment == FASTTRAP_SEG_CS) {
902 /*
903 * The code/data bit and readable bit must both be set.
904 */
905 if ((type & 0xa) != 0xa)
906 return (-1);
907
908 if (*addr > limit)
909 return (-1);
910 } else {
911 /*
912 * The code/data bit must be clear.
913 */
914 if ((type & 0x8) != 0)
915 return (-1);
916
917 /*
918 * If the expand-down bit is clear, we just check the limit as
919 * it would naturally be applied. Otherwise, we need to check
920 * that the address is the range [limit + 1 .. 0xffff] or
921 * [limit + 1 ... 0xffffffff] depending on if the default
922 * operand size bit is set.
923 */
924 if ((type & 0x4) == 0) {
925 if (*addr > limit)
926 return (-1);
927 } else if (desc->usd_def32) {
928 if (*addr < limit + 1 || 0xffff < *addr)
929 return (-1);
930 } else {
931 if (*addr < limit + 1 || 0xffffffff < *addr)
932 return (-1);
933 }
934 }
935
936 *addr += USEGD_GETBASE(desc);
937 #endif /* 0 */
938 return (0);
939 }
940
941 /*
942 * Due to variances between Solaris and xnu, I have split this into a 32 bit and 64 bit
943 * code path. It still takes an x86_saved_state_t* argument, because it must sometimes
944 * call other methods that require a x86_saved_state_t.
945 *
946 * NOTE!!!!
947 *
948 * Any changes made to this method must be echo'd in fasttrap_pid_probe64!
949 *
950 */
951 static int
952 fasttrap_pid_probe32(x86_saved_state_t *regs)
953 {
954 ASSERT(is_saved_state32(regs));
955
956 x86_saved_state32_t *regs32 = saved_state32(regs);
957 user_addr_t pc = regs32->eip - 1;
958 proc_t *p = current_proc();
959 user_addr_t new_pc = 0;
960 fasttrap_bucket_t *bucket;
961 lck_mtx_t *pid_mtx;
962 fasttrap_tracepoint_t *tp, tp_local;
963 pid_t pid;
964 dtrace_icookie_t cookie;
965 uint_t is_enabled = 0, retire_tp = 1;
966
967 uthread_t uthread = (uthread_t)get_bsdthread_info(current_thread());
968
969 /*
970 * It's possible that a user (in a veritable orgy of bad planning)
971 * could redirect this thread's flow of control before it reached the
972 * return probe fasttrap. In this case we need to kill the process
973 * since it's in a unrecoverable state.
974 */
975 if (uthread->t_dtrace_step) {
976 ASSERT(uthread->t_dtrace_on);
977 fasttrap_sigtrap(p, uthread, pc);
978 return (0);
979 }
980
981 /*
982 * Clear all user tracing flags.
983 */
984 uthread->t_dtrace_ft = 0;
985 uthread->t_dtrace_pc = 0;
986 uthread->t_dtrace_npc = 0;
987 uthread->t_dtrace_scrpc = 0;
988 uthread->t_dtrace_astpc = 0;
989
990 /*
991 * Treat a child created by a call to vfork(2) as if it were its
992 * parent. We know that there's only one thread of control in such a
993 * process: this one.
994 */
995 if (p->p_lflag & P_LINVFORK) {
996 proc_list_lock();
997 while (p->p_lflag & P_LINVFORK)
998 p = p->p_pptr;
999 proc_list_unlock();
1000 }
1001
1002 pid = p->p_pid;
1003 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
1004 lck_mtx_lock(pid_mtx);
1005 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
1006
1007 /*
1008 * Lookup the tracepoint that the process just hit.
1009 */
1010 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
1011 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1012 tp->ftt_proc->ftpc_acount != 0)
1013 break;
1014 }
1015
1016 /*
1017 * If we couldn't find a matching tracepoint, either a tracepoint has
1018 * been inserted without using the pid<pid> ioctl interface (see
1019 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1020 */
1021 if (tp == NULL) {
1022 lck_mtx_unlock(pid_mtx);
1023 return (-1);
1024 }
1025
1026 /*
1027 * Set the program counter to the address of the traced instruction
1028 * so that it looks right in ustack() output.
1029 */
1030 regs32->eip = pc;
1031
1032 if (tp->ftt_ids != NULL) {
1033 fasttrap_id_t *id;
1034
1035 uint32_t s0, s1, s2, s3, s4, s5;
1036 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp);
1037
1038 /*
1039 * In 32-bit mode, all arguments are passed on the
1040 * stack. If this is a function entry probe, we need
1041 * to skip the first entry on the stack as it
1042 * represents the return address rather than a
1043 * parameter to the function.
1044 */
1045 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[0], &s0);
1046 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[1], &s1);
1047 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[2], &s2);
1048 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[3], &s3);
1049 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[4], &s4);
1050 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[5], &s5);
1051
1052 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1053 fasttrap_probe_t *probe = id->fti_probe;
1054
1055 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) {
1056 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id,
1057 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV);
1058 } else {
1059 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) {
1060 if (os_atomic_xchg(&probe->ftp_triggered, 1, relaxed)) {
1061 /* already triggered */
1062 continue;
1063 }
1064 }
1065 /*
1066 * If we have at least one probe associated that
1067 * is not a oneshot probe, don't remove the
1068 * tracepoint
1069 */
1070 else {
1071 retire_tp = 0;
1072 }
1073 if (id->fti_ptype == DTFTP_ENTRY) {
1074 /*
1075 * We note that this was an entry
1076 * probe to help ustack() find the
1077 * first caller.
1078 */
1079 cookie = dtrace_interrupt_disable();
1080 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1081 dtrace_probe(probe->ftp_id, s1, s2,
1082 s3, s4, s5);
1083 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1084 dtrace_interrupt_enable(cookie);
1085 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1086 /*
1087 * Note that in this case, we don't
1088 * call dtrace_probe() since it's only
1089 * an artificial probe meant to change
1090 * the flow of control so that it
1091 * encounters the true probe.
1092 */
1093 is_enabled = 1;
1094 } else if (probe->ftp_argmap == NULL) {
1095 dtrace_probe(probe->ftp_id, s0, s1,
1096 s2, s3, s4);
1097 } else {
1098 uint32_t t[5];
1099
1100 fasttrap_usdt_args32(probe, regs32,
1101 sizeof (t) / sizeof (t[0]), t);
1102
1103 dtrace_probe(probe->ftp_id, t[0], t[1],
1104 t[2], t[3], t[4]);
1105 }
1106 }
1107 }
1108 if (retire_tp) {
1109 fasttrap_tracepoint_retire(p, tp);
1110 }
1111 }
1112
1113 /*
1114 * We're about to do a bunch of work so we cache a local copy of
1115 * the tracepoint to emulate the instruction, and then find the
1116 * tracepoint again later if we need to light up any return probes.
1117 */
1118 tp_local = *tp;
1119 lck_mtx_unlock(pid_mtx);
1120 tp = &tp_local;
1121
1122 /*
1123 * Set the program counter to appear as though the traced instruction
1124 * had completely executed. This ensures that fasttrap_getreg() will
1125 * report the expected value for REG_RIP.
1126 */
1127 regs32->eip = pc + tp->ftt_size;
1128
1129 /*
1130 * If there's an is-enabled probe connected to this tracepoint it
1131 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1132 * instruction that was placed there by DTrace when the binary was
1133 * linked. As this probe is, in fact, enabled, we need to stuff 1
1134 * into %eax or %rax. Accordingly, we can bypass all the instruction
1135 * emulation logic since we know the inevitable result. It's possible
1136 * that a user could construct a scenario where the 'is-enabled'
1137 * probe was on some other instruction, but that would be a rather
1138 * exotic way to shoot oneself in the foot.
1139 */
1140 if (is_enabled) {
1141 regs32->eax = 1;
1142 new_pc = regs32->eip;
1143 goto done;
1144 }
1145
1146 /*
1147 * We emulate certain types of instructions to ensure correctness
1148 * (in the case of position dependent instructions) or optimize
1149 * common cases. The rest we have the thread execute back in user-
1150 * land.
1151 */
1152 switch (tp->ftt_type) {
1153 case FASTTRAP_T_RET:
1154 case FASTTRAP_T_RET16:
1155 {
1156 user_addr_t dst;
1157 user_addr_t addr;
1158 int ret;
1159
1160 /*
1161 * We have to emulate _every_ facet of the behavior of a ret
1162 * instruction including what happens if the load from %esp
1163 * fails; in that case, we send a SIGSEGV.
1164 */
1165 uint32_t dst32;
1166 ret = fasttrap_fuword32((user_addr_t)regs32->uesp, &dst32);
1167 dst = dst32;
1168 addr = regs32->uesp + sizeof (uint32_t);
1169
1170 if (ret == -1) {
1171 fasttrap_sigsegv(p, uthread, (user_addr_t)regs32->uesp);
1172 new_pc = pc;
1173 break;
1174 }
1175
1176 if (tp->ftt_type == FASTTRAP_T_RET16)
1177 addr += tp->ftt_dest;
1178
1179 regs32->uesp = addr;
1180 new_pc = dst;
1181 break;
1182 }
1183
1184 case FASTTRAP_T_JCC:
1185 {
1186 uint_t taken;
1187
1188 switch (tp->ftt_code) {
1189 case FASTTRAP_JO:
1190 taken = (regs32->efl & FASTTRAP_EFLAGS_OF) != 0;
1191 break;
1192 case FASTTRAP_JNO:
1193 taken = (regs32->efl & FASTTRAP_EFLAGS_OF) == 0;
1194 break;
1195 case FASTTRAP_JB:
1196 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) != 0;
1197 break;
1198 case FASTTRAP_JAE:
1199 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) == 0;
1200 break;
1201 case FASTTRAP_JE:
1202 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0;
1203 break;
1204 case FASTTRAP_JNE:
1205 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0;
1206 break;
1207 case FASTTRAP_JBE:
1208 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) != 0 ||
1209 (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0;
1210 break;
1211 case FASTTRAP_JA:
1212 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) == 0 &&
1213 (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0;
1214 break;
1215 case FASTTRAP_JS:
1216 taken = (regs32->efl & FASTTRAP_EFLAGS_SF) != 0;
1217 break;
1218 case FASTTRAP_JNS:
1219 taken = (regs32->efl & FASTTRAP_EFLAGS_SF) == 0;
1220 break;
1221 case FASTTRAP_JP:
1222 taken = (regs32->efl & FASTTRAP_EFLAGS_PF) != 0;
1223 break;
1224 case FASTTRAP_JNP:
1225 taken = (regs32->efl & FASTTRAP_EFLAGS_PF) == 0;
1226 break;
1227 case FASTTRAP_JL:
1228 taken = ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) !=
1229 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1230 break;
1231 case FASTTRAP_JGE:
1232 taken = ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) ==
1233 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1234 break;
1235 case FASTTRAP_JLE:
1236 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0 ||
1237 ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) !=
1238 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1239 break;
1240 case FASTTRAP_JG:
1241 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0 &&
1242 ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) ==
1243 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1244 break;
1245 default:
1246 taken = FALSE;
1247 }
1248
1249 if (taken)
1250 new_pc = tp->ftt_dest;
1251 else
1252 new_pc = pc + tp->ftt_size;
1253 break;
1254 }
1255
1256 case FASTTRAP_T_LOOP:
1257 {
1258 uint_t taken;
1259 greg_t cx = regs32->ecx--;
1260
1261 switch (tp->ftt_code) {
1262 case FASTTRAP_LOOPNZ:
1263 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0 &&
1264 cx != 0;
1265 break;
1266 case FASTTRAP_LOOPZ:
1267 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0 &&
1268 cx != 0;
1269 break;
1270 case FASTTRAP_LOOP:
1271 taken = (cx != 0);
1272 break;
1273 default:
1274 taken = FALSE;
1275 }
1276
1277 if (taken)
1278 new_pc = tp->ftt_dest;
1279 else
1280 new_pc = pc + tp->ftt_size;
1281 break;
1282 }
1283
1284 case FASTTRAP_T_JCXZ:
1285 {
1286 greg_t cx = regs32->ecx;
1287
1288 if (cx == 0)
1289 new_pc = tp->ftt_dest;
1290 else
1291 new_pc = pc + tp->ftt_size;
1292 break;
1293 }
1294
1295 case FASTTRAP_T_PUSHL_EBP:
1296 {
1297 user_addr_t addr = regs32->uesp - sizeof (uint32_t);
1298 int ret = fasttrap_suword32(addr, (uint32_t)regs32->ebp);
1299
1300 if (ret == -1) {
1301 fasttrap_sigsegv(p, uthread, addr);
1302 new_pc = pc;
1303 break;
1304 }
1305
1306 regs32->uesp = addr;
1307 new_pc = pc + tp->ftt_size;
1308 break;
1309 }
1310
1311 case FASTTRAP_T_NOP:
1312 new_pc = pc + tp->ftt_size;
1313 break;
1314
1315 case FASTTRAP_T_JMP:
1316 case FASTTRAP_T_CALL:
1317 if (tp->ftt_code == 0) {
1318 new_pc = tp->ftt_dest;
1319 } else {
1320 user_addr_t /* value ,*/ addr = tp->ftt_dest;
1321
1322 if (tp->ftt_base != FASTTRAP_NOREG)
1323 addr += fasttrap_getreg(regs, tp->ftt_base);
1324 if (tp->ftt_index != FASTTRAP_NOREG)
1325 addr += fasttrap_getreg(regs, tp->ftt_index) <<
1326 tp->ftt_scale;
1327
1328 if (tp->ftt_code == 1) {
1329 /*
1330 * If there's a segment prefix for this
1331 * instruction, we'll need to check permissions
1332 * and bounds on the given selector, and adjust
1333 * the address accordingly.
1334 */
1335 if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1336 fasttrap_do_seg(tp, regs, &addr) != 0) {
1337 fasttrap_sigsegv(p, uthread, addr);
1338 new_pc = pc;
1339 break;
1340 }
1341
1342 uint32_t value32;
1343 addr = (user_addr_t)(uint32_t)addr;
1344 if (fasttrap_fuword32(addr, &value32) == -1) {
1345 fasttrap_sigsegv(p, uthread, addr);
1346 new_pc = pc;
1347 break;
1348 }
1349 new_pc = value32;
1350 } else {
1351 new_pc = addr;
1352 }
1353 }
1354
1355 /*
1356 * If this is a call instruction, we need to push the return
1357 * address onto the stack. If this fails, we send the process
1358 * a SIGSEGV and reset the pc to emulate what would happen if
1359 * this instruction weren't traced.
1360 */
1361 if (tp->ftt_type == FASTTRAP_T_CALL) {
1362 user_addr_t addr = regs32->uesp - sizeof (uint32_t);
1363 int ret = fasttrap_suword32(addr, (uint32_t)(pc + tp->ftt_size));
1364
1365 if (ret == -1) {
1366 fasttrap_sigsegv(p, uthread, addr);
1367 new_pc = pc;
1368 break;
1369 }
1370
1371 regs32->uesp = addr;
1372 }
1373 break;
1374
1375 case FASTTRAP_T_COMMON:
1376 {
1377 user_addr_t addr, write_addr;
1378 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7];
1379 uint_t i = 0;
1380
1381 /*
1382 * Generic Instruction Tracing
1383 * ---------------------------
1384 *
1385 * This is the layout of the scratch space in the user-land
1386 * thread structure for our generated instructions.
1387 *
1388 * 32-bit mode bytes
1389 * ------------------------ -----
1390 * a: <original instruction> <= 15
1391 * jmp <pc + tp->ftt_size> 5
1392 * b: <original instrction> <= 15
1393 * int T_DTRACE_RET 2
1394 * -----
1395 * <= 37
1396 *
1397 * 64-bit mode bytes
1398 * ------------------------ -----
1399 * a: <original instruction> <= 15
1400 * jmp 0(%rip) 6
1401 * <pc + tp->ftt_size> 8
1402 * b: <original instruction> <= 15
1403 * int T_DTRACE_RET 2
1404 * -----
1405 * <= 46
1406 *
1407 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1408 * to b. If we encounter a signal on the way out of the
1409 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1410 * so that we execute the original instruction and re-enter
1411 * the kernel rather than redirecting to the next instruction.
1412 *
1413 * If there are return probes (so we know that we're going to
1414 * need to reenter the kernel after executing the original
1415 * instruction), the scratch space will just contain the
1416 * original instruction followed by an interrupt -- the same
1417 * data as at b.
1418 */
1419
1420 addr = uthread->t_dtrace_scratch->addr;
1421 write_addr = uthread->t_dtrace_scratch->write_addr;
1422
1423 if (addr == 0LL || write_addr == 0LL) {
1424 fasttrap_sigtrap(p, uthread, pc); // Should be killing target proc
1425 new_pc = pc;
1426 break;
1427 }
1428
1429 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
1430
1431 uthread->t_dtrace_scrpc = addr;
1432 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1433 i += tp->ftt_size;
1434
1435 /*
1436 * Set up the jmp to the next instruction; note that
1437 * the size of the traced instruction cancels out.
1438 */
1439 scratch[i++] = FASTTRAP_JMP32;
1440 /* LINTED - alignment */
1441 *(uint32_t *)&scratch[i] = pc - addr - 5;
1442 i += sizeof (uint32_t);
1443
1444 uthread->t_dtrace_astpc = addr + i;
1445 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1446 i += tp->ftt_size;
1447 scratch[i++] = FASTTRAP_INT;
1448 scratch[i++] = T_DTRACE_RET;
1449
1450 ASSERT(i <= sizeof (scratch));
1451
1452 if (fasttrap_copyout(scratch, write_addr, i)) {
1453 fasttrap_sigtrap(p, uthread, pc);
1454 new_pc = pc;
1455 break;
1456 }
1457
1458 if (tp->ftt_retids != NULL) {
1459 uthread->t_dtrace_step = 1;
1460 uthread->t_dtrace_ret = 1;
1461 new_pc = uthread->t_dtrace_astpc;
1462 } else {
1463 new_pc = uthread->t_dtrace_scrpc;
1464 }
1465
1466 uthread->t_dtrace_pc = pc;
1467 uthread->t_dtrace_npc = pc + tp->ftt_size;
1468 uthread->t_dtrace_on = 1;
1469 break;
1470 }
1471
1472 default:
1473 panic("fasttrap: mishandled an instruction");
1474 }
1475
1476 done:
1477 /*
1478 * APPLE NOTE:
1479 *
1480 * We're setting this earlier than Solaris does, to get a "correct"
1481 * ustack() output. In the Sun code, a() -> b() -> c() -> d() is
1482 * reported at: d, b, a. The new way gives c, b, a, which is closer
1483 * to correct, as the return instruction has already exectued.
1484 */
1485 regs32->eip = new_pc;
1486
1487 /*
1488 * If there were no return probes when we first found the tracepoint,
1489 * we should feel no obligation to honor any return probes that were
1490 * subsequently enabled -- they'll just have to wait until the next
1491 * time around.
1492 */
1493 if (tp->ftt_retids != NULL) {
1494 /*
1495 * We need to wait until the results of the instruction are
1496 * apparent before invoking any return probes. If this
1497 * instruction was emulated we can just call
1498 * fasttrap_return_common(); if it needs to be executed, we
1499 * need to wait until the user thread returns to the kernel.
1500 */
1501 if (tp->ftt_type != FASTTRAP_T_COMMON) {
1502 fasttrap_return_common(regs, pc, pid, new_pc);
1503 } else {
1504 ASSERT(uthread->t_dtrace_ret != 0);
1505 ASSERT(uthread->t_dtrace_pc == pc);
1506 ASSERT(uthread->t_dtrace_scrpc != 0);
1507 ASSERT(new_pc == uthread->t_dtrace_astpc);
1508 }
1509 }
1510
1511 return (0);
1512 }
1513
1514 /*
1515 * Due to variances between Solaris and xnu, I have split this into a 32 bit and 64 bit
1516 * code path. It still takes an x86_saved_state_t* argument, because it must sometimes
1517 * call other methods that require a x86_saved_state_t.
1518 *
1519 * NOTE!!!!
1520 *
1521 * Any changes made to this method must be echo'd in fasttrap_pid_probe32!
1522 *
1523 */
1524 static int
1525 fasttrap_pid_probe64(x86_saved_state_t *regs)
1526 {
1527 ASSERT(is_saved_state64(regs));
1528
1529 x86_saved_state64_t *regs64 = saved_state64(regs);
1530 user_addr_t pc = regs64->isf.rip - 1;
1531 proc_t *p = current_proc();
1532 user_addr_t new_pc = 0;
1533 fasttrap_bucket_t *bucket;
1534 lck_mtx_t *pid_mtx;
1535 fasttrap_tracepoint_t *tp, tp_local;
1536 pid_t pid;
1537 dtrace_icookie_t cookie;
1538 uint_t is_enabled = 0;
1539 int retire_tp = 1;
1540
1541 uthread_t uthread = (uthread_t)get_bsdthread_info(current_thread());
1542
1543 /*
1544 * It's possible that a user (in a veritable orgy of bad planning)
1545 * could redirect this thread's flow of control before it reached the
1546 * return probe fasttrap. In this case we need to kill the process
1547 * since it's in a unrecoverable state.
1548 */
1549 if (uthread->t_dtrace_step) {
1550 ASSERT(uthread->t_dtrace_on);
1551 fasttrap_sigtrap(p, uthread, pc);
1552 return (0);
1553 }
1554
1555 /*
1556 * Clear all user tracing flags.
1557 */
1558 uthread->t_dtrace_ft = 0;
1559 uthread->t_dtrace_pc = 0;
1560 uthread->t_dtrace_npc = 0;
1561 uthread->t_dtrace_scrpc = 0;
1562 uthread->t_dtrace_astpc = 0;
1563 uthread->t_dtrace_regv = 0;
1564
1565 /*
1566 * Treat a child created by a call to vfork(2) as if it were its
1567 * parent. We know that there's only one thread of control in such a
1568 * process: this one.
1569 */
1570 if (p->p_lflag & P_LINVFORK) {
1571 proc_list_lock();
1572 while (p->p_lflag & P_LINVFORK)
1573 p = p->p_pptr;
1574 proc_list_unlock();
1575 }
1576
1577 pid = p->p_pid;
1578 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
1579 lck_mtx_lock(pid_mtx);
1580 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
1581
1582 /*
1583 * Lookup the tracepoint that the process just hit.
1584 */
1585 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
1586 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1587 tp->ftt_proc->ftpc_acount != 0)
1588 break;
1589 }
1590
1591 /*
1592 * If we couldn't find a matching tracepoint, either a tracepoint has
1593 * been inserted without using the pid<pid> ioctl interface (see
1594 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1595 */
1596 if (tp == NULL) {
1597 lck_mtx_unlock(pid_mtx);
1598 return (-1);
1599 }
1600
1601 /*
1602 * Set the program counter to the address of the traced instruction
1603 * so that it looks right in ustack() output.
1604 */
1605 regs64->isf.rip = pc;
1606
1607 if (tp->ftt_ids != NULL) {
1608 fasttrap_id_t *id;
1609
1610 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1611 fasttrap_probe_t *probe = id->fti_probe;
1612
1613 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) {
1614 if (os_atomic_xchg(&probe->ftp_triggered, 1, relaxed)) {
1615 /* already triggered */
1616 continue;
1617 }
1618 }
1619 /*
1620 * If we have at least probe associated that
1621 * is not a oneshot probe, don't remove the
1622 * tracepoint
1623 */
1624 else {
1625 retire_tp = 0;
1626 }
1627 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) {
1628 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id,
1629 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV);
1630 } else if (id->fti_ptype == DTFTP_ENTRY) {
1631 /*
1632 * We note that this was an entry
1633 * probe to help ustack() find the
1634 * first caller.
1635 */
1636 cookie = dtrace_interrupt_disable();
1637 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1638 dtrace_probe(probe->ftp_id, regs64->rdi,
1639 regs64->rsi, regs64->rdx, regs64->rcx,
1640 regs64->r8);
1641 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1642 dtrace_interrupt_enable(cookie);
1643 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1644 /*
1645 * Note that in this case, we don't
1646 * call dtrace_probe() since it's only
1647 * an artificial probe meant to change
1648 * the flow of control so that it
1649 * encounters the true probe.
1650 */
1651 is_enabled = 1;
1652 } else if (probe->ftp_argmap == NULL) {
1653 dtrace_probe(probe->ftp_id, regs64->rdi,
1654 regs64->rsi, regs64->rdx, regs64->rcx,
1655 regs64->r8);
1656 } else {
1657 uint64_t t[5];
1658
1659 fasttrap_usdt_args64(probe, regs64,
1660 sizeof (t) / sizeof (t[0]), t);
1661
1662 dtrace_probe(probe->ftp_id, t[0], t[1],
1663 t[2], t[3], t[4]);
1664 }
1665
1666 }
1667 if (retire_tp) {
1668 fasttrap_tracepoint_retire(p, tp);
1669 }
1670 }
1671
1672 /*
1673 * We're about to do a bunch of work so we cache a local copy of
1674 * the tracepoint to emulate the instruction, and then find the
1675 * tracepoint again later if we need to light up any return probes.
1676 */
1677 tp_local = *tp;
1678 lck_mtx_unlock(pid_mtx);
1679 tp = &tp_local;
1680
1681 /*
1682 * Set the program counter to appear as though the traced instruction
1683 * had completely executed. This ensures that fasttrap_getreg() will
1684 * report the expected value for REG_RIP.
1685 */
1686 regs64->isf.rip = pc + tp->ftt_size;
1687
1688 /*
1689 * If there's an is-enabled probe connected to this tracepoint it
1690 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1691 * instruction that was placed there by DTrace when the binary was
1692 * linked. As this probe is, in fact, enabled, we need to stuff 1
1693 * into %eax or %rax. Accordingly, we can bypass all the instruction
1694 * emulation logic since we know the inevitable result. It's possible
1695 * that a user could construct a scenario where the 'is-enabled'
1696 * probe was on some other instruction, but that would be a rather
1697 * exotic way to shoot oneself in the foot.
1698 */
1699 if (is_enabled) {
1700 regs64->rax = 1;
1701 new_pc = regs64->isf.rip;
1702 goto done;
1703 }
1704
1705 /*
1706 * We emulate certain types of instructions to ensure correctness
1707 * (in the case of position dependent instructions) or optimize
1708 * common cases. The rest we have the thread execute back in user-
1709 * land.
1710 */
1711 switch (tp->ftt_type) {
1712 case FASTTRAP_T_RET:
1713 case FASTTRAP_T_RET16:
1714 {
1715 user_addr_t dst;
1716 user_addr_t addr;
1717 int ret;
1718
1719 /*
1720 * We have to emulate _every_ facet of the behavior of a ret
1721 * instruction including what happens if the load from %esp
1722 * fails; in that case, we send a SIGSEGV.
1723 */
1724 ret = fasttrap_fuword64((user_addr_t)regs64->isf.rsp, &dst);
1725 addr = regs64->isf.rsp + sizeof (uint64_t);
1726
1727 if (ret == -1) {
1728 fasttrap_sigsegv(p, uthread, (user_addr_t)regs64->isf.rsp);
1729 new_pc = pc;
1730 break;
1731 }
1732
1733 if (tp->ftt_type == FASTTRAP_T_RET16)
1734 addr += tp->ftt_dest;
1735
1736 regs64->isf.rsp = addr;
1737 new_pc = dst;
1738 break;
1739 }
1740
1741 case FASTTRAP_T_JCC:
1742 {
1743 uint_t taken;
1744
1745 switch (tp->ftt_code) {
1746 case FASTTRAP_JO:
1747 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_OF) != 0;
1748 break;
1749 case FASTTRAP_JNO:
1750 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0;
1751 break;
1752 case FASTTRAP_JB:
1753 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) != 0;
1754 break;
1755 case FASTTRAP_JAE:
1756 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) == 0;
1757 break;
1758 case FASTTRAP_JE:
1759 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0;
1760 break;
1761 case FASTTRAP_JNE:
1762 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0;
1763 break;
1764 case FASTTRAP_JBE:
1765 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) != 0 ||
1766 (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0;
1767 break;
1768 case FASTTRAP_JA:
1769 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) == 0 &&
1770 (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0;
1771 break;
1772 case FASTTRAP_JS:
1773 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_SF) != 0;
1774 break;
1775 case FASTTRAP_JNS:
1776 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0;
1777 break;
1778 case FASTTRAP_JP:
1779 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_PF) != 0;
1780 break;
1781 case FASTTRAP_JNP:
1782 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_PF) == 0;
1783 break;
1784 case FASTTRAP_JL:
1785 taken = ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1786 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1787 break;
1788 case FASTTRAP_JGE:
1789 taken = ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1790 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1791 break;
1792 case FASTTRAP_JLE:
1793 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0 ||
1794 ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1795 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1796 break;
1797 case FASTTRAP_JG:
1798 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1799 ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1800 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1801 break;
1802 default:
1803 taken = FALSE;
1804 }
1805
1806 if (taken)
1807 new_pc = tp->ftt_dest;
1808 else
1809 new_pc = pc + tp->ftt_size;
1810 break;
1811 }
1812
1813 case FASTTRAP_T_LOOP:
1814 {
1815 uint_t taken;
1816 uint64_t cx = regs64->rcx--;
1817
1818 switch (tp->ftt_code) {
1819 case FASTTRAP_LOOPNZ:
1820 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1821 cx != 0;
1822 break;
1823 case FASTTRAP_LOOPZ:
1824 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0 &&
1825 cx != 0;
1826 break;
1827 case FASTTRAP_LOOP:
1828 taken = (cx != 0);
1829 break;
1830 default:
1831 taken = FALSE;
1832 }
1833
1834 if (taken)
1835 new_pc = tp->ftt_dest;
1836 else
1837 new_pc = pc + tp->ftt_size;
1838 break;
1839 }
1840
1841 case FASTTRAP_T_JCXZ:
1842 {
1843 uint64_t cx = regs64->rcx;
1844
1845 if (cx == 0)
1846 new_pc = tp->ftt_dest;
1847 else
1848 new_pc = pc + tp->ftt_size;
1849 break;
1850 }
1851
1852 case FASTTRAP_T_PUSHL_EBP:
1853 {
1854 user_addr_t addr = regs64->isf.rsp - sizeof (uint64_t);
1855 int ret = fasttrap_suword64(addr, (uint64_t)regs64->rbp);
1856
1857 if (ret == -1) {
1858 fasttrap_sigsegv(p, uthread, addr);
1859 new_pc = pc;
1860 break;
1861 }
1862
1863 regs64->isf.rsp = addr;
1864 new_pc = pc + tp->ftt_size;
1865 break;
1866 }
1867
1868 case FASTTRAP_T_NOP:
1869 new_pc = pc + tp->ftt_size;
1870 break;
1871
1872 case FASTTRAP_T_JMP:
1873 case FASTTRAP_T_CALL:
1874 if (tp->ftt_code == 0) {
1875 new_pc = tp->ftt_dest;
1876 } else {
1877 user_addr_t value, addr = tp->ftt_dest;
1878
1879 if (tp->ftt_base != FASTTRAP_NOREG)
1880 addr += fasttrap_getreg(regs, tp->ftt_base);
1881 if (tp->ftt_index != FASTTRAP_NOREG)
1882 addr += fasttrap_getreg(regs, tp->ftt_index) <<
1883 tp->ftt_scale;
1884
1885 if (tp->ftt_code == 1) {
1886 /*
1887 * If there's a segment prefix for this
1888 * instruction, we'll need to check permissions
1889 * and bounds on the given selector, and adjust
1890 * the address accordingly.
1891 */
1892 if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1893 fasttrap_do_seg(tp, regs, &addr) != 0) {
1894 fasttrap_sigsegv(p, uthread, addr);
1895 new_pc = pc;
1896 break;
1897 }
1898
1899 if (fasttrap_fuword64(addr, &value) == -1) {
1900 fasttrap_sigsegv(p, uthread, addr);
1901 new_pc = pc;
1902 break;
1903 }
1904 new_pc = value;
1905 } else {
1906 new_pc = addr;
1907 }
1908 }
1909
1910 /*
1911 * If this is a call instruction, we need to push the return
1912 * address onto the stack. If this fails, we send the process
1913 * a SIGSEGV and reset the pc to emulate what would happen if
1914 * this instruction weren't traced.
1915 */
1916 if (tp->ftt_type == FASTTRAP_T_CALL) {
1917 user_addr_t addr = regs64->isf.rsp - sizeof (uint64_t);
1918 int ret = fasttrap_suword64(addr, pc + tp->ftt_size);
1919
1920 if (ret == -1) {
1921 fasttrap_sigsegv(p, uthread, addr);
1922 new_pc = pc;
1923 break;
1924 }
1925
1926 regs64->isf.rsp = addr;
1927 }
1928 break;
1929
1930 case FASTTRAP_T_COMMON:
1931 {
1932 user_addr_t addr, write_addr;
1933 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22];
1934 uint_t i = 0;
1935
1936 /*
1937 * Generic Instruction Tracing
1938 * ---------------------------
1939 *
1940 * This is the layout of the scratch space in the user-land
1941 * thread structure for our generated instructions.
1942 *
1943 * 32-bit mode bytes
1944 * ------------------------ -----
1945 * a: <original instruction> <= 15
1946 * jmp <pc + tp->ftt_size> 5
1947 * b: <original instrction> <= 15
1948 * int T_DTRACE_RET 2
1949 * -----
1950 * <= 37
1951 *
1952 * 64-bit mode bytes
1953 * ------------------------ -----
1954 * a: <original instruction> <= 15
1955 * jmp 0(%rip) 6
1956 * <pc + tp->ftt_size> 8
1957 * b: <original instruction> <= 15
1958 * int T_DTRACE_RET 2
1959 * -----
1960 * <= 46
1961 *
1962 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1963 * to b. If we encounter a signal on the way out of the
1964 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1965 * so that we execute the original instruction and re-enter
1966 * the kernel rather than redirecting to the next instruction.
1967 *
1968 * If there are return probes (so we know that we're going to
1969 * need to reenter the kernel after executing the original
1970 * instruction), the scratch space will just contain the
1971 * original instruction followed by an interrupt -- the same
1972 * data as at b.
1973 *
1974 * %rip-relative Addressing
1975 * ------------------------
1976 *
1977 * There's a further complication in 64-bit mode due to %rip-
1978 * relative addressing. While this is clearly a beneficial
1979 * architectural decision for position independent code, it's
1980 * hard not to see it as a personal attack against the pid
1981 * provider since before there was a relatively small set of
1982 * instructions to emulate; with %rip-relative addressing,
1983 * almost every instruction can potentially depend on the
1984 * address at which it's executed. Rather than emulating
1985 * the broad spectrum of instructions that can now be
1986 * position dependent, we emulate jumps and others as in
1987 * 32-bit mode, and take a different tack for instructions
1988 * using %rip-relative addressing.
1989 *
1990 * For every instruction that uses the ModRM byte, the
1991 * in-kernel disassembler reports its location. We use the
1992 * ModRM byte to identify that an instruction uses
1993 * %rip-relative addressing and to see what other registers
1994 * the instruction uses. To emulate those instructions,
1995 * we modify the instruction to be %rax-relative rather than
1996 * %rip-relative (or %rcx-relative if the instruction uses
1997 * %rax; or %r8- or %r9-relative if the REX.B is present so
1998 * we don't have to rewrite the REX prefix). We then load
1999 * the value that %rip would have been into the scratch
2000 * register and generate an instruction to reset the scratch
2001 * register back to its original value. The instruction
2002 * sequence looks like this:
2003 *
2004 * 64-mode %rip-relative bytes
2005 * ------------------------ -----
2006 * a: <modified instruction> <= 15
2007 * movq $<value>, %<scratch> 6
2008 * jmp 0(%rip) 6
2009 * <pc + tp->ftt_size> 8
2010 * b: <modified instruction> <= 15
2011 * int T_DTRACE_RET 2
2012 * -----
2013 * 52
2014 *
2015 * We set curthread->t_dtrace_regv so that upon receiving
2016 * a signal we can reset the value of the scratch register.
2017 */
2018
2019 addr = uthread->t_dtrace_scratch->addr;
2020 write_addr = uthread->t_dtrace_scratch->write_addr;
2021
2022 if (addr == 0LL || write_addr == 0LL) {
2023 fasttrap_sigtrap(p, uthread, pc); // Should be killing target proc
2024 new_pc = pc;
2025 break;
2026 }
2027
2028 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
2029
2030 uthread->t_dtrace_scrpc = addr;
2031 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
2032 i += tp->ftt_size;
2033
2034 if (tp->ftt_ripmode != 0) {
2035 uint64_t* reg;
2036
2037 ASSERT(tp->ftt_ripmode &
2038 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2));
2039
2040 /*
2041 * If this was a %rip-relative instruction, we change
2042 * it to be either a %rax- or %rcx-relative
2043 * instruction (depending on whether those registers
2044 * are used as another operand; or %r8- or %r9-
2045 * relative depending on the value of REX.B). We then
2046 * set that register and generate a movq instruction
2047 * to reset the value.
2048 */
2049 if (tp->ftt_ripmode & FASTTRAP_RIP_X)
2050 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1);
2051 else
2052 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0);
2053
2054 if (tp->ftt_ripmode & FASTTRAP_RIP_1)
2055 scratch[i++] = FASTTRAP_MOV_EAX;
2056 else
2057 scratch[i++] = FASTTRAP_MOV_ECX;
2058
2059 switch (tp->ftt_ripmode) {
2060 case FASTTRAP_RIP_1:
2061 reg = &regs64->rax;
2062 uthread->t_dtrace_reg = REG_RAX;
2063 break;
2064 case FASTTRAP_RIP_2:
2065 reg = &regs64->rcx;
2066 uthread->t_dtrace_reg = REG_RCX;
2067 break;
2068 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X:
2069 reg = &regs64->r8;
2070 uthread->t_dtrace_reg = REG_R8;
2071 break;
2072 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X:
2073 reg = &regs64->r9;
2074 uthread->t_dtrace_reg = REG_R9;
2075 break;
2076 default:
2077 reg = NULL;
2078 panic("unhandled ripmode in fasttrap_pid_probe64");
2079 }
2080
2081 /* LINTED - alignment */
2082 *(uint64_t *)&scratch[i] = *reg;
2083 uthread->t_dtrace_regv = *reg;
2084 *reg = pc + tp->ftt_size;
2085 i += sizeof (uint64_t);
2086 }
2087
2088 /*
2089 * Generate the branch instruction to what would have
2090 * normally been the subsequent instruction. In 32-bit mode,
2091 * this is just a relative branch; in 64-bit mode this is a
2092 * %rip-relative branch that loads the 64-bit pc value
2093 * immediately after the jmp instruction.
2094 */
2095 scratch[i++] = FASTTRAP_GROUP5_OP;
2096 scratch[i++] = FASTTRAP_MODRM(0, 4, 5);
2097 /* LINTED - alignment */
2098 *(uint32_t *)&scratch[i] = 0;
2099 i += sizeof (uint32_t);
2100 /* LINTED - alignment */
2101 *(uint64_t *)&scratch[i] = pc + tp->ftt_size;
2102 i += sizeof (uint64_t);
2103
2104 uthread->t_dtrace_astpc = addr + i;
2105 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
2106 i += tp->ftt_size;
2107 scratch[i++] = FASTTRAP_INT;
2108 scratch[i++] = T_DTRACE_RET;
2109
2110 ASSERT(i <= sizeof (scratch));
2111
2112 if (fasttrap_copyout(scratch, write_addr, i)) {
2113 fasttrap_sigtrap(p, uthread, pc);
2114 new_pc = pc;
2115 break;
2116 }
2117
2118 if (tp->ftt_retids != NULL) {
2119 uthread->t_dtrace_step = 1;
2120 uthread->t_dtrace_ret = 1;
2121 new_pc = uthread->t_dtrace_astpc;
2122 } else {
2123 new_pc = uthread->t_dtrace_scrpc;
2124 }
2125
2126 uthread->t_dtrace_pc = pc;
2127 uthread->t_dtrace_npc = pc + tp->ftt_size;
2128 uthread->t_dtrace_on = 1;
2129 break;
2130 }
2131
2132 default:
2133 panic("fasttrap: mishandled an instruction");
2134 }
2135
2136 done:
2137 /*
2138 * APPLE NOTE:
2139 *
2140 * We're setting this earlier than Solaris does, to get a "correct"
2141 * ustack() output. In the Sun code, a() -> b() -> c() -> d() is
2142 * reported at: d, b, a. The new way gives c, b, a, which is closer
2143 * to correct, as the return instruction has already exectued.
2144 */
2145 regs64->isf.rip = new_pc;
2146
2147
2148 /*
2149 * If there were no return probes when we first found the tracepoint,
2150 * we should feel no obligation to honor any return probes that were
2151 * subsequently enabled -- they'll just have to wait until the next
2152 * time around.
2153 */
2154 if (tp->ftt_retids != NULL) {
2155 /*
2156 * We need to wait until the results of the instruction are
2157 * apparent before invoking any return probes. If this
2158 * instruction was emulated we can just call
2159 * fasttrap_return_common(); if it needs to be executed, we
2160 * need to wait until the user thread returns to the kernel.
2161 */
2162 if (tp->ftt_type != FASTTRAP_T_COMMON) {
2163 fasttrap_return_common(regs, pc, pid, new_pc);
2164 } else {
2165 ASSERT(uthread->t_dtrace_ret != 0);
2166 ASSERT(uthread->t_dtrace_pc == pc);
2167 ASSERT(uthread->t_dtrace_scrpc != 0);
2168 ASSERT(new_pc == uthread->t_dtrace_astpc);
2169 }
2170 }
2171
2172 return (0);
2173 }
2174
2175 int
2176 fasttrap_pid_probe(x86_saved_state_t *regs)
2177 {
2178 if (is_saved_state64(regs))
2179 return fasttrap_pid_probe64(regs);
2180
2181 return fasttrap_pid_probe32(regs);
2182 }
2183
2184 int
2185 fasttrap_return_probe(x86_saved_state_t *regs)
2186 {
2187 x86_saved_state64_t *regs64;
2188 x86_saved_state32_t *regs32;
2189 unsigned int p_model;
2190
2191 if (is_saved_state64(regs)) {
2192 regs64 = saved_state64(regs);
2193 regs32 = NULL;
2194 p_model = DATAMODEL_LP64;
2195 } else {
2196 regs64 = NULL;
2197 regs32 = saved_state32(regs);
2198 p_model = DATAMODEL_ILP32;
2199 }
2200
2201 proc_t *p = current_proc();
2202 uthread_t uthread = (uthread_t)get_bsdthread_info(current_thread());
2203 user_addr_t pc = uthread->t_dtrace_pc;
2204 user_addr_t npc = uthread->t_dtrace_npc;
2205
2206 uthread->t_dtrace_pc = 0;
2207 uthread->t_dtrace_npc = 0;
2208 uthread->t_dtrace_scrpc = 0;
2209 uthread->t_dtrace_astpc = 0;
2210
2211 /*
2212 * Treat a child created by a call to vfork(2) as if it were its
2213 * parent. We know that there's only one thread of control in such a
2214 * process: this one.
2215 */
2216 proc_list_lock();
2217 while (p->p_lflag & P_LINVFORK)
2218 p = p->p_pptr;
2219 proc_list_unlock();
2220
2221 /*
2222 * We set rp->r_pc to the address of the traced instruction so
2223 * that it appears to dtrace_probe() that we're on the original
2224 * instruction, and so that the user can't easily detect our
2225 * complex web of lies. dtrace_return_probe() (our caller)
2226 * will correctly set %pc after we return.
2227 */
2228 if (p_model == DATAMODEL_LP64)
2229 regs64->isf.rip = pc;
2230 else
2231 regs32->eip = pc;
2232
2233 fasttrap_return_common(regs, pc, p->p_pid, npc);
2234
2235 return (0);
2236 }
2237
2238 uint64_t
2239 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
2240 int aframes)
2241 {
2242 pal_register_cache_state(current_thread(), VALID);
2243 #pragma unused(arg, id, parg, aframes)
2244 return (fasttrap_anarg((x86_saved_state_t *)find_user_regs(current_thread()), 1, argno));
2245 }
2246
2247 uint64_t
2248 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
2249 int aframes)
2250 {
2251 pal_register_cache_state(current_thread(), VALID);
2252 #pragma unused(arg, id, parg, aframes)
2253 return (fasttrap_anarg((x86_saved_state_t *)find_user_regs(current_thread()), 0, argno));
2254 }
2255
2256 /*
2257 * APPLE NOTE: See comments by regmap array definition. We are cheating
2258 * when returning 32 bit registers.
2259 */
2260 static user_addr_t
2261 fasttrap_getreg(x86_saved_state_t *regs, uint_t reg)
2262 {
2263 if (is_saved_state64(regs)) {
2264 x86_saved_state64_t *regs64 = saved_state64(regs);
2265
2266 switch (reg) {
2267 case REG_RAX: return regs64->rax;
2268 case REG_RCX: return regs64->rcx;
2269 case REG_RDX: return regs64->rdx;
2270 case REG_RBX: return regs64->rbx;
2271 case REG_RSP: return regs64->isf.rsp;
2272 case REG_RBP: return regs64->rbp;
2273 case REG_RSI: return regs64->rsi;
2274 case REG_RDI: return regs64->rdi;
2275 case REG_R8: return regs64->r8;
2276 case REG_R9: return regs64->r9;
2277 case REG_R10: return regs64->r10;
2278 case REG_R11: return regs64->r11;
2279 case REG_R12: return regs64->r12;
2280 case REG_R13: return regs64->r13;
2281 case REG_R14: return regs64->r14;
2282 case REG_R15: return regs64->r15;
2283 case REG_TRAPNO: return regs64->isf.trapno;
2284 case REG_ERR: return regs64->isf.err;
2285 case REG_RIP: return regs64->isf.rip;
2286 case REG_CS: return regs64->isf.cs;
2287 case REG_RFL: return regs64->isf.rflags;
2288 case REG_SS: return regs64->isf.ss;
2289 case REG_FS: return regs64->fs;
2290 case REG_GS: return regs64->gs;
2291 case REG_ES:
2292 case REG_DS:
2293 case REG_FSBASE:
2294 case REG_GSBASE:
2295 // Important to distinguish these requests (which should be legal) from other values.
2296 panic("dtrace: unimplemented x86_64 getreg()");
2297 }
2298
2299 panic("dtrace: unhandled x86_64 getreg() constant");
2300 } else {
2301 x86_saved_state32_t *regs32 = saved_state32(regs);
2302
2303 switch (reg) {
2304 case REG_RAX: return regs32->eax;
2305 case REG_RCX: return regs32->ecx;
2306 case REG_RDX: return regs32->edx;
2307 case REG_RBX: return regs32->ebx;
2308 case REG_RSP: return regs32->uesp;
2309 case REG_RBP: return regs32->ebp;
2310 case REG_RSI: return regs32->esi;
2311 case REG_RDI: return regs32->edi;
2312 }
2313
2314 panic("dtrace: unhandled i386 getreg() constant");
2315 }
2316
2317 return 0;
2318 }
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