osfmk/ppc/POWERMAC/dbdma.c

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  * @OSF_COPYRIGHT@
  24  *
  25  */
  26
  27 #include <platforms.h>
  28
  29 #include <ppc/proc_reg.h> /* For isync */
  30 #include <mach_debug.h>
  31 #include <kern/assert.h>
  32 #include <kern/cpu_number.h>
  33 #include <kern/spl.h>
  34 #include <mach/mach_types.h>
  35 #include <types.h>
  36 #include <pexpert/ppc/powermac.h>
  37 #include <ppc/io_map_entries.h>
  38 #include <pexpert/ppc/dbdma.h>
  39
  40
  41 static int      dbdma_alloc_index = 0;
  42 dbdma_command_t *dbdma_alloc_commands = NULL;
  43
  44 void
  45 dbdma_start(dbdma_regmap_t *dmap, dbdma_command_t *commands)
  46 {
  47         unsigned long addr = kvtophys((vm_offset_t) commands);
  48
  49         if (addr & 0xf)
  50                 panic("dbdma_start command structure not 16-byte aligned");
  51
  52         dmap->d_intselect = 0xff;       /* Endian magic - clear out interrupts */
  53         DBDMA_ST4_ENDIAN(&dmap->d_control,
  54                          DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE |
  55                                              DBDMA_CNTRL_DEAD   |
  56                                              DBDMA_CNTRL_WAKE   |
  57                                              DBDMA_CNTRL_FLUSH  |
  58                                              DBDMA_CNTRL_PAUSE  |
  59                                              DBDMA_CNTRL_RUN      )));
  60         eieio();
  61
  62         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE)
  63                 eieio();
  64
  65         dmap->d_cmdptrhi = 0;   eieio();/* 64-bit not yet */
  66         DBDMA_ST4_ENDIAN(&dmap->d_cmdptrlo, addr); eieio();
  67
  68         DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN));
  69         eieio();
  70
  71 }
  72
  73 void
  74 dbdma_stop(dbdma_regmap_t *dmap)
  75 {
  76         DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_RUN) |
  77                           DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH)); eieio();
  78
  79         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & (DBDMA_CNTRL_ACTIVE|DBDMA_CNTRL_FLUSH))
  80                 eieio();
  81 }
  82
  83 void
  84 dbdma_flush(dbdma_regmap_t *dmap)
  85 {
  86         DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH));
  87         eieio();
  88
  89         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & (DBDMA_CNTRL_FLUSH))
  90                 eieio();
  91 }
  92
  93 void
  94 dbdma_reset(dbdma_regmap_t *dmap)
  95 {
  96         DBDMA_ST4_ENDIAN(&dmap->d_control,
  97                          DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE |
  98                                              DBDMA_CNTRL_DEAD   |
  99                                              DBDMA_CNTRL_WAKE   |
 100                                              DBDMA_CNTRL_FLUSH  |
 101                                              DBDMA_CNTRL_PAUSE  |
 102                                              DBDMA_CNTRL_RUN      )));
 103         eieio();
 104
 105         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_RUN)
 106                 eieio();
 107 }
 108
 109 void
 110 dbdma_continue(dbdma_regmap_t *dmap)
 111 {
 112         DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN|DBDMA_CNTRL_WAKE) | DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_PAUSE|DBDMA_CNTRL_DEAD));
 113         eieio();
 114 }
 115
 116 void
 117 dbdma_pause(dbdma_regmap_t *dmap)
 118 {
 119         DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_PAUSE));
 120         eieio();
 121
 122         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE)
 123                 eieio();
 124 }
 125
 126 dbdma_command_t *
 127 dbdma_alloc(int count)
 128 {
 129         dbdma_command_t *dbdmap;
 130
 131         /*
 132          * For now, we assume that dbdma_alloc() is called only when
 133          * the system is bootstrapping, i.e. before the other CPUs
 134          * are activated...
 135          * If that's not the case, we need to protect the global
 136          * variables here.
 137          */
 138         assert(cpu_number() == master_cpu);
 139
 140         if (dbdma_alloc_index == 0)
 141                 dbdma_alloc_commands = (dbdma_command_t *) io_map(0, PAGE_SIZE);
 142         if ((dbdma_alloc_index+count) >= PAGE_SIZE / sizeof(dbdma_command_t))
 143                 panic("Too many dbdma command structures!");
 144
 145         dbdmap = &dbdma_alloc_commands[dbdma_alloc_index];
 146         dbdma_alloc_index += count;
 147         return  dbdmap;
 148 }