osfmk/i386/cpuid.h

   1 /*
   2  * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 /*
  29  * @OSF_COPYRIGHT@
  30  */
  31
  32 /*
  33  * x86 CPU identification
  34  *
  35  */
  36
  37 #ifndef _MACHINE_CPUID_H_
  38 #define _MACHINE_CPUID_H_
  39
  40 #include <sys/appleapiopts.h>
  41
  42 #ifdef __APPLE_API_PRIVATE
  43
  44 #define CPUID_VID_INTEL         "GenuineIntel"
  45 #define CPUID_VID_AMD           "AuthenticAMD"
  46
  47 #define CPUID_STRING_UNKNOWN    "Unknown CPU Typ"
  48
  49 #define _Bit(n)                 (1ULL << n)
  50 #define _HBit(n)                (1ULL << ((n)+32))
  51
  52 /*
  53  * The CPUID_FEATURE_XXX values define 64-bit values
  54  * returned in %ecx:%edx to a CPUID request with %eax of 1:
  55  */
  56 #define CPUID_FEATURE_FPU     _Bit(0)   /* Floating point unit on-chip */
  57 #define CPUID_FEATURE_VME     _Bit(1)   /* Virtual Mode Extension */
  58 #define CPUID_FEATURE_DE      _Bit(2)   /* Debugging Extension */
  59 #define CPUID_FEATURE_PSE     _Bit(3)   /* Page Size Extension */
  60 #define CPUID_FEATURE_TSC     _Bit(4)   /* Time Stamp Counter */
  61 #define CPUID_FEATURE_MSR     _Bit(5)   /* Model Specific Registers */
  62 #define CPUID_FEATURE_PAE     _Bit(6)   /* Physical Address Extension */
  63 #define CPUID_FEATURE_MCE     _Bit(7)   /* Machine Check Exception */
  64 #define CPUID_FEATURE_CX8     _Bit(8)   /* CMPXCHG8B */
  65 #define CPUID_FEATURE_APIC    _Bit(9)   /* On-chip APIC */
  66 #define CPUID_FEATURE_SEP     _Bit(11)  /* Fast System Call */
  67 #define CPUID_FEATURE_MTRR    _Bit(12)  /* Memory Type Range Register */
  68 #define CPUID_FEATURE_PGE     _Bit(13)  /* Page Global Enable */
  69 #define CPUID_FEATURE_MCA     _Bit(14)  /* Machine Check Architecture */
  70 #define CPUID_FEATURE_CMOV    _Bit(15)  /* Conditional Move Instruction */
  71 #define CPUID_FEATURE_PAT     _Bit(16)  /* Page Attribute Table */
  72 #define CPUID_FEATURE_PSE36   _Bit(17)  /* 36-bit Page Size Extension */
  73 #define CPUID_FEATURE_PSN     _Bit(18)  /* Processor Serial Number */
  74 #define CPUID_FEATURE_CLFSH   _Bit(19)  /* CLFLUSH Instruction supported */
  75 #define CPUID_FEATURE_DS      _Bit(21)  /* Debug Store */
  76 #define CPUID_FEATURE_ACPI    _Bit(22)  /* Thermal monitor and Clock Ctrl */
  77 #define CPUID_FEATURE_MMX     _Bit(23)  /* MMX supported */
  78 #define CPUID_FEATURE_FXSR    _Bit(24)  /* Fast floating pt save/restore */
  79 #define CPUID_FEATURE_SSE     _Bit(25)  /* Streaming SIMD extensions */
  80 #define CPUID_FEATURE_SSE2    _Bit(26)  /* Streaming SIMD extensions 2 */
  81 #define CPUID_FEATURE_SS      _Bit(27)  /* Self-Snoop */
  82 #define CPUID_FEATURE_HTT     _Bit(28)  /* Hyper-Threading Technology */
  83 #define CPUID_FEATURE_TM      _Bit(29)  /* Thermal Monitor (TM1) */
  84 #define CPUID_FEATURE_PBE     _Bit(31)  /* Pend Break Enable */
  85
  86 #define CPUID_FEATURE_SSE3    _HBit(0)  /* Streaming SIMD extensions 3 */
  87 #define CPUID_FEATURE_MONITOR _HBit(3)  /* Monitor/mwait */
  88 #define CPUID_FEATURE_DSCPL   _HBit(4)  /* Debug Store CPL */
  89 #define CPUID_FEATURE_VMX     _HBit(5)  /* VMX */
  90 #define CPUID_FEATURE_SMX     _HBit(6)  /* SMX */
  91 #define CPUID_FEATURE_EST     _HBit(7)  /* Enhanced SpeedsTep (GV3) */
  92 #define CPUID_FEATURE_TM2     _HBit(8)  /* Thermal Monitor 2 */
  93 #define CPUID_FEATURE_SSSE3   _HBit(9)  /* Supplemental SSE3 instructions */
  94 #define CPUID_FEATURE_CID     _HBit(10) /* L1 Context ID */
  95 #define CPUID_FEATURE_CX16    _HBit(13) /* CmpXchg16b instruction */
  96 #define CPUID_FEATURE_xTPR    _HBit(14) /* Send Task PRiority msgs */
  97 #define CPUID_FEATURE_PDCM    _HBit(15) /* Perf/Debug Capability MSR */
  98 #define CPUID_FEATURE_DCA     _HBit(18) /* Direct Cache Access */
  99 #define CPUID_FEATURE_SSE4_1  _HBit(19) /* Streaming SIMD extensions 4.1 */
 100 #define CPUID_FEATURE_SSE4_2  _HBit(20) /* Streaming SIMD extensions 4.2 */
 101 #define CPUID_FEATURE_xAPIC   _HBit(21) /* Extended APIC Mode */
 102 #define CPUID_FEATURE_POPCNT  _HBit(23) /* POPCNT instruction */
 103 #define CPUID_FEATURE_VMM     _HBit(31) /* VMM (Hypervisor) present */
 104
 105 /*
 106  * The CPUID_EXTFEATURE_XXX values define 64-bit values
 107  * returned in %ecx:%edx to a CPUID request with %eax of 0x80000001:
 108  */
 109 #define CPUID_EXTFEATURE_SYSCALL   _Bit(11)     /* SYSCALL/sysret */
 110 #define CPUID_EXTFEATURE_XD        _Bit(20)     /* eXecute Disable */
 111 #define CPUID_EXTFEATURE_RDTSCP    _Bit(27)     /* RDTSCP */
 112 #define CPUID_EXTFEATURE_EM64T     _Bit(29)     /* Extended Mem 64 Technology */
 113
 114 #define CPUID_EXTFEATURE_LAHF      _HBit(20)    /* LAFH/SAHF instructions */
 115
 116 /*
 117  * The CPUID_EXTFEATURE_XXX values define 64-bit values
 118  * returned in %ecx:%edx to a CPUID request with %eax of 0x80000007:
 119  */
 120 #define CPUID_EXTFEATURE_TSCI      _Bit(8)      /* TSC Invariant */
 121
 122 #define CPUID_CACHE_SIZE        16      /* Number of descriptor values */
 123
 124 #define CPUID_MWAIT_EXTENSION   _Bit(0) /* enumeration of WMAIT extensions */
 125 #define CPUID_MWAIT_BREAK       _Bit(1) /* interrupts are break events     */
 126
 127 #define CPUID_MODEL_YONAH       14
 128 #define CPUID_MODEL_MEROM       15
 129 #define CPUID_MODEL_PENRYN      23
 130 #define CPUID_MODEL_NEHALEM     26
 131
 132 #ifndef ASSEMBLER
 133 #include <stdint.h>
 134 #include <mach/mach_types.h>
 135 #include <kern/kern_types.h>
 136 #include <mach/machine.h>
 137
 138
 139 typedef enum { eax, ebx, ecx, edx } cpuid_register_t;
 140 static inline void
 141 cpuid(uint32_t *data)
 142 {
 143         asm("cpuid"
 144                 : "=a" (data[eax]),
 145                   "=b" (data[ebx]),
 146                   "=c" (data[ecx]),
 147                   "=d" (data[edx])
 148                 : "a"  (data[eax]),
 149                   "b"  (data[ebx]),
 150                   "c"  (data[ecx]),
 151                   "d"  (data[edx]));
 152 }
 153 static inline void
 154 do_cpuid(uint32_t selector, uint32_t *data)
 155 {
 156         asm("cpuid"
 157                 : "=a" (data[0]),
 158                   "=b" (data[1]),
 159                   "=c" (data[2]),
 160                   "=d" (data[3])
 161                 : "a"(selector));
 162 }
 163
 164 /*
 165  * Cache ID descriptor structure, used to parse CPUID leaf 2.
 166  * Note: not used in kernel.
 167  */
 168 typedef enum { Lnone, L1I, L1D, L2U, L3U, LCACHE_MAX } cache_type_t ;
 169 typedef struct {
 170         unsigned char   value;          /* Descriptor value */
 171         cache_type_t    type;           /* Cache type */
 172         unsigned int    size;           /* Cache size */
 173         unsigned int    linesize;       /* Cache line size */
 174 #ifdef KERNEL
 175         const char      *description;   /* Cache description */
 176 #endif /* KERNEL */
 177 } cpuid_cache_desc_t;
 178
 179 #ifdef KERNEL
 180 #define CACHE_DESC(value,type,size,linesize,text) \
 181         { value, type, size, linesize, text }
 182 #else
 183 #define CACHE_DESC(value,type,size,linesize,text) \
 184         { value, type, size, linesize }
 185 #endif /* KERNEL */
 186
 187 /* Physical CPU info - this is exported out of the kernel (kexts), so be wary of changes */
 188 typedef struct {
 189         char            cpuid_vendor[16];
 190         char            cpuid_brand_string[48];
 191         const char      *cpuid_model_string;
 192
 193         cpu_type_t      cpuid_type;                                     /* this is *not* a cpu_type_t in our <mach/machine.h> */
 194         uint8_t         cpuid_family;
 195         uint8_t         cpuid_model;
 196         uint8_t         cpuid_extmodel;
 197         uint8_t         cpuid_extfamily;
 198         uint8_t         cpuid_stepping;
 199         uint64_t        cpuid_features;
 200         uint64_t        cpuid_extfeatures;
 201         uint32_t        cpuid_signature;
 202         uint8_t         cpuid_brand;
 203
 204         uint32_t        cache_size[LCACHE_MAX];
 205         uint32_t        cache_linesize;
 206
 207         uint8_t         cache_info[64];    /* list of cache descriptors */
 208
 209         uint32_t        cpuid_cores_per_package;
 210         uint32_t        cpuid_logical_per_package;
 211         uint32_t        cache_sharing[LCACHE_MAX];
 212         uint32_t        cache_partitions[LCACHE_MAX];
 213
 214         cpu_type_t      cpuid_cpu_type;                 /* <mach/machine.h> */
 215         cpu_subtype_t   cpuid_cpu_subtype;              /* <mach/machine.h> */
 216
 217         /* Monitor/mwait Leaf: */
 218         uint32_t        cpuid_mwait_linesize_min;
 219         uint32_t        cpuid_mwait_linesize_max;
 220         uint32_t        cpuid_mwait_extensions;
 221         uint32_t        cpuid_mwait_sub_Cstates;
 222
 223         /* Thermal and Power Management Leaf: */
 224         boolean_t       cpuid_thermal_sensor;
 225         boolean_t       cpuid_thermal_dynamic_acceleration;
 226         uint32_t        cpuid_thermal_thresholds;
 227         boolean_t       cpuid_thermal_ACNT_MCNT;
 228
 229         /* Architectural Performance Monitoring Leaf: */
 230         uint8_t         cpuid_arch_perf_version;
 231         uint8_t         cpuid_arch_perf_number;
 232         uint8_t         cpuid_arch_perf_width;
 233         uint8_t         cpuid_arch_perf_events_number;
 234         uint32_t        cpuid_arch_perf_events;
 235         uint8_t         cpuid_arch_perf_fixed_number;
 236         uint8_t         cpuid_arch_perf_fixed_width;
 237
 238         /* Cache details: */
 239         uint32_t        cpuid_cache_linesize;
 240         uint32_t        cpuid_cache_L2_associativity;
 241         uint32_t        cpuid_cache_size;
 242
 243         /* Virtual and physical address aize: */
 244         uint32_t        cpuid_address_bits_physical;
 245         uint32_t        cpuid_address_bits_virtual;
 246
 247         uint32_t        cpuid_microcode_version;
 248
 249         /* Numbers of tlbs per processor [i|d, small|large, level0|level1] */
 250         uint32_t        cpuid_tlb[2][2][2];
 251                         #define TLB_INST        0
 252                         #define TLB_DATA        1
 253                         #define TLB_SMALL       0
 254                         #define TLB_LARGE       1
 255         uint32_t        cpuid_stlb;
 256
 257         uint32_t        core_count;
 258         uint32_t        thread_count;
 259
 260         /* Max leaf ids available from CPUID */
 261         uint32_t        cpuid_max_basic;
 262         uint32_t        cpuid_max_ext;
 263 } i386_cpu_info_t;
 264
 265 #ifdef __cplusplus
 266 extern "C" {
 267 #endif
 268
 269 /*
 270  * External declarations
 271  */
 272 extern cpu_type_t       cpuid_cputype(void);
 273 extern cpu_subtype_t    cpuid_cpusubtype(void);
 274 extern void             cpuid_cpu_display(const char *);
 275 extern void             cpuid_feature_display(const char *);
 276 extern void             cpuid_extfeature_display(const char *);
 277 extern char *           cpuid_get_feature_names(uint64_t, char *, unsigned);
 278 extern char *           cpuid_get_extfeature_names(uint64_t, char *, unsigned);
 279
 280 extern uint64_t         cpuid_features(void);
 281 extern uint64_t         cpuid_extfeatures(void);
 282 extern uint32_t         cpuid_family(void);
 283
 284 extern void             cpuid_get_info(i386_cpu_info_t *info_p);
 285 extern i386_cpu_info_t  *cpuid_info(void);
 286
 287 extern void             cpuid_set_info(void);
 288
 289 #ifdef __cplusplus
 290 }
 291 #endif
 292
 293 #endif /* ASSEMBLER */
 294
 295 #endif /* __APPLE_API_PRIVATE */
 296 #endif /* _MACHINE_CPUID_H_ */