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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25 #ifndef _PPC_ASM_H_
26 #define _PPC_ASM_H_
27
28 #define __ASMNL__ @
29 #define STRINGD .ascii
30
31 #ifdef ASSEMBLER
32
33
34 #define br0 0
35
36 #define ARG0 r3
37 #define ARG1 r4
38 #define ARG2 r5
39 #define ARG3 r6
40 #define ARG4 r7
41 #define ARG5 r8
42 #define ARG6 r9
43 #define ARG7 r10
44
45 #define tmp0 r0 /* Temporary GPR remapping (603e specific) */
46 #define tmp1 r1
47 #define tmp2 r2
48 #define tmp3 r3
49
50 /* SPR registers */
51
52 #define mq 0 /* MQ register for 601 emulation */
53 #define rtcu 4 /* RTCU - upper word of RTC for 601 emulation */
54 #define rtcl 5 /* RTCL - lower word of RTC for 601 emulation */
55 #define dsisr 18
56 #define ppcDAR 19
57 #define ppcdar 19
58 #define dar 19
59 #define SDR1 25
60 #define sdr1 25
61 #define srr0 26
62 #define srr1 27
63 #define vrsave 256 /* Vector Register save */
64 #define sprg0 272
65 #define sprg1 273
66 #define sprg2 274
67 #define sprg3 275
68 #define pvr 287
69
70 #define IBAT0U 528
71 #define IBAT0L 529
72 #define IBAT1U 530
73 #define IBAT1L 531
74 #define IBAT2U 532
75 #define IBAT2L 533
76 #define IBAT3U 534
77 #define IBAT3L 535
78 #define ibat0u 528
79 #define ibat0l 529
80 #define ibat1u 530
81 #define ibat1l 531
82 #define ibat2u 532
83 #define ibat2l 533
84 #define ibat3u 534
85 #define ibat3l 535
86
87 #define DBAT0U 536
88 #define DBAT0L 537
89 #define DBAT1U 538
90 #define DBAT1L 539
91 #define DBAT2U 540
92 #define DBAT2L 541
93 #define DBAT3U 542
94 #define DBAT3L 543
95 #define dbat0u 536
96 #define dbat0l 537
97 #define dbat1u 538
98 #define dbat1l 539
99 #define dbat2u 540
100 #define dbat2l 541
101 #define dbat3u 542
102 #define dbat3l 543
103
104 #define ummcr2 928 /* Performance monitor control */
105 #define ubamr 935 /* Performance monitor mask */
106 #define ummcr0 936 /* Performance monitor control */
107 #define upmc1 937 /* Performance monitor counter */
108 #define upmc2 938 /* Performance monitor counter */
109 #define usia 939 /* User sampled instruction address */
110 #define ummcr1 940 /* Performance monitor control */
111 #define upmc3 941 /* Performance monitor counter */
112 #define upmc4 942 /* Performance monitor counter */
113 #define usda 943 /* User sampled data address */
114 #define mmcr2 944 /* Performance monitor control */
115 #define bamr 951 /* Performance monitor mask */
116 #define mmcr0 952
117 #define pmc1 953
118 #define pmc2 954
119 #define sia 955
120 #define mmcr1 956
121 #define pmc3 957
122 #define pmc4 958
123 #define sda 959 /* Sampled data address */
124 #define dmiss 976 /* ea that missed */
125 #define dcmp 977 /* compare value for the va that missed */
126 #define hash1 978 /* pointer to first hash pteg */
127 #define hash2 979 /* pointer to second hash pteg */
128 #define imiss 980 /* ea that missed */
129 #define tlbmiss 980 /* ea that missed */
130 #define icmp 981 /* compare value for the va that missed */
131 #define ptehi 981 /* compare value for the va that missed */
132 #define rpa 982 /* required physical address register */
133 #define ptelo 982 /* required physical address register */
134 #define l3pdet 984 /* l3pdet */
135
136 #define HID0 1008 /* Checkstop and misc enables */
137 #define hid0 1008 /* Checkstop and misc enables */
138 #define HID1 1009 /* Clock configuration */
139 #define hid1 1009 /* Clock configuration */
140 #define HID2 1016 /* Other processor controls */
141 #define hid2 1016 /* Other processor controls */
142 #define iabr 1010 /* Instruction address breakpoint register */
143 #define ictrl 1011 /* Instruction Cache Control */
144 #define ldstdb 1012 /* Load/Store Debug */
145 #define dabr 1013 /* Data address breakpoint register */
146 #define msscr0 1014 /* Memory subsystem control */
147 #define msscr1 1015 /* Memory subsystem debug */
148 #define msssr0 1015 /* Memory Subsystem Status */
149 #define ldstcr 1016 /* Load/Store Status/Control */
150 #define l2cr2 1016 /* L2 Cache control 2 */
151 #define l2cr 1017 /* L2 Cache control */
152 #define l3cr 1018 /* L3 Cache control */
153 #define ictc 1019 /* I-cache throttling control */
154 #define thrm1 1020 /* Thermal management 1 */
155 #define thrm2 1021 /* Thermal management 2 */
156 #define thrm3 1022 /* Thermal management 3 */
157 #define pir 1023 /* Processor ID Register */
158
159 ; hid0 bits
160 #define emcp 0
161 #define emcpm 0x80000000
162 #define dbp 1
163 #define dbpm 0x40000000
164 #define eba 2
165 #define ebam 0x20000000
166 #define ebd 3
167 #define ebdm 0x10000000
168 #define sbclk 4
169 #define sbclkm 0x08000000
170 #define eclk 6
171 #define eclkm 0x02000000
172 #define par 7
173 #define parm 0x01000000
174 #define sten 7
175 #define stenm 0x01000000
176 #define doze 8
177 #define dozem 0x00800000
178 #define nap 9
179 #define napm 0x00400000
180 #define sleep 10
181 #define sleepm 0x00200000
182 #define dpm 11
183 #define dpmm 0x00100000
184 #define riseg 12
185 #define risegm 0x00080000
186 #define eiec 13
187 #define eiecm 0x00040000
188 #define mum 14
189 #define mumm 0x00020000
190 #define nhr 15
191 #define nhrm 0x00010000
192 #define ice 16
193 #define icem 0x00008000
194 #define dce 17
195 #define dcem 0x00004000
196 #define ilock 18
197 #define ilockm 0x00002000
198 #define dlock 19
199 #define dlockm 0x00001000
200 #define icfi 20
201 #define icfim 0x00000800
202 #define dcfi 21
203 #define dcfim 0x00000400
204 #define spd 22
205 #define spdm 0x00000200
206 #define sge 24
207 #define sgem 0x00000080
208 #define dcfa 25
209 #define dcfam 0x00000040
210 #define btic 26
211 #define bticm 0x00000020
212 #define lrstk 27
213 #define lrstkm 0x00000010
214 #define abe 28
215 #define abem 0x00000008
216 #define fold 28
217 #define foldm 0x00000008
218 #define bht 29
219 #define bhtm 0x00000004
220 #define nopdst 30
221 #define nopdstm 0x00000002
222 #define nopti 31
223 #define noptim 0x00000001
224
225 ; hid1 bits
226 #define hid1pcem 0xF8000000
227 #define hid1prem 0x06000000
228 #define hid1pi0 14
229 #define hid1pi0m 0x00020000
230 #define hid1ps 15
231 #define hid1psm 0x00010000
232 #define hid1pc0 0x0000F800
233 #define hid1pr0 0x00000600
234 #define hid1pc1 0x000000F8
235 #define hid1pc0 0x0000F800
236 #define hid1pr1 0x00000006
237
238
239 ; hid2 bits
240 #define hid2vmin 18
241 #define hid2vminm 0x00002000
242
243 ; msscr0 bits
244 #define shden 0
245 #define shdenm 0x80000000
246 #define shden3 1
247 #define shdenm3 0x40000000
248 #define l1intvs 2
249 #define l1intve 4
250 #define l1intvb 0x38000000
251 #define l2intvs 5
252 #define l2intve 7
253 #define l2intvb 0x07000000
254 #define dl1hwf 8
255 #define dl1hwfm 0x00800000
256 #define dbsiz 9
257 #define dbsizm 0x00400000
258 #define emode 10
259 #define emodem 0x00200000
260 #define abgd 11
261 #define abgdm 0x00100000
262 #define tfsts 24
263 #define tfste 25
264 #define tfstm 0x000000C0
265 #define l2pfes 30
266 #define l2pfee 31
267 #define l2pfem 0x00000003
268
269 ; msscr1 bits
270 #define cqd 15
271 #define cqdm 0x00010000
272 #define csqs 1
273 #define csqe 2
274 #define csqm 0x60000000
275
276 ; msssr1 bits - 7450
277 #define vgL2PARA 0
278 #define vgL3PARA 1
279 #define vgL2COQEL 2
280 #define vgL3COQEL 3
281 #define vgL2CTR 4
282 #define vgL3CTR 5
283 #define vgL2COQR 6
284 #define vgL3COQR 7
285 #define vgLMQ 8
286 #define vgSMC 9
287 #define vgSNP 10
288 #define vgBIU 11
289 #define vgSMCE 12
290 #define vgL2TAG 13
291 #define vgL2DAT 14
292 #define vgL3TAG 15
293 #define vgL3DAT 16
294 #define vgAPE 17
295 #define vgDPE 18
296 #define vgTEA 19
297
298 ; srr1 bits
299 #define icmck 1
300 #define icmckm 0x40000000
301 #define dcmck 2
302 #define dcmckm 0x20000000
303 #define l2mck 3
304 #define l2mckm 0x10000000
305 #define tlbmck 4
306 #define tlbmckm 0x08000000
307 #define brmck 5
308 #define brmckm 0x04000000
309 #define othmck 10
310 #define othmckm 0x00200000
311 #define l2dpmck 11
312 #define l2dpmckm 0x00100000
313 #define mcpmck 12
314 #define mcpmckm 0x00080000
315 #define teamck 13
316 #define teamckm 0x00040000
317 #define dpmck 14
318 #define dpmckm 0x00020000
319 #define apmck 15
320 #define apmckm 0x00010000
321
322 ; L2 cache control
323 #define l2e 0
324 #define l2em 0x80000000
325 #define l2pe 1
326 #define l2pem 0x40000000
327 #define l2siz 2
328 #define l2sizf 3
329 #define l2sizm 0x30000000
330 #define l2clk 4
331 #define l2clkf 6
332 #define l2clkm 0x0E000000
333 #define l2ram 7
334 #define l2ramf 8
335 #define l2ramm 0x01800000
336 #define l2do 9
337 #define l2dom 0x00400000
338 #define l2i 10
339 #define l2im 0x00200000
340 #define l2ctl 11
341 #define l2ctlm 0x00100000
342 #define l2ionly 11
343 #define l2ionlym 0x00100000
344 #define l2wt 12
345 #define l2wtm 0x00080000
346 #define l2ts 13
347 #define l2tsm 0x00040000
348 #define l2oh 14
349 #define l2ohf 15
350 #define l2ohm 0x00030000
351 #define l2donly 15
352 #define l2donlym 0x00010000
353 #define l2sl 16
354 #define l2slm 0x00008000
355 #define l2df 17
356 #define l2dfm 0x00004000
357 #define l2byp 18
358 #define l2bypm 0x00002000
359 #define l2fa 19
360 #define l2fam 0x00001000
361 #define l2hwf 20
362 #define l2hwfm 0x00000800
363 #define l2io 21
364 #define l2iom 0x00000400
365 #define l2clkstp 22
366 #define l2clkstpm 0x00000200
367 #define l2dro 23
368 #define l2drom 0x00000100
369 #define l2ctr 24
370 #define l2ctrf 30
371 #define l2ctrm 0x000000FE
372 #define l2ip 31
373 #define l2ipm 0x00000001
374
375 ; L3 cache control
376 #define l3e 0
377 #define l3em 0x80000000
378 #define l3pe 1
379 #define l3pem 0x40000000
380 #define l3siz 3
381 #define l3sizm 0x10000000
382 #define l3clken 4
383 #define l3clkenm 0x08000000
384 #define l3dx 5
385 #define l3dxm 0x04000000
386 #define l3clk 6
387 #define l3clkf 8
388 #define l3clkm 0x03800000
389 #define l3io 9
390 #define l3iom 0x00400000
391 #define l3spo 13
392 #define l3spom 0x00040000
393 #define l3cksp 14
394 #define l3ckspf 15
395 #define l3ckspm 0x00030000
396 #define l3psp 16
397 #define l3pspf 18
398 #define l3pspm 0x0000E000
399 #define l3rep 19
400 #define l3repm 0x00001000
401 #define l3hwf 20
402 #define l3hwfm 0x00000800
403 #define l3i 21
404 #define l3im 0x00000400
405 #define l3rt 22
406 #define l3rtf 23
407 #define l3rtm 0x00000300
408 #define l3dro 23
409 #define l3drom 0x00000100
410 #define l3cya 24
411 #define l3cyam 0x00000080
412 #define l3donly 25
413 #define l3donlym 0x00000040
414 #define l3dmem 29
415 #define l3dmemm 0x00000004
416 #define l3dmsiz 31
417 #define l3dmsizm 0x00000001
418
419 #define thrmtin 0
420 #define thrmtinm 0x80000000
421 #define thrmtiv 1
422 #define thrmtivm 0x40000000
423 #define thrmthrs 2
424 #define thrmthre 8
425 #define thrmthrm 0x3F800000
426 #define thrmtid 29
427 #define thrmtidm 0x00000004
428 #define thrmtie 30
429 #define thrmtiem 0x00000002
430 #define thrmv 31
431 #define thrmvm 0x00000001
432
433 #define thrmsitvs 15
434 #define thrmsitve 30
435 #define thrmsitvm 0x0001FFFE
436 #define thrme 31
437 #define thrmem 0x00000001
438
439 #define ictcfib 23
440 #define ictcfie 30
441 #define ictcfim 0x000001FE
442 #define ictce 31
443 #define ictcem 0x00000001
444
445 #define cr0_lt 0
446 #define cr0_gt 1
447 #define cr0_eq 2
448 #define cr0_so 3
449 #define cr0_un 3
450 #define cr1_lt 4
451 #define cr1_gt 5
452 #define cr1_eq 6
453 #define cr1_so 7
454 #define cr1_un 7
455 #define cr2_lt 8
456 #define cr2_gt 9
457 #define cr2_eq 10
458 #define cr2_so 11
459 #define cr2_un 11
460 #define cr3_lt 12
461 #define cr3_gt 13
462 #define cr3_eq 14
463 #define cr3_so 15
464 #define cr3_un 15
465 #define cr4_lt 16
466 #define cr4_gt 17
467 #define cr4_eq 18
468 #define cr4_so 19
469 #define cr4_un 19
470 #define cr5_lt 20
471 #define cr5_gt 21
472 #define cr5_eq 22
473 #define cr5_so 23
474 #define cr5_un 23
475 #define cr6_lt 24
476 #define cr6_gt 25
477 #define cr6_eq 26
478 #define cr6_so 27
479 #define cr6_un 27
480 #define cr7_lt 28
481 #define cr7_gt 29
482 #define cr7_eq 30
483 #define cr7_so 31
484 #define cr7_un 31
485
486 /*
487 * Macros to access high and low word values of an address
488 */
489
490 #define HIGH_CADDR(x) ha16(x)
491 #define HIGH_ADDR(x) hi16(x)
492 #define LOW_ADDR(x) lo16(x)
493
494 #endif /* ASSEMBLER */
495
496 /* Tags are placed before Immediately Following Code (IFC) for the debugger
497 * to be able to deduce where to find various registers when backtracing
498 *
499 * We only define the values as we use them, see SVR4 ABI PowerPc Supplement
500 * for more details (defined in ELF spec).
501 */
502
503 #define TAG_NO_FRAME_USED 0x00000000
504
505 /* (should use genassym to get these offsets) */
506
507 #define FM_BACKPTR 0
508 #define FM_CR_SAVE 4
509 #define FM_LR_SAVE 8 /* MacOSX is NOT following the ABI at the moment.. */
510 #define FM_SIZE 64 /* minimum frame contents, backptr and LR save. Make sure it is quadaligned */
511 #define FM_ARG0 56
512 #define FM_ALIGN(l) ((l+15)&-16)
513 #define PK_SYSCALL_BEGIN 0x7000
514
515
516 /* redzone is the area under the stack pointer which must be preserved
517 * when taking a trap, interrupt etc.
518 */
519 #define FM_REDZONE 224 /* is ((32-14+1)*4) */
520
521 #define COPYIN_ARG0_OFFSET FM_ARG0
522
523 #ifdef MACH_KERNEL
524 #include <mach_kdb.h>
525 #else /* MACH_KERNEL */
526 #define MACH_KDB 0
527 #endif /* MACH_KERNEL */
528
529 #define BREAKPOINT_TRAP tw 4,r4,r4
530
531 /* There is another definition of ALIGN for .c sources */
532 #ifndef __LANGUAGE_ASSEMBLY
533 #define ALIGN 4
534 #endif /* __LANGUAGE_ASSEMBLY */
535
536 #ifndef FALIGN
537 #define FALIGN 4 /* Align functions on words for now. Cachelines is better */
538 #endif
539
540 #define LB(x,n) n
541 #if __STDC__
542 #define LCL(x) L ## x
543 #define EXT(x) _ ## x
544 #define LEXT(x) _ ## x ## :
545 #define LBc(x,n) n ## :
546 #define LBb(x,n) n ## b
547 #define LBf(x,n) n ## f
548 #else /* __STDC__ */
549 #define LCL(x) L/**/x
550 #define EXT(x) _/**/x
551 #define LEXT(x) _/**/x/**/:
552 #define LBc(x,n) n/**/:
553 #define LBb(x,n) n/**/b
554 #define LBf(x,n) n/**/f
555 #endif /* __STDC__ */
556
557 #define String .asciz
558 #define Value .word
559 #define Times(a,b) (a*b)
560 #define Divide(a,b) (a/b)
561
562 #define data16 .byte 0x66
563 #define addr16 .byte 0x67
564
565 #if !GPROF
566 #define MCOUNT
567 #endif /* GPROF */
568
569 #define ELF_FUNC(x)
570 #define ELF_DATA(x)
571 #define ELF_SIZE(x,s)
572
573 #define Entry(x,tag) .text@.align FALIGN@ .globl EXT(x)@ LEXT(x)
574 #define ENTRY(x,tag) Entry(x,tag)@MCOUNT
575 #define ENTRY2(x,y,tag) .text@ .align FALIGN@ .globl EXT(x)@ .globl EXT(y)@ \
576 LEXT(x)@ LEXT(y) @\
577 MCOUNT
578 #if __STDC__
579 #define ASENTRY(x) .globl x @ .align FALIGN; x ## @ MCOUNT
580 #else
581 #define ASENTRY(x) .globl x @ .align FALIGN; x @ MCOUNT
582 #endif /* __STDC__ */
583 #define DATA(x) .globl EXT(x) @ .align ALIGN @ LEXT(x)
584
585
586 #define End(x) ELF_SIZE(x,.-x)
587 #define END(x) End(EXT(x))
588 #define ENDDATA(x) END(x)
589 #define Enddata(x) End(x)
590
591 /* These defines are here for .c files that wish to reference global symbols
592 * within __asm__ statements.
593 */
594 #define CC_SYM_PREFIX "_"
595
596 #endif /* _PPC_ASM_H_ */