osfmk/arm64/cswitch.s

   1 /*
   2  * Copyright (c) 2007 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 #include <machine/asm.h>
  29 #include <arm64/machine_machdep.h>
  30 #include <arm64/machine_routines_asm.h>
  31 #include <arm64/proc_reg.h>
  32 #include "assym.s"
  33
  34 /*
  35  * save_general_registers
  36  *
  37  * Saves variable registers to kernel PCB.
  38  *   arg0 - thread_kernel_state pointer
  39  *   arg1 - Scratch register
  40  */
  41
  42 .macro  save_general_registers
  43 /* AAPCS-64 Page 14
  44  *
  45  * A subroutine invocation must preserve the contents of the registers r19-r29
  46  * and SP. We also save IP0 and IP1, as machine_idle uses IP0 for saving the LR.
  47  */
  48         stp             x16, x17, [$0, SS64_KERNEL_X16]
  49         stp             x19, x20, [$0, SS64_KERNEL_X19]
  50         stp             x21, x22, [$0, SS64_KERNEL_X21]
  51         stp             x23, x24, [$0, SS64_KERNEL_X23]
  52         stp             x25, x26, [$0, SS64_KERNEL_X25]
  53         stp             x27, x28, [$0, SS64_KERNEL_X27]
  54         stp             fp, lr, [$0, SS64_KERNEL_FP]
  55         str             xzr, [$0, SS64_KERNEL_PC]
  56         MOV32   w$1, PSR64_KERNEL_POISON
  57         str             w$1, [$0, SS64_KERNEL_CPSR]
  58 #ifdef HAS_APPLE_PAC
  59         stp             x0, x1, [sp, #-16]!
  60         stp             x2, x3, [sp, #-16]!
  61         stp             x4, x5, [sp, #-16]!
  62
  63         /*
  64          * Arg0: The ARM context pointer
  65          * Arg1: PC value to sign
  66          * Arg2: CPSR value to sign
  67          * Arg3: LR to sign
  68          */
  69         mov             x0, $0
  70         mov             x1, #0
  71         mov             w2, w$1
  72         mov             x3, lr
  73         mov             x4, x16
  74         mov             x5, x17
  75         bl              EXT(ml_sign_kernel_thread_state)
  76
  77         ldp             x4, x5, [sp], #16
  78         ldp             x2, x3, [sp], #16
  79         ldp             x0, x1, [sp], #16
  80         ldp             fp, lr, [$0, SS64_KERNEL_FP]
  81 #endif /* defined(HAS_APPLE_PAC) */
  82         mov             x$1, sp
  83         str             x$1, [$0, SS64_KERNEL_SP]
  84
  85 /* AAPCS-64 Page 14
  86  *
  87  * Registers d8-d15 (s8-s15) must be preserved by a callee across subroutine
  88  * calls; the remaining registers (v0-v7, v16-v31) do not need to be preserved
  89  * (or should be preserved by the caller).
  90  */
  91         str             d8,     [$0, NS64_KERNEL_D8]
  92         str             d9,     [$0, NS64_KERNEL_D9]
  93         str             d10,[$0, NS64_KERNEL_D10]
  94         str             d11,[$0, NS64_KERNEL_D11]
  95         str             d12,[$0, NS64_KERNEL_D12]
  96         str             d13,[$0, NS64_KERNEL_D13]
  97         str             d14,[$0, NS64_KERNEL_D14]
  98         str             d15,[$0, NS64_KERNEL_D15]
  99
 100         mrs             x$1, FPCR
 101         str             w$1, [$0, NS64_KERNEL_FPCR]
 102 .endmacro
 103
 104 /*
 105  * load_general_registers
 106  *
 107  * Loads variable registers from kernel PCB.
 108  *   arg0 - thread_kernel_state pointer
 109  *   arg1 - Scratch register
 110  */
 111 .macro  load_general_registers
 112         mov             x20, x0
 113         mov             x21, x1
 114         mov             x22, x2
 115
 116         mov             x0, $0
 117         AUTH_KERNEL_THREAD_STATE_IN_X0  x23, x24, x25, x26, x27
 118
 119         mov             x0, x20
 120         mov             x1, x21
 121         mov             x2, x22
 122
 123         ldr             w$1, [$0, NS64_KERNEL_FPCR]
 124         mrs             x19, FPCR
 125         CMSR FPCR, x19, x$1, 1
 126 1:
 127
 128         // Skip x16, x17 - already loaded + authed by AUTH_THREAD_STATE_IN_X0
 129         ldp             x19, x20, [$0, SS64_KERNEL_X19]
 130         ldp             x21, x22, [$0, SS64_KERNEL_X21]
 131         ldp             x23, x24, [$0, SS64_KERNEL_X23]
 132         ldp             x25, x26, [$0, SS64_KERNEL_X25]
 133         ldp             x27, x28, [$0, SS64_KERNEL_X27]
 134         ldr             fp, [$0, SS64_KERNEL_FP]
 135         // Skip lr - already loaded + authed by AUTH_THREAD_STATE_IN_X0
 136         ldr             x$1, [$0, SS64_KERNEL_SP]
 137         mov             sp, x$1
 138
 139         ldr             d8,     [$0, NS64_KERNEL_D8]
 140         ldr             d9,     [$0, NS64_KERNEL_D9]
 141         ldr             d10,[$0, NS64_KERNEL_D10]
 142         ldr             d11,[$0, NS64_KERNEL_D11]
 143         ldr             d12,[$0, NS64_KERNEL_D12]
 144         ldr             d13,[$0, NS64_KERNEL_D13]
 145         ldr             d14,[$0, NS64_KERNEL_D14]
 146         ldr             d15,[$0, NS64_KERNEL_D15]
 147 .endmacro
 148
 149
 150 /*
 151  * set_thread_registers
 152  *
 153  * Updates thread registers during context switch
 154  *  arg0 - New thread pointer
 155  *  arg1 - Scratch register
 156  *  arg2 - Scratch register
 157  */
 158 .macro  set_thread_registers
 159         msr             TPIDR_EL1, $0                                           // Write new thread pointer to TPIDR_EL1
 160         ldr             $1, [$0, ACT_CPUDATAP]
 161         str             $0, [$1, CPU_ACTIVE_THREAD]
 162         ldr             $1, [$0, TH_CTH_SELF]                           // Get cthread pointer
 163         mrs             $2, TPIDRRO_EL0                                         // Extract cpu number from TPIDRRO_EL0
 164         and             $2, $2, #(MACHDEP_CPUNUM_MASK)
 165         orr             $2, $1, $2                                                      // Save new cthread/cpu to TPIDRRO_EL0
 166         msr             TPIDRRO_EL0, $2
 167         msr             TPIDR_EL0, xzr
 168 #if DEBUG || DEVELOPMENT
 169         ldr             $1, [$0, TH_THREAD_ID]                          // Save the bottom 32-bits of the thread ID into
 170         msr             CONTEXTIDR_EL1, $1                                      // CONTEXTIDR_EL1 (top 32-bits are RES0).
 171 #endif /* DEBUG || DEVELOPMENT */
 172 .endmacro
 173
 174 /*
 175  * set_process_dependent_keys_and_sync_context
 176  *
 177  * Updates process dependent keys and issues explicit context sync during context switch if necessary
 178  *  Per CPU Data rop_key is initialized in arm_init() for bootstrap processor
 179  *  and in cpu_data_init for slave processors
 180  *
 181  *  thread - New thread pointer
 182  *  new_key - Scratch register: New Thread Key
 183  *  tmp_key - Scratch register: Current CPU Key
 184  *  cpudatap - Scratch register: Current CPU Data pointer
 185  *  wsync - Half-width scratch register: CPU sync required flag
 186  *
 187  *  to save on ISBs, for ARMv8.5 we use the CPU_SYNC_ON_CSWITCH field, cached in wsync, for pre-ARMv8.5,
 188  *  we just use wsync to keep track of needing an ISB
 189  */
 190 .macro set_process_dependent_keys_and_sync_context      thread, new_key, tmp_key, cpudatap, wsync
 191
 192
 193 #if defined(__ARM_ARCH_8_5__) || defined(HAS_APPLE_PAC)
 194         ldr             \cpudatap, [\thread, ACT_CPUDATAP]
 195 #endif /* defined(__ARM_ARCH_8_5__) || defined(HAS_APPLE_PAC) */
 196
 197 #if defined(__ARM_ARCH_8_5__)
 198         ldrb    \wsync, [\cpudatap, CPU_SYNC_ON_CSWITCH]
 199 #else /* defined(__ARM_ARCH_8_5__) */
 200         mov             \wsync, #0
 201 #endif
 202
 203
 204
 205         cbz             \wsync, 1f
 206         isb     sy
 207
 208 #if defined(__ARM_ARCH_8_5__)
 209         strb    wzr, [\cpudatap, CPU_SYNC_ON_CSWITCH]
 210 #endif
 211 1:
 212 .endmacro
 213
 214 /*
 215  * void     machine_load_context(thread_t        thread)
 216  *
 217  * Load the context for the first thread to run on a
 218  * cpu, and go.
 219  */
 220         .text
 221         .align 2
 222         .globl  EXT(machine_load_context)
 223
 224 LEXT(machine_load_context)
 225         set_thread_registers    x0, x1, x2
 226         ldr             x1, [x0, TH_KSTACKPTR]                          // Get top of kernel stack
 227         load_general_registers  x1, 2
 228         set_process_dependent_keys_and_sync_context     x0, x1, x2, x3, w4
 229         mov             x0, #0                                                          // Clear argument to thread_continue
 230         ret
 231
 232 /*
 233  *  typedef void (*thread_continue_t)(void *param, wait_result_t)
 234  *
 235  *      void Call_continuation( thread_continue_t continuation,
 236  *                                      void *param,
 237  *                                          wait_result_t wresult,
 238  *                          bool enable interrupts)
 239  */
 240         .text
 241         .align  5
 242         .globl  EXT(Call_continuation)
 243
 244 LEXT(Call_continuation)
 245         mrs             x4, TPIDR_EL1                                           // Get the current thread pointer
 246
 247         /* ARM64_TODO arm loads the kstack top instead of arg4. What should we use? */
 248         ldr             x5, [x4, TH_KSTACKPTR]                          // Get the top of the kernel stack
 249         mov             sp, x5                                                          // Set stack pointer
 250         mov             fp, #0                                                          // Clear the frame pointer
 251
 252         set_process_dependent_keys_and_sync_context     x4, x5, x6, x7, w20
 253
 254         mov x20, x0  //continuation
 255         mov x21, x1  //continuation parameter
 256         mov x22, x2  //wait result
 257
 258         cbz x3, 1f
 259         mov x0, #1
 260         bl EXT(ml_set_interrupts_enabled)
 261 1:
 262
 263         mov             x0, x21                                                         // Set the first parameter
 264         mov             x1, x22                                                         // Set the wait result arg
 265 #ifdef HAS_APPLE_PAC
 266         mov             x21, THREAD_CONTINUE_T_DISC
 267         blraa   x20, x21                                                        // Branch to the continuation
 268 #else
 269         blr             x20                                                                     // Branch to the continuation
 270 #endif
 271         mrs             x0, TPIDR_EL1                                           // Get the current thread pointer
 272         b               EXT(thread_terminate)                           // Kill the thread
 273
 274
 275 /*
 276  *      thread_t Switch_context(thread_t        old,
 277  *                              void            (*cont)(void),
 278  *                              thread_t        new)
 279  */
 280         .text
 281         .align 5
 282         .globl  EXT(Switch_context)
 283
 284 LEXT(Switch_context)
 285         cbnz    x1, Lswitch_threads                                     // Skip saving old state if blocking on continuation
 286         ldr             x3, [x0, TH_KSTACKPTR]                          // Get the old kernel stack top
 287         save_general_registers  x3, 4
 288 Lswitch_threads:
 289         set_thread_registers    x2, x3, x4
 290         ldr             x3, [x2, TH_KSTACKPTR]
 291         load_general_registers  x3, 4
 292         set_process_dependent_keys_and_sync_context     x2, x3, x4, x5, w6
 293         ret
 294
 295 /*
 296  *      thread_t Shutdown_context(void (*doshutdown)(processor_t), processor_t processor)
 297  *
 298  */
 299         .text
 300         .align 5
 301         .globl  EXT(Shutdown_context)
 302
 303 LEXT(Shutdown_context)
 304         mrs             x10, TPIDR_EL1                                                  // Get thread pointer
 305         ldr             x11, [x10, TH_KSTACKPTR]                                // Get the top of the kernel stack
 306         save_general_registers  x11, 12
 307         msr             DAIFSet, #(DAIFSC_FIQF | DAIFSC_IRQF)   // Disable interrupts
 308         ldr             x11, [x10, ACT_CPUDATAP]                                // Get current cpu
 309         ldr             x12, [x11, CPU_ISTACKPTR]                               // Switch to interrupt stack
 310         mov             sp, x12
 311         b               EXT(cpu_doshutdown)
 312
 313 /*
 314  *      thread_t Idle_context(void)
 315  *
 316  */
 317         .text
 318         .align 5
 319         .globl  EXT(Idle_context)
 320
 321 LEXT(Idle_context)
 322         mrs             x0, TPIDR_EL1                                           // Get thread pointer
 323         ldr             x1, [x0, TH_KSTACKPTR]                          // Get the top of the kernel stack
 324         save_general_registers  x1, 2
 325         ldr             x1, [x0, ACT_CPUDATAP]                          // Get current cpu
 326         ldr             x2, [x1, CPU_ISTACKPTR]                         // Switch to interrupt stack
 327         mov             sp, x2
 328         b               EXT(cpu_idle)
 329
 330 /*
 331  *      thread_t Idle_context(void)
 332  *
 333  */
 334         .text
 335         .align 5
 336         .globl  EXT(Idle_load_context)
 337
 338 LEXT(Idle_load_context)
 339         mrs             x0, TPIDR_EL1                                           // Get thread pointer
 340         ldr             x1, [x0, TH_KSTACKPTR]                          // Get the top of the kernel stack
 341         load_general_registers  x1, 2
 342         set_process_dependent_keys_and_sync_context     x0, x1, x2, x3, w4
 343         ret
 344
 345         .align  2
 346         .globl  EXT(machine_set_current_thread)
 347 LEXT(machine_set_current_thread)
 348         set_thread_registers x0, x1, x2
 349         ret
 350
 351
 352 /* vim: set ts=4: */