osfmk/i386/mp_native.c

   1 /*
   2  * Copyright (c) 2000-2009 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28
  29 #include <mach/vm_types.h>
  30 #include <i386/acpi.h> /* install_real_mode_bootstrap */
  31 #include <i386/mp.h>
  32 #include <i386/lapic.h> /* lapic_* functions */
  33 #include <i386/machine_routines.h>
  34 #include <i386/cpu_data.h>
  35 #include <i386/pmap.h>
  36 #include <i386/bit_routines.h>
  37
  38 /* PAL-related routines */
  39 void i386_cpu_IPI(int cpu);
  40 boolean_t i386_smp_init(int nmi_vector, i386_intr_func_t nmi_handler,
  41                 int ipi_vector, i386_intr_func_t ipi_handler);
  42 void i386_start_cpu(int lapic_id, int cpu_num);
  43 void i386_send_NMI(int cpu);
  44 void handle_pending_TLB_flushes(void);
  45 void NMIPI_enable(boolean_t);
  46
  47 extern void     slave_pstart(void);
  48
  49 #ifdef  MP_DEBUG
  50 int     trappedalready = 0;     /* (BRINGUP) */
  51 #endif  /* MP_DEBUG */
  52
  53 boolean_t
  54 i386_smp_init(int nmi_vector, i386_intr_func_t nmi_handler, int ipi_vector, i386_intr_func_t ipi_handler)
  55 {
  56         /* Local APIC? */
  57         if (!lapic_probe())
  58                 return FALSE;
  59
  60         lapic_init();
  61         lapic_configure();
  62         lapic_set_intr_func(nmi_vector,  nmi_handler);
  63         lapic_set_intr_func(ipi_vector, ipi_handler);
  64
  65         install_real_mode_bootstrap(slave_pstart);
  66
  67         return TRUE;
  68 }
  69
  70 void
  71 i386_start_cpu(int lapic_id, __unused int cpu_num )
  72 {
  73         LAPIC_WRITE_ICR(lapic_id, LAPIC_ICR_DM_INIT);
  74         delay(100);
  75         LAPIC_WRITE_ICR(lapic_id,
  76                         LAPIC_ICR_DM_STARTUP|(REAL_MODE_BOOTSTRAP_OFFSET>>12));
  77 }
  78
  79 static boolean_t NMIPIs_enabled = FALSE;
  80
  81 void NMIPI_enable(boolean_t enable) {
  82         NMIPIs_enabled = enable;
  83 }
  84
  85 void
  86 i386_send_NMI(int cpu)
  87 {
  88         boolean_t state = ml_set_interrupts_enabled(FALSE);
  89
  90         if (NMIPIs_enabled == FALSE) {
  91                 i386_cpu_IPI(cpu);
  92         } else {
  93         /* Program the interrupt command register */
  94         /* The vector is ignored in this case--the target CPU will enter on the
  95          * NMI vector.
  96          */
  97         LAPIC_WRITE_ICR(cpu_to_lapic[cpu],
  98                         LAPIC_VECTOR(INTERPROCESSOR)|LAPIC_ICR_DM_NMI);
  99         }
 100         (void) ml_set_interrupts_enabled(state);
 101 }
 102
 103 void
 104 handle_pending_TLB_flushes(void)
 105 {
 106         volatile int    *my_word = &current_cpu_datap()->cpu_signals;
 107
 108         if (i_bit(MP_TLB_FLUSH, my_word)  && (pmap_tlb_flush_timeout == FALSE)) {
 109                 DBGLOG(cpu_handle, cpu_number(), MP_TLB_FLUSH);
 110                 i_bit_clear(MP_TLB_FLUSH, my_word);
 111                 pmap_update_interrupt();
 112         }
 113 }
 114
 115 void
 116 i386_cpu_IPI(int cpu)
 117 {
 118 #ifdef  MP_DEBUG
 119         if(cpu_datap(cpu)->cpu_signals & 6) {   /* (BRINGUP) */
 120                 kprintf("i386_cpu_IPI: sending enter debugger signal (%08X) to cpu %d\n", cpu_datap(cpu)->cpu_signals, cpu);
 121         }
 122 #endif  /* MP_DEBUG */
 123
 124         lapic_send_ipi(cpu, LAPIC_VECTOR(INTERPROCESSOR));
 125 }