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36 * File: arm/commpage/commpage.c
37 * Purpose: Set up and export a RO/RW page
39 #include <mach/mach_types.h>
40 #include <mach/machine.h>
41 #include <mach/vm_map.h>
42 #include <machine/cpu_capabilities.h>
43 #include <machine/commpage.h>
44 #include <machine/pmap.h>
45 #include <vm/vm_kern.h>
46 #include <vm/vm_map.h>
47 #include <vm/vm_protos.h>
48 #include <ipc/ipc_port.h>
49 #include <arm/cpuid.h> /* for cpuid_info() & cache_info() */
50 #include <arm/rtclock.h>
51 #include <libkern/OSAtomic.h>
52 #include <stdatomic.h>
54 #include <sys/kdebug.h>
57 #include <atm/atm_internal.h>
60 static void commpage_init_cpu_capabilities( void );
61 static int commpage_cpus( void );
63 vm_address_t commPagePtr
=0;
64 vm_address_t sharedpage_rw_addr
= 0;
65 uint32_t _cpu_capabilities
= 0;
67 extern int gARMv81Atomics
; /* For sysctl access from BSD side */
76 sharedpage_rw_addr
= pmap_create_sharedpage();
77 commPagePtr
= (vm_address_t
)_COMM_PAGE_BASE_ADDRESS
;
79 *((uint16_t*)(_COMM_PAGE_VERSION
+_COMM_PAGE_RW_OFFSET
)) = (uint16_t) _COMM_PAGE_THIS_VERSION
;
81 commpage_init_cpu_capabilities();
82 commpage_set_timestamp(0, 0, 0, 0, 0);
84 if (_cpu_capabilities
& kCache32
)
86 else if (_cpu_capabilities
& kCache64
)
88 else if (_cpu_capabilities
& kCache128
)
93 *((uint16_t*)(_COMM_PAGE_CACHE_LINESIZE
+_COMM_PAGE_RW_OFFSET
)) = c2
;
94 *((uint32_t*)(_COMM_PAGE_SPIN_COUNT
+_COMM_PAGE_RW_OFFSET
)) = 1;
96 commpage_update_active_cpus();
97 cpufamily
= cpuid_get_cpufamily();
99 /* machine_info valid after ml_get_max_cpus() */
100 *((uint8_t*)(_COMM_PAGE_PHYSICAL_CPUS
+_COMM_PAGE_RW_OFFSET
)) = (uint8_t) machine_info
.physical_cpu_max
;
101 *((uint8_t*)(_COMM_PAGE_LOGICAL_CPUS
+_COMM_PAGE_RW_OFFSET
))= (uint8_t) machine_info
.logical_cpu_max
;
102 *((uint64_t*)(_COMM_PAGE_MEMORY_SIZE
+_COMM_PAGE_RW_OFFSET
)) = machine_info
.max_mem
;
103 *((uint32_t*)(_COMM_PAGE_CPUFAMILY
+_COMM_PAGE_RW_OFFSET
)) = (uint32_t)cpufamily
;
104 *((uint32_t*)(_COMM_PAGE_DEV_FIRM
+_COMM_PAGE_RW_OFFSET
)) = (uint32_t)PE_i_can_has_debugger(NULL
);
105 *((uint8_t*)(_COMM_PAGE_USER_TIMEBASE
+_COMM_PAGE_RW_OFFSET
)) = user_timebase_allowed();
106 *((uint8_t*)(_COMM_PAGE_CONT_HWCLOCK
+_COMM_PAGE_RW_OFFSET
)) = user_cont_hwclock_allowed();
107 *((uint8_t*)(_COMM_PAGE_KERNEL_PAGE_SHIFT
+_COMM_PAGE_RW_OFFSET
)) = (uint8_t) page_shift
;
110 *((uint8_t*)(_COMM_PAGE_USER_PAGE_SHIFT_32
+_COMM_PAGE_RW_OFFSET
)) = (uint8_t) page_shift_user32
;
111 *((uint8_t*)(_COMM_PAGE_USER_PAGE_SHIFT_64
+_COMM_PAGE_RW_OFFSET
)) = (uint8_t) SIXTEENK_PAGE_SHIFT
;
112 #elif (__ARM_ARCH_7K__ >= 2) && defined(PLATFORM_WatchOS)
113 /* enforce 16KB alignment for watch targets with new ABI */
114 *((uint8_t*)(_COMM_PAGE_USER_PAGE_SHIFT_32
+_COMM_PAGE_RW_OFFSET
)) = (uint8_t) SIXTEENK_PAGE_SHIFT
;
115 *((uint8_t*)(_COMM_PAGE_USER_PAGE_SHIFT_64
+_COMM_PAGE_RW_OFFSET
)) = (uint8_t) SIXTEENK_PAGE_SHIFT
;
116 #else /* __arm64__ */
117 *((uint8_t*)(_COMM_PAGE_USER_PAGE_SHIFT_32
+_COMM_PAGE_RW_OFFSET
)) = (uint8_t) PAGE_SHIFT
;
118 *((uint8_t*)(_COMM_PAGE_USER_PAGE_SHIFT_64
+_COMM_PAGE_RW_OFFSET
)) = (uint8_t) PAGE_SHIFT
;
119 #endif /* __arm64__ */
121 commpage_update_timebase();
122 commpage_update_mach_continuous_time(0);
125 clock_usec_t microsecs
;
126 clock_get_boottime_microtime(&secs
, µsecs
);
127 commpage_update_boottime(secs
* USEC_PER_SEC
+ microsecs
);
130 * set commpage approximate time to zero for initialization.
131 * scheduler shall populate correct value before running user thread
133 *((uint64_t *)(_COMM_PAGE_APPROX_TIME
+ _COMM_PAGE_RW_OFFSET
)) = 0;
134 #ifdef CONFIG_MACH_APPROXIMATE_TIME
135 *((uint8_t *)(_COMM_PAGE_APPROX_TIME_SUPPORTED
+_COMM_PAGE_RW_OFFSET
)) = 1;
137 *((uint8_t *)(_COMM_PAGE_APPROX_TIME_SUPPORTED
+_COMM_PAGE_RW_OFFSET
)) = 0;
140 commpage_update_kdebug_state();
143 commpage_update_atm_diagnostic_config(atm_get_diagnostic_config());
149 uint64_t m
; // magic number
150 int32_t a
; // add indicator
151 int32_t s
; // shift amount
155 commpage_set_timestamp(
160 uint64_t tick_per_sec
)
162 new_commpage_timeofday_data_t
*commpage_timeofday_datap
;
164 if (commPagePtr
== 0)
167 commpage_timeofday_datap
= (new_commpage_timeofday_data_t
*)(_COMM_PAGE_NEWTIMEOFDAY_DATA
+_COMM_PAGE_RW_OFFSET
);
169 commpage_timeofday_datap
->TimeStamp_tick
= 0x0ULL
;
171 #if (__ARM_ARCH__ >= 7)
172 __asm__
volatile("dmb ish");
174 commpage_timeofday_datap
->TimeStamp_sec
= secs
;
175 commpage_timeofday_datap
->TimeStamp_frac
= frac
;
176 commpage_timeofday_datap
->Ticks_scale
= scale
;
177 commpage_timeofday_datap
->Ticks_per_sec
= tick_per_sec
;
179 #if (__ARM_ARCH__ >= 7)
180 __asm__
volatile("dmb ish");
182 commpage_timeofday_datap
->TimeStamp_tick
= tbr
;
186 * Update _COMM_PAGE_MEMORY_PRESSURE. Called periodically from vm's compute_memory_pressure()
190 commpage_set_memory_pressure(
191 unsigned int pressure
)
193 if (commPagePtr
== 0)
195 *((uint32_t *)(_COMM_PAGE_MEMORY_PRESSURE
+_COMM_PAGE_RW_OFFSET
)) = pressure
;
199 * Update _COMM_PAGE_SPIN_COUNT. We might want to reduce when running on a battery, etc.
203 commpage_set_spin_count(
206 if (count
== 0) /* we test for 0 after decrement, not before */
209 if (commPagePtr
== 0)
211 *((uint32_t *)(_COMM_PAGE_SPIN_COUNT
+_COMM_PAGE_RW_OFFSET
)) = count
;
215 * Determine number of CPUs on this system.
218 commpage_cpus( void )
222 cpus
= ml_get_max_cpus(); // NB: this call can block
225 panic("commpage cpus==0");
233 * Initialize _cpu_capabilities vector
236 commpage_init_cpu_capabilities( void )
240 ml_cpu_info_t cpu_info
;
243 ml_cpu_get_info(&cpu_info
);
245 switch (cpu_info
.cache_line_size
) {
258 cpus
= commpage_cpus();
263 bits
|= (cpus
<< kNumCPUsShift
);
265 bits
|= kFastThreadLocalStorage
; // TPIDRURO for TLS
269 arm_mvfp_info_t
*mvfp_info
= arm_mvfp_info();
272 if (mvfp_info
->neon_hpfp
)
273 bits
|= kHasNeonHPFP
;
275 #if defined(__arm64__)
278 #if __ARM_ENABLE_WFE_
280 if (arm64_wfe_allowed()) {
287 #if __ARM_V8_CRYPTO_EXTENSIONS__
288 bits
|= kHasARMv8Crypto
;
291 if ((__builtin_arm_rsr64("ID_AA64ISAR0_EL1") & ID_AA64ISAR0_EL1_ATOMIC_MASK
) == ID_AA64ISAR0_EL1_ATOMIC_8_1
) {
292 bits
|= kHasARMv81Atomics
;
296 _cpu_capabilities
= bits
;
298 *((uint32_t *)(_COMM_PAGE_CPU_CAPABILITIES
+_COMM_PAGE_RW_OFFSET
)) = _cpu_capabilities
;
302 * Updated every time a logical CPU goes offline/online
305 commpage_update_active_cpus(void)
309 *((uint8_t *)(_COMM_PAGE_ACTIVE_CPUS
+_COMM_PAGE_RW_OFFSET
)) = processor_avail_count
;
313 * Update the commpage bits for mach_absolute_time and mach_continuous_time (for userspace)
316 commpage_update_timebase(void)
319 *((uint64_t*)(_COMM_PAGE_TIMEBASE_OFFSET
+_COMM_PAGE_RW_OFFSET
)) = rtclock_base_abstime
;
324 * Update the commpage with current kdebug state. This currently has bits for
325 * global trace state, and typefilter enablement. It is likely additional state
326 * will be tracked in the future.
328 * INVARIANT: This value will always be 0 if global tracing is disabled. This
329 * allows simple guard tests of "if (*_COMM_PAGE_KDEBUG_ENABLE) { ... }"
332 commpage_update_kdebug_state(void)
335 *((volatile uint32_t*)(_COMM_PAGE_KDEBUG_ENABLE
+_COMM_PAGE_RW_OFFSET
)) = kdebug_commpage_state();
338 /* Ditto for atm_diagnostic_config */
340 commpage_update_atm_diagnostic_config(uint32_t diagnostic_config
)
343 *((volatile uint32_t*)(_COMM_PAGE_ATM_DIAGNOSTIC_CONFIG
+_COMM_PAGE_RW_OFFSET
)) = diagnostic_config
;
347 * Update the commpage data with the state of multiuser mode for
348 * this device. Allowing various services in userspace to avoid
349 * IPC in the (more common) non-multiuser environment.
352 commpage_update_multiuser_config(uint32_t multiuser_config
)
355 *((volatile uint32_t *)(_COMM_PAGE_MULTIUSER_CONFIG
+_COMM_PAGE_RW_OFFSET
)) = multiuser_config
;
359 * update the commpage data for
360 * last known value of mach_absolute_time()
364 commpage_update_mach_approximate_time(uint64_t abstime
)
366 #ifdef CONFIG_MACH_APPROXIMATE_TIME
367 uintptr_t approx_time_base
= (uintptr_t)(_COMM_PAGE_APPROX_TIME
+ _COMM_PAGE_RW_OFFSET
);
371 saved_data
= atomic_load_explicit((_Atomic
uint64_t *)approx_time_base
,
372 memory_order_relaxed
);
373 if (saved_data
< abstime
) {
374 /* ignoring the success/fail return value assuming that
375 * if the value has been updated since we last read it,
376 * "someone" has a newer timestamp than us and ours is
378 atomic_compare_exchange_strong_explicit((_Atomic
uint64_t *)approx_time_base
,
379 &saved_data
, abstime
, memory_order_relaxed
, memory_order_relaxed
);
383 #pragma unused (abstime)
388 * update the commpage data's total system sleep time for
389 * userspace call to mach_continuous_time()
392 commpage_update_mach_continuous_time(uint64_t sleeptime
)
396 *((uint64_t *)(_COMM_PAGE_CONT_TIMEBASE
+ _COMM_PAGE_RW_OFFSET
)) = sleeptime
;
398 uint64_t *c_time_base
= (uint64_t *)(_COMM_PAGE_CONT_TIMEBASE
+ _COMM_PAGE_RW_OFFSET
);
402 } while(!OSCompareAndSwap64(old
, sleeptime
, c_time_base
));
403 #endif /* __arm64__ */
408 * update the commpage's value for the boot time
411 commpage_update_boottime(uint64_t value
)
415 *((uint64_t *)(_COMM_PAGE_BOOTTIME_USEC
+ _COMM_PAGE_RW_OFFSET
)) = value
;
417 uint64_t *cp
= (uint64_t *)(_COMM_PAGE_BOOTTIME_USEC
+ _COMM_PAGE_RW_OFFSET
);
421 } while (!OSCompareAndSwap64(old_value
, value
, cp
));
422 #endif /* __arm64__ */