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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25
26 #include <mach_kdb.h>
27 #include <mach_kgdb.h>
28 #include <mach_debug.h>
29 #include <assym.s>
30 #include <ppc/asm.h>
31 #include <ppc/proc_reg.h>
32 #include <mach/ppc/vm_param.h>
33
34 /*
35 * vm_offset_t getrpc(void) - Return address of the function
36 * that called the current function
37 */
38
39 /* By using this function, we force the caller to save its LR in a known
40 * location, which we can pick up and return. See PowerPC ELF specs.
41 */
42 ENTRY(getrpc, TAG_NO_FRAME_USED)
43 lwz ARG0, FM_BACKPTR(r1) /* Load our backchain ptr */
44 lwz ARG0, FM_LR_SAVE(ARG0) /* Load previously saved LR */
45 blr /* And return */
46
47
48 /* Mask and unmask interrupts at the processor level */
49 ENTRY(interrupt_disable, TAG_NO_FRAME_USED)
50 mfmsr r0
51 rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
52 rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
53 rlwinm r0, r0, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
54 mtmsr r0
55 isync
56 blr
57
58 ENTRY(interrupt_enable, TAG_NO_FRAME_USED)
59
60 mfmsr r0
61 ori r0, r0, MASK(MSR_EE)
62 mtmsr r0
63 blr
64
65 #if MACH_KDB
66 /*
67 * Kernel debugger versions of the spl*() functions. This allows breakpoints
68 * in the spl*() functions.
69 */
70
71 /* Mask and unmask interrupts at the processor level */
72 ENTRY(db_interrupt_disable, TAG_NO_FRAME_USED)
73 mfmsr r0
74 rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
75 rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
76 rlwinm r0, r0, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
77 mtmsr r0
78 isync
79 blr
80
81 ENTRY(db_interrupt_enable, TAG_NO_FRAME_USED)
82 mfmsr r0
83 ori r0, r0, MASK(MSR_EE)
84 mtmsr r0
85 blr
86 #endif /* MACH_KDB */
87
88 /*
89 * General entry for all debuggers. This gets us onto the debug stack and
90 * then back off at exit. We need to pass back R3 to caller.
91 */
92
93 ENTRY(Call_Debugger, TAG_NO_FRAME_USED)
94
95 mfmsr r7 ; Get the current MSR
96 rlwinm r7,r7,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
97 rlwinm r7,r7,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
98 mflr r0 ; Save the return
99 rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions
100 mtmsr r7 ; Do it
101 isync
102 mfsprg r8,0 ; Get the per_proc block
103 stw r0,FM_LR_SAVE(r1) ; Save return on current stack
104
105 lwz r9,PP_DEBSTACKPTR(r8) ; Get the debug stack
106 cmpwi r9,0 ; Are we already on it?
107 bne cdNewDeb ; No...
108
109 mr r9,r1 ; We are already on the stack, so use the current value
110 subi r9,r9,FM_REDZONE+FM_SIZE ; Carve some extra space here
111
112 cdNewDeb: li r0,0 ; Clear this out
113 stw r1,FM_ARG0(r9) ; Save the old stack pointer as if it were the first arg
114
115 stw r0,PP_DEBSTACKPTR(r8) ; Mark debug stack as busy
116
117 subi r1,r9,FM_SIZE ; Carve a new frame
118 stw r0,FM_BACKPTR(r1) ; Chain back
119
120 bl EXT(Call_DebuggerC) ; Call the "C" phase of this
121
122 mfmsr r0 ; Get the MSR just in case it was enabled
123 addi r1,r1,FM_SIZE ; Pop off first stack frame
124 rlwinm r0,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions enable bit
125 mtmsr r0
126
127 mfsprg r8,0 ; Get the per_proc block address
128
129 lwz r9,PP_DEBSTACK_TOP_SS(r8) ; Get the top of the stack
130 cmplw r1,r9 ; Have we hit the bottom of the debug stack?
131 lwz r1,FM_ARG0(r1) ; Get previous stack frame
132 lwz r0,FM_LR_SAVE(r1) ; Get return address
133 mtlr r0 ; Set the return point
134 bnelr ; Return if still on debug stack
135
136 stw r9,PP_DEBSTACKPTR(r8) ; Mark debug stack as free
137 blr
138
139
140 /* The following routines are for C-support. They are usually
141 * inlined into the C using the specifications in proc_reg.h,
142 * but if optimisation is switched off, the inlining doesn't work
143 */
144
145 ENTRY(get_got, TAG_NO_FRAME_USED)
146 mr ARG0, r2
147 blr
148
149 ENTRY(mflr, TAG_NO_FRAME_USED)
150 mflr ARG0
151 blr
152
153 ENTRY(mfpvr, TAG_NO_FRAME_USED)
154 mfpvr ARG0
155 blr
156
157 ENTRY(mtmsr, TAG_NO_FRAME_USED)
158 mtmsr ARG0
159 isync
160 blr
161
162 ENTRY(mfmsr, TAG_NO_FRAME_USED)
163 mfmsr ARG0
164 blr
165
166 ENTRY(mtsrin, TAG_NO_FRAME_USED)
167 isync
168 mtsrin ARG0, ARG1
169 isync
170 blr
171
172 ENTRY(mfsrin, TAG_NO_FRAME_USED)
173 mfsrin ARG0, ARG0
174 blr
175
176 ENTRY(mtsdr1, TAG_NO_FRAME_USED)
177 mtsdr1 ARG0
178 blr
179
180 ENTRY(mtdar, TAG_NO_FRAME_USED)
181 mtdar ARG0
182 blr
183
184 ENTRY(mfdar, TAG_NO_FRAME_USED)
185 mfdar ARG0
186 blr
187
188 ENTRY(mtdec, TAG_NO_FRAME_USED)
189 mtdec ARG0
190 blr
191
192 /* Decrementer frequency and realtime|timebase processor registers
193 * are different between ppc601 and ppc603/4, we define them all.
194 */
195
196 ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
197 isync
198 mfdec ARG0
199 blr
200
201
202 ENTRY(mftb, TAG_NO_FRAME_USED)
203 mftb ARG0
204 blr
205
206 ENTRY(mftbu, TAG_NO_FRAME_USED)
207 mftbu ARG0
208 blr
209
210 ENTRY(mfrtcl, TAG_NO_FRAME_USED)
211 mfspr ARG0, 5
212 blr
213
214 ENTRY(mfrtcu, TAG_NO_FRAME_USED)
215 mfspr ARG0, 4
216 blr
217
218 ENTRY(tlbie, TAG_NO_FRAME_USED)
219 tlbie ARG0
220 blr
221
222
223 /*
224 * Performance Monitor Register Support
225 */
226
227 ENTRY(mfmmcr0, TAG_NO_FRAME_USED)
228 mfspr r3,mmcr0
229 blr
230
231 ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
232 mtspr mmcr0,r3
233 blr
234
235 ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
236 mfspr r3,mmcr1
237 blr
238
239 ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
240 mtspr mmcr1,r3
241 blr
242
243 ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
244 mfspr r3,mmcr2
245 blr
246
247 ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
248 mtspr mmcr2,r3
249 blr
250
251 ENTRY(mfpmc1, TAG_NO_FRAME_USED)
252 mfspr r3,pmc1
253 blr
254
255 ENTRY(mtpmc1, TAG_NO_FRAME_USED)
256 mtspr pmc1,r3
257 blr
258
259 ENTRY(mfpmc2, TAG_NO_FRAME_USED)
260 mfspr r3,pmc2
261 blr
262
263 ENTRY(mtpmc2, TAG_NO_FRAME_USED)
264 mtspr pmc2,r3
265 blr
266
267 ENTRY(mfpmc3, TAG_NO_FRAME_USED)
268 mfspr r3,pmc3
269 blr
270
271 ENTRY(mtpmc3, TAG_NO_FRAME_USED)
272 mtspr pmc3,r3
273 blr
274
275 ENTRY(mfpmc4, TAG_NO_FRAME_USED)
276 mfspr r3,pmc4
277 blr
278
279 ENTRY(mtpmc4, TAG_NO_FRAME_USED)
280 mtspr pmc4,r3
281 blr
282
283 ENTRY(mfsia, TAG_NO_FRAME_USED)
284 mfspr r3,sia
285 blr
286
287 ENTRY(mfsda, TAG_NO_FRAME_USED)
288 mfspr r3,sda
289 blr
290