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36 #include <mach_assert.h>
38 #include <kern/assert.h>
39 #include <kern/kern_types.h>
40 #include <kern/queue.h>
41 #include <kern/processor.h>
43 #include <pexpert/pexpert.h>
44 #include <mach/i386/thread_status.h>
45 #include <mach/i386/vm_param.h>
46 #include <i386/rtclock_protos.h>
47 #include <i386/pmCPU.h>
48 #include <i386/cpu_topology.h>
51 #include <i386/vmx/vmx_cpu.h>
54 #include <machine/pal_routines.h>
57 * Data structures referenced (anonymously) from per-cpu data:
59 struct cpu_cons_buffer
;
60 struct cpu_desc_table
;
64 * Data structures embedded in per-cpu data:
66 typedef struct rtclock_timer
{
70 boolean_t has_expired
;
77 struct i386_tss
*cdi_ktss
;
78 struct __attribute__((packed
)) {
80 struct fake_descriptor
*ptr
;
82 struct fake_descriptor
*cdi_ldt
;
87 TASK_MAP_32BIT
, /* 32-bit, compatibility mode */
88 TASK_MAP_64BIT
, /* 64-bit, separate address space */
89 TASK_MAP_64BIT_SHARED
/* 64-bit, kernel-shared addr space */
92 #elif defined(__x86_64__)
96 struct x86_64_tss
*cdi_ktss
;
97 struct __attribute__((packed
)) {
101 struct fake_descriptor
*cdi_ldt
;
102 vm_offset_t cdi_sstk
;
106 TASK_MAP_32BIT
, /* 32-bit user, compatibility mode */
107 TASK_MAP_64BIT
, /* 64-bit user thread, shared space */
111 #error Unsupported architecture
115 * This structure is used on entry into the (uber-)kernel on syscall from
116 * a 64-bit user. It contains the address of the machine state save area
117 * for the current thread and a temporary place to save the user's rsp
118 * before loading this address into rsp.
121 addr64_t cu_isf
; /* thread->pcb->iss.isf */
122 uint64_t cu_tmp
; /* temporary scratch */
123 addr64_t cu_user_gs_base
;
126 typedef uint16_t pcid_t
;
127 typedef uint8_t pcid_ref_t
;
131 * Each processor has a per-cpu data area which is dereferenced through the
132 * current_cpu_datap() macro. For speed, the %gs segment is based here, and
133 * using this, inlines provides single-instruction access to frequently used
134 * members - such as get_cpu_number()/cpu_number(), and get_active_thread()/
137 * Cpu data owned by another processor can be accessed using the
138 * cpu_datap(cpu_number) macro which uses the cpu_data_ptr[] array of per-cpu
141 typedef struct cpu_data
143 struct pal_cpu_data cpu_pal_data
; /* PAL-specific data */
144 #define cpu_pd cpu_pal_data /* convenience alias */
145 struct cpu_data
*cpu_this
; /* pointer to myself */
146 thread_t cpu_active_thread
;
147 int cpu_preemption_level
;
148 int cpu_number
; /* Logical CPU */
149 void *cpu_int_state
; /* interrupt state */
150 vm_offset_t cpu_active_stack
; /* kernel stack base */
151 vm_offset_t cpu_kernel_stack
; /* kernel stack top */
152 vm_offset_t cpu_int_stack_top
;
153 int cpu_interrupt_level
;
154 int cpu_phys_number
; /* Physical CPU */
155 cpu_id_t cpu_id
; /* Platform Expert */
156 int cpu_signals
; /* IPI events */
157 int cpu_prior_signals
; /* Last set of events,
160 int cpu_mcount_off
; /* mcount recursion */
161 ast_t cpu_pending_ast
;
166 rtclock_timer_t rtclock_timer
;
167 boolean_t cpu_is64bit
;
168 volatile addr64_t cpu_active_cr3
__attribute((aligned(64)));
170 volatile uint32_t cpu_tlb_invalid
;
172 volatile uint16_t cpu_tlb_invalid_local
;
173 volatile uint16_t cpu_tlb_invalid_global
;
176 volatile task_map_t cpu_task_map
;
177 volatile addr64_t cpu_task_cr3
;
178 addr64_t cpu_kernel_cr3
;
181 void *cpu_console_buf
;
182 struct x86_lcpu lcpu
;
183 struct processor
*cpu_processor
;
184 #if NCOPY_WINDOWS > 0
185 struct cpu_pmap
*cpu_pmap
;
187 struct cpu_desc_table
*cpu_desc_tablep
;
188 struct fake_descriptor
*cpu_ldtp
;
189 cpu_desc_index_t cpu_desc_index
;
192 boolean_t cpu_boot_complete
;
194 #if NCOPY_WINDOWS > 0
195 vm_offset_t cpu_copywindow_base
;
196 uint64_t *cpu_copywindow_pdp
;
198 vm_offset_t cpu_physwindow_base
;
199 uint64_t *cpu_physwindow_ptep
;
203 #define HWINTCNT_SIZE 256
204 uint32_t cpu_hwIntCnt
[HWINTCNT_SIZE
]; /* Interrupt counts */
205 uint64_t cpu_dr7
; /* debug control register */
206 uint64_t cpu_int_event_time
; /* intr entry/exit time */
208 vmx_cpu_t cpu_vmx
; /* wonderful world of virtualization */
211 struct mca_state
*cpu_mca_state
; /* State at MC fault */
213 uint64_t cpu_uber_arg_store
; /* Double mapped address
214 * of current thread's
217 uint64_t cpu_uber_arg_store_valid
; /* Double mapped
222 pal_rtc_nanotime_t
*cpu_nanotime
; /* Nanotime info */
224 thread_t csw_old_thread
;
225 thread_t csw_new_thread
;
226 #endif /* CONFIG COUNTERS */
227 #if defined(__x86_64__)
228 uint32_t cpu_pmap_pcid_enabled
;
229 pcid_t cpu_active_pcid
;
230 pcid_t cpu_last_pcid
;
231 volatile pcid_ref_t
*cpu_pmap_pcid_coherentp
;
232 volatile pcid_ref_t
*cpu_pmap_pcid_coherentp_kernel
;
233 #define PMAP_PCID_MAX_PCID (0x1000)
234 pcid_t cpu_pcid_free_hint
;
235 pcid_ref_t cpu_pcid_refcounts
[PMAP_PCID_MAX_PCID
];
236 pmap_t cpu_pcid_last_pmap_dispatched
[PMAP_PCID_MAX_PCID
];
238 uint64_t cpu_pmap_pcid_flushes
;
239 uint64_t cpu_pmap_pcid_preserves
;
242 uint64_t cpu_max_observed_int_latency
;
243 int cpu_max_observed_int_latency_vector
;
244 uint64_t debugger_entry_time
;
245 volatile boolean_t cpu_NMI_acknowledged
;
246 /* A separate nested interrupt stack flag, to account
247 * for non-nested interrupts arriving while on the interrupt stack
248 * Currently only occurs when AICPM enables interrupts on the
249 * interrupt stack during processor offlining.
251 uint32_t cpu_nested_istack
;
252 uint32_t cpu_nested_istack_events
;
253 x86_saved_state64_t
*cpu_fatal_trap_state
;
254 x86_saved_state64_t
*cpu_post_fatal_trap_state
;
257 extern cpu_data_t
*cpu_data_ptr
[];
258 extern cpu_data_t cpu_data_master
;
260 /* Macro to generate inline bodies to retrieve per-cpu data fields. */
262 #define offsetof(TYPE,MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
263 #endif /* offsetof */
264 #define CPU_DATA_GET(member,type) \
266 __asm__ volatile ("mov %%gs:%P1,%0" \
268 : "i" (offsetof(cpu_data_t,member))); \
271 #define CPU_DATA_GET_INDEX(member,index,type) \
273 __asm__ volatile ("mov %%gs:(%1),%0" \
275 : "r" (offsetof(cpu_data_t,member[index]))); \
278 #define CPU_DATA_SET(member,value) \
279 __asm__ volatile ("mov %0,%%gs:%P1" \
281 : "r" (value), "i" (offsetof(cpu_data_t,member)));
282 #define CPU_DATA_XCHG(member,value,type) \
284 __asm__ volatile ("xchg %0,%%gs:%P1" \
286 : "i" (offsetof(cpu_data_t,member)), "0" (value)); \
290 * Everyone within the osfmk part of the kernel can use the fast
291 * inline versions of these routines. Everyone outside, must call
294 static inline thread_t
295 get_active_thread(void)
297 CPU_DATA_GET(cpu_active_thread
,thread_t
)
299 #define current_thread_fast() get_active_thread()
300 #define current_thread() current_thread_fast()
302 static inline boolean_t
305 CPU_DATA_GET(cpu_is64bit
, boolean_t
)
308 #define cpu_mode_is64bit() get_is64bit()
310 #define cpu_mode_is64bit() TRUE
314 get_preemption_level(void)
316 CPU_DATA_GET(cpu_preemption_level
,int)
319 get_interrupt_level(void)
321 CPU_DATA_GET(cpu_interrupt_level
,int)
326 CPU_DATA_GET(cpu_number
,int)
329 get_cpu_phys_number(void)
331 CPU_DATA_GET(cpu_phys_number
,int)
336 disable_preemption(void)
338 __asm__
volatile ("incl %%gs:%P0"
340 : "i" (offsetof(cpu_data_t
, cpu_preemption_level
)));
344 enable_preemption(void)
346 assert(get_preemption_level() > 0);
348 __asm__
volatile ("decl %%gs:%P0 \n\t"
350 "call _kernel_preempt_check \n\t"
353 : "i" (offsetof(cpu_data_t
, cpu_preemption_level
))
354 : "eax", "ecx", "edx", "cc", "memory");
358 enable_preemption_no_check(void)
360 assert(get_preemption_level() > 0);
362 __asm__
volatile ("decl %%gs:%P0"
364 : "i" (offsetof(cpu_data_t
, cpu_preemption_level
))
369 mp_disable_preemption(void)
371 disable_preemption();
375 mp_enable_preemption(void)
381 mp_enable_preemption_no_check(void)
383 enable_preemption_no_check();
386 static inline cpu_data_t
*
387 current_cpu_datap(void)
389 CPU_DATA_GET(cpu_this
, cpu_data_t
*);
392 static inline cpu_data_t
*
395 return cpu_data_ptr
[cpu
];
398 extern cpu_data_t
*cpu_data_alloc(boolean_t is_boot_cpu
);
399 extern void cpu_data_realloc(void);
401 #endif /* I386_CPU_DATA */